EP1360767A2 - Procede permettant d'effectuer des operations mathematiques dans un dispositif electronique, procede permettant de generer des nombres pseudo-aleatoires dans un dispositif electronique et procede permettant de crypter et de decrypter des donnees electroniques - Google Patents

Procede permettant d'effectuer des operations mathematiques dans un dispositif electronique, procede permettant de generer des nombres pseudo-aleatoires dans un dispositif electronique et procede permettant de crypter et de decrypter des donnees electroniques

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Publication number
EP1360767A2
EP1360767A2 EP01270019A EP01270019A EP1360767A2 EP 1360767 A2 EP1360767 A2 EP 1360767A2 EP 01270019 A EP01270019 A EP 01270019A EP 01270019 A EP01270019 A EP 01270019A EP 1360767 A2 EP1360767 A2 EP 1360767A2
Authority
EP
European Patent Office
Prior art keywords
computations
data
mathematical system
variable
pseudo
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
EP01270019A
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German (de)
English (en)
Inventor
Mette Vesterager Petersen
Hans Martin Boesgaard Sorensen
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Cryptico AS
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Cryptico AS
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Publication date
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Publication of EP1360767A2 publication Critical patent/EP1360767A2/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/001—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58—Random or pseudo-random number generators
    • G06F7/582—Pseudo-random number generators
    • G06F7/586—Pseudo-random number generators using an integer algorithm, e.g. using linear congruential method
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/065—Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
    • H04L9/0656—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
    • H04L9/0662—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/26—Testing cryptographic entity, e.g. testing integrity of encryption key or encryption algorithm

Definitions

  • the present invention relates to a method of performing numerical computations in a mathematical system comprising at least one function, in particular a non-linear function.
  • the mathematical system may be a non-linear system of differential equations which exhibits chaotic behavior.
  • the invention also relates to a pseudo-random number generator applicable to an encryption and decryption method, and to such an encryption and decryption method.
  • An electronic device is preferably used for performing the computations.
  • Cryptography is a generally used term covering science and technology concerned with transforming data, so as to be able to store and transmit the data while being able to prevent unauthorized access to the data.
  • the data are made non-comprehensible for any other person but the intended recipient or recipients of the data. Accordingly, cryptography plays an increasingly more important role in the protection of intellectual property, including copyright protection, as the technological advancements require safe transmission and storage of huge amounts of data.
  • the specific transformation of data is dependent on an input to the algorithm, a so-called key.
  • the sender and the recipient of the data have an appropriate set of keys, the sender and the recipient are able to correctly encrypt and decrypt the data while any third person who may gain access to the encrypted data is not able to view a properly decrypted version of the encrypted data, as she or he is not in possession of an appropriate key.
  • a block cipher is a cryptographic algorithm which splits an original set of data into a plurality of blocks of a given size, e.g. 64 bits per block. Mathematical and logical operations are performed on each block, whereby the original amount of data is usually transformed into blocks of pseudo-random data. In case decryption is initiated with the correct decryption key, the original data can be re-called by reversing the mathematical and logical operations used for encryption.
  • a pseudo-random number generator In a (synchronous) stream cipher, a pseudo-random number generator generates, based on a key, a sequence of pseudo-random numbers, the sequence being referred to as a keystream.
  • the keystream is mixed, by arithmetic and/or logical operations, with a plurality of sub-sets of the original set of data, the sum of sub-sets of data defining the original data to be encrypted.
  • the result of the mixing is the encrypted data.
  • the set of encrypted data may be decrypted by repeating the procedure in such a way that the pseudo-random sequence is extracted from the encrypted data, so as to arrive at the original, decrypted data.
  • the plaintext is often mixed with the keystream by use of a logical operator, the so-called XOR operator, also referred to as the "exclusive or" operator, which is symbolized by the ⁇ symbol.
  • Utilization of the XOR operator on a plaintext and a pseudo-random keystream yields a ciphertext.
  • an identical keystream is generated, and the XOR operator is now utilized on the keystream and the ciphertext, resulting in the original plaintext.
  • the identical keystream can only be generated by using the key on which the keystream for encryption was initially based.
  • public key systems have been developed, such systems being characterized by a pair of asymmetric keys, i.e. a public key and a private key, the two keys being different.
  • the public key is usually used for encryption
  • the private key is usually used for decryption.
  • the private and the public key correspond to each other in a certain manner.
  • the key which is used for encryption cannot be used for decryption, and wee versa.
  • the public key may be published without violating safety in respect of accessibility of the original data. Accordingly, when transmitting encrypted data via a computer communications network, the recipient of the data first generates a set of keys, including a public and a private key.
  • the public key for example, is then provided to the sender of the data, whereas the private key is stored at a secure location.
  • the sender of the data utilizes the public key for encrypting the original data, and the encrypted data are then transferred to the recipient.
  • the private key which corresponds to the public key previously utilized for encryption, is provided to the decryption system which processes the encrypted data so as to arrive at the original decrypted data.
  • Public key systems are primarily used for transmitting keys which are utilized in, e.g., block or stream ciphers, which in turn perform encryption and decryption of the data.
  • the methods of the present invention are applicable to cryptographic methods, in particular but not exclusively to stream cipher algorithms, block cipher algorithms, Hash functions, and MAC (Message Authentication Code) functions.
  • Such methods, functions and algorithms may include pseudo-random number generators which are capable of generating pseudo-random numbers in a reproducible way, i.e. in a way that results in the same numbers being generated in two different cycles when the same key is used as an input for the pseudo-random number generator in the two cycles.
  • a chaotic system normally governs at least one state variable X, the numerical solution method of such a system normally comprising performing iteration or integration steps.
  • the solution X n at a given instant is dependent on the initial condition X 0 to such an extent that a small deviation in X 0 will result in a huge deviation in the solution X n , the system often being referred to as exhibiting sensitivity on initial conditions.
  • the pseudo-random number generator i.e. the algorithm numerically solving the chaotic system to give a reproducible stream of pseudo-random numbers, the exact initial condition X 0 must be known.
  • the initial condition X 0 used in the numerical solution of the chaotic system is derived from the key entered by a user of the cryptographic system, thereby allowing the same stream of pseudo-random numbers to be generated for e.g. encryption and decryption of data.
  • Lyapunov exponents measure the rates of divergence or convergence of two neighboring trajectories, i.e. solution curves, and can be used to determine the stability of various types of solutions, i.e. determine whether the solution is for example periodic or chaotic.
  • a Lyapunov exponent provides such a measure from a comparison between a reference orbit and a displaced orbit. Iterates of the initial condition x 0 are denoted the reference orbit, and the displaced orbit is given by iterates of the initial condition x 0 + y 0 where y 0 is a vector of infinitely small length denoting the initial displacement.
  • Lyapunov exponents each one characterizing orbital divergence or convergence in a particular direction.
  • a positive Lyapunov exponent indicates chaos.
  • the type of irregular behavior referred to as hyperchaos is characterized by two or more positive Lyapunov exponents.
  • Numerical calculation of Lyapunov exponents may be performed according to the suggested method in T.S. Parker and L.O. Chua: Practical Numerical Algorithms for Chaotic Systems, pp. 73- 81.
  • Even more irregular systems than hyperchaotic systems exhibit so-called turbulence, which refers to the type of behaviour exhibited by a system having a continuous spectrum of positive Lyapunov exponents. Turbulence may be modeled by partial differential equations, for example the well-known Navier-Stokes equations.
  • US 5,007,087 assigned to Loral Aerospace Corp. discloses a method and an apparatus for generating random numbers using chaos.
  • the patent describes solving chaotic systems for generating random number sequences and mentions its possible use in cryptography, in particular in the field of key generation and management. The document mentions that repeatability of the number sequence should be avoided.
  • PCT Application WO 98/36523 assigned to Apple Computer, Inc. discloses a method of using a chaotic system to generate a public key and an adjustable back door from a private key.
  • the need for establishing rules of precision during computations on a chaotic system is mentioned.
  • the document states, as an example, that a specified floating point or fixed point precision can be identified along with specific standards for round-off.
  • the recovery of a transmitted message is based on synchronizing the chaotic receiver system with the transmitter system.
  • the Mandelbrot set is computed by means of the below mapping:
  • Intel utilizes a constant decimal separator position in their computations.
  • a so-called 5.11 is utilized, i.e. a 16 bit number is utilized wherein the decimal separator is placed after the 5'th bit, "5" referring to 5 bits after the decimal separator, "11” referring to 11 bits after the decimal separator.
  • floating point type numbers usually on a computer, real numbers are represented by floating point type numbers.
  • a floating-point number is defined as a number consisting of a mantissa and an exponent, e.g. 31415 • 10 "4 , where "31415" is the mantissa and "-4" is the exponent.
  • floating-point refers to the fact that the decimal separator is moving at calculations, caused by the varying exponent.
  • floating point arithmetic is defined differently on various processor architectures causing different handling of precision and rounding off. Instead of floating-point numbers, fixed- point numbers can be used.
  • a fixed-point number is represented as an integer type number on a computer, where a virtual decimal point or separator (also referred to as an imaginary decimal separator) is introduced "manually", i.e. by the programmer, to separate the integer part and the fractional part of the real number.
  • a virtual decimal point or separator also referred to as an imaginary decimal separator
  • calculations on fixed-point numbers are performed by simple integer operations, which are identical on all processors in the sense that the same computation, performed on two different processors, yields identical results on the two processors, except for possible different representations of negative numbers.
  • Such possible different representations may occur as a consequence of some processors utilizing ones complement and other processors utilizing twos complement.
  • these operations are also usually faster than the corresponding floating point operations.
  • a fixed-point number type is denoted ⁇ ( ⁇ . ⁇ ) where is the number of bits used to hold the integer part, and ⁇ the number of bits to hold the fractional part.
  • the values of ⁇ and ⁇ , and thus the position of the decimal point, are usually predetermined and stationary.
  • the fixed-point number can be either unsigned or signed, in which case ⁇ is denoted U or S respectively. In the latter case, a bit is needed to hold the sign, thus + ⁇ +1 bits are needed to hold S( ⁇ . ⁇ ).
  • U( ⁇ . ⁇ ) is [0;2"-2 " ⁇ ]
  • the range of S( ⁇ . ⁇ ) is [-2 ⁇ ;2 ⁇ -2 ⁇ ].
  • the resolution of the fixed-point numbers is thereby 2 " ⁇ .
  • the position of the decimal separator in a fixed-point number is a weighting between digits in the integer part and digits in the fraction part of the number. To achieve the best result of a calculation, it is usually desired to include as many digits after the decimal separator as possible, to obtain the highest resolution. However, it may also be important to assign enough bits to the integer part to ensure that no overflow will occur. Overflow is loading or calculating a value into a register that is unable to hold a number as big as the value loaded or calculated. Overflow results in deletion of the most significant bits (digits) and possible sign change.
  • the position of the decimal separator may be assigned at design time.
  • the possible range of the number, for which the position is to be chosen is preferably analyzed.
  • the position of the decimal point may vary between different fixed-point variables.
  • addition and subtraction operations require input numbers with similar positions.
  • Right shift by n bits corresponds to a conversion from ⁇ ( ⁇ . ⁇ ) to ⁇ ( ⁇ +n. ⁇ -n).
  • Left shift by n bits will convert ⁇ ( ⁇ . ⁇ ) to ⁇ ( ⁇ -n. ⁇ +n). Conversion of unsigned numbers is done by logical shift operations, whereas arithmetical shifts are used for signed numbers.
  • truncation and/or rounding errors are hardware dependent, and consequently truncations and/or roundings may be performed differently in two different hardware processors. For most computations this is without importance, as the truncations and roundings create inaccuracies of an order of magnitude which is far below the required accuracy of the computations. But in the solution of, e.g., chaotic systems, a small deviation in the way truncations are performed may confer huge deviations in the solution at later computational steps.
  • pseudo-random number is used, this should be understood as a random number which may be generated in a reproducible and/or deterministic way, i.e. in a way that results in the same pseudo-random number being generated in two different executions of a pseudo-random number generating algorithm when the same key or seed value is used as an input for the pseudo-random number generating algorithm in the two executions.
  • a fixed-point variable is defined as an integer type number with an imaginary decimal separator, an integer being defined as a number without digits after the decimal separator.
  • real numbers are represented by inserting the imaginary decimal separator (or decimal point) at some fixed predetermined position within an integer, for example four digits from the left.
  • the position might be changed as a consequence of a mathematical operation on the number.
  • the position may also be forced to be changed by use of a logical operation.
  • fixed-point numbers are integers, on which a virtual decimal separator is imposed.
  • the number consists of a so-called “integer part”, referring to the bits before the decimal separator, and a “fraction part” referring to the bits after the decimal separator.
  • integer part referring to the bits before the decimal separator
  • fraction part referring to the bits after the decimal separator.
  • bits are also referred to as digits and wee versa.
  • means may be provided for determining a suitable location of the decimal separator.
  • the program, circuit or device may, during computations, detect possible overflow and, in the case of a possible overflow being detected, change the number of bits on either side of the decimal separator, i.e. the location of the decimal separator in a register which stores the variable or variables in question. This change may be performed by moving the decimal separator one or more positions to the left or to the right. Preferably as many bits as possible are used to the right of the decimal separator in order to minimize the number of possible unused bits in the register and thereby to obtain an optimal accuracy in the computations.
  • the accuracy of the computations is optimized while the risk of overflow is eliminated or reduced, without a designer or programmer of an application incorporating the computer program, circuit or device needing to make considerations concerning accuracy and overflow in a design or programming phase.
  • a test program may be provided which determines when or where in the computations overflow will occur or is likely to occur, so that a programmer or designer of the program may fix the position of the decimal separator in one or more variables such that no overflow occurs, whereby, in the final implementation, no determination of possible overflow is needed.
  • the determination of possible overflow may also be incorporated in the final implementation as an additional safeguarding feature.
  • the programmer or designer may choose to implement changing of the decimal separator at fixed, predetermined stages in the computations.
  • a real number may be expressed by means of one or more fixed-point numbers.
  • the other one may be expressed by means of any other type of number, such as a floating-point or an integer number.
  • a computer readable data carrier should be understood as any device or media capable of storing data which is accessible by a computer or a computer system.
  • a computer readable data carrier may, e.g., comprise a memory, such as RAM, ROM, EPROM, or EEPROM, a CompactFlash Card, a MemoryStick Card, a floppy or a hard disk drive, a Compact Disc (CD), a DVD, a data tape, or a DAT tape.
  • Signals comprising data derived from the methods of the present invention and data used in such methods may be transmitted via communications lines, such as electrical or optical wires or wireless communication means using radio or optical transmission.
  • communications lines such as electrical or optical wires or wireless communication means using radio or optical transmission. Examples are the Internet, LANs (Local Area Networks), MANs (Metropolitan Are Networks), WANs (Wide Area Networks), telephone lines, leased lines, private lines, and cable or satellite television networks.
  • the term "electronic device” should be understood as any device of processing data by means of electronic or optical impulses.
  • Examples of applicable electronic devices to the methods of the present invention are: a processor, such as a CPU, a microcontroller, or a DSP (Digital Signal Processor), a computer or any other device incorporating a processor or another electronic circuit for performing mathematical computations, including a personal computer, a mainframe computer, portable devices, smartcards, chips specifically designed for certain purposes, e.g., encryption.
  • Further examples of electronic devices are: a microchip adapted or designed to perform computations and/or operations.
  • Processors are usually categorized by: (a) the size of data that is operated on (b) the instruction size and (c) the memory model. These characteristics may have different sizes, normally between 4 and 128 bit (e.g. 15, 16, 32, 64 bit) and not limited to powers of two.
  • processor covers any type of processor, including but not limited to: - "Microcontroller”, also called “embedded processor”.
  • microcontroller and “embedded processor” usually refers to a small processor (usually built with fewer transistors than big processors and with limited power consumption). Examples of microcontroller architectures are:
  • processors which are typically used in different kinds of computer and control systems, examples of architectures being: - Alpha 21xxx (e.g. 21164, 21264, 21364) - AMD x86-64 (e.g. Sledgehammer)
  • - ARM e.g. ARM10, StrongARM
  • IA32 e.g. the x86 family produced by Intel (e.g. i486, Pentium), AMD (e.g. K6, K7), and Cyrix)
  • PowerPC e.g. G3, G4, produced by IBM/Motorola
  • SPARC e.g. UltraSPARC II, UltraSPARC III, produced by SUN
  • register should be understood as any memory space containing data, such as a number, the memory space being for example a CPU register, RAM, memory in an electronic circuit, or any data carrier, such as a hard disk, a floppy disk, a Compact Disc (CD), a DVD, a data tape, or a DAT tape.
  • data such as a number
  • the memory space being for example a CPU register, RAM, memory in an electronic circuit, or any data carrier, such as a hard disk, a floppy disk, a Compact Disc (CD), a DVD, a data tape, or a DAT tape.
  • the present invention also relates to, in independent aspects, data derived from the methods of the present invention. It should also be understood that where the present invention relates to methods, it also relates to, in independent aspects, computer programs being adapted to perform such methods, data carriers or memory means loaded with such computer programs, and/or computer systems for carrying out the methods.
  • the present invention provides a method of, performing numerical computations in a mathematical system comprising at least one function, the method comprising the steps of:
  • - extracting a set of data which represents at least one of: - i. a subset of digits of the resulting number, and - ii. a subset of digits of a number derived from the resulting number.
  • a subset of a number may be regarded as a part of that number, such as some, but not necessarily all digits or bits of the number.
  • the 8 least significant bits of a 16- bit number may be regarded as a subset of the 16-bit number.
  • extracting covers, but is not limited to: outputting the number or subset in question, for example as a keystream or a part of a keystream or as any other final or intermediate result of a computational process; storing the number or subset in question in a register, for example in order to allow for further use thereof, such as for further computations, on the subset.
  • the mathematical system may comprise a continuous system, for example a system of differential equations, it may also or alternatively comprise a system which is originally defined in discrete terms, for example in the case of a map.
  • the at least one function of the mathematical system may be non-linear, as discussed in more detail below.
  • the subset of digits comprises k bits of an m-bit number, k ⁇ m, for example extracting 8 bits of a 32-bit number.
  • the number from which the subset is extracted and/or the extracted set of data may be expressed as one or more binary number, octal number, decimal numbers, hexadecimal number, etc.
  • the k bits may be the least significant bits of the number, or it may be k bits selected from predetermined or random positions within the number from which the bits are extracted. For example, from a 64-bit number, bits Nos. 42, 47, 53, 55, 56, 57, 61, and 63 may be extracted, or bits Nos. 47-54.
  • the method according to the first aspect of the invention may be applied for encryption and decryption, modulation of radio waves, synchronization of chaos in picture and sound signals so as to reduce noise, data compression, in control systems, watermarking, steganography, e.g. for storing a document in the least significant bits of a sound file, so as to hide the document in digital transmission.
  • fixed-point numbers has the advantage over floating-point numbers that rounding and/or truncations errors occurring in fixed-point number computations are identically defined on all processors.
  • decimal numbers may be expressed as integer type numbers where an imaginary decimal separator is placed in the number.
  • truncation/rounding errors are not performed identically on different types of processors.
  • numerical computations in mathematical systems which are sensible to truncation/rounding errors may be performed in a reproducible manner.
  • non-linear systems, in particular chaotic systems may be numerically solved in a reproducible manner.
  • computations are also performed faster than computations in methods involving a floating-point variable for the variable in question, as in computations involving fixed-point numbers the hardware processor performs computations as integer number computations, computations on integer number being generally faster than computations on floating-point numbers.
  • the term "resulting number" should be understood as any number occurring in the computations. More than one resulting number may be obtained.
  • the resulting number may, as stated above, be a part of the solution to the mathematical system and/or an intermediate result, i.e. a number assigned to any variable or parameter of the mathematical system or to any other variable or parameter used in the computations.
  • the resulting number or a part thereof may be extracted, for example as a pseudo-random number for use in an encryption/decryption system.
  • one or more mathematical and/or logical operations may be performed on the resulting number or on a plurality of resulting numbers, so as to obtain a further number which is extracted.
  • resulting number all or only selected bits in a binary representation of the resulting number may be extracted. It should be understood that a number generated from selected bits of a number occurring in the computations may be referred to as the resulting number. Thus, the term "resulting number" also covers any part of a number occurring in the computations.
  • the method according to the first aspect of the invention is, as discussed above, useful in cryptography, for example in the following implementations: a symmetric encryption algorithm, a public key (or asymmetric key) algorithm, a secure or cryptographic Hash function, or a Message Authentication Code (MAC).
  • a symmetric encryption algorithm for example in the following implementations: a public key (or asymmetric key) algorithm, a secure or cryptographic Hash function, or a Message Authentication Code (MAC).
  • MAC Message Authentication Code
  • - Ensuring integrity of digital data so as to ensure that information is accurate or has not been tampered with.
  • - Authorization e.g. to allow permission to perform certain tasks or operations.
  • - Authentication such as user authentication, so as to verify the identity of another party, or data origin authentication, so as to verify the origin of the data.
  • Nonrepudiation to provide proof of participation in an electronic transaction, for example to prevent that a first person A sends a message to a second person B and subsequently denies that the message has been sent.
  • Digital signatures are used for this purpose.
  • the generation of a digital signature may incorporate the use of a public key algorithm and a hash function.
  • the method according to the first aspect of the invention is also applicable to a so-called Hash function.
  • a Hash function provides a kind of digital fingerprint wherein a small amount of data serves to identify other data, usually a set of data which is considerably larger than the aforementioned small amount of data.
  • Hash functions are usually public functions wherein no secret keys are involved.
  • Hash functions can also provide a measure of authentication and integrity. They are often essential for digital signature algorithms and for protecting passwords, as a Hash value of a password may be used for password control instead of the password itself, whereby only the hash value and not the password itself needs to be transmitted, e.g. via a communications network.
  • a Hash function employing a secret key as an input is often referred to as a MAC algorithm or a "keyed Hash function".
  • MAC algorithms are used to ensure authentication and data integrity. They ensure that a particular message came from the person or entity from whom it purports to have come from (authentication), and that the message was not altered in transit (integrity). They are used in the IPsec protocols (cf. RFC 2401 available on http://www.rfc-editor.org on 7 December 2001), for example to ensure that IP packets have not been modified between when they are sent and when they reach their final destination. They are also used in all sorts of interbank transfer protocols.
  • the method of the first aspect of the invention may be implemented in a Hash or a MAC algorithm.
  • a Hash or a MAC algorithm calculates a checksum of an amount of data of an arbitrary length, and gives the checksum as a result.
  • the process should be irreversible (one-way), and a small change of an input value should result in a significantly different output. Accordingly, the sensitivity to data input should be high.
  • a Hash function does not use a key as a seed value
  • a MAC algorithm uses such a key which represents or determines a seed value for the algorithm, whereby the result depends on the key.
  • the Hash function relies on a constant value, for example certain bits from the number ⁇ .
  • a part of the data to which the Hash function is applied may be used as a seed value.
  • Other chaotic systems may be employed, such as the Lorenz system which is discussed in detail hereinafter.
  • the message is incorporated in the system as a component thereof.
  • the parameters ⁇ and ⁇ and the initial value x 0 may be predetermined and/or derived from the message. In the case of a MAC algorithm, the parameters ⁇ and ⁇ and the initial value x 0 may, completely or partially, be determined by the secrete key.
  • the system is iterated until the end of the message is reached.
  • the last calculated value of x or part thereof, such as the least significant digits, is denoted, for example, the Hash value, the MAC or the checksum. Alternatively, a number of additional iterations may be performed prior to extracting the resulting number. Instead of or in addition to extracting the last calculated value of x, certain bits which have been ignored in the computations may be extracted as the Hash value.
  • the way of introducing the message, m, into the dynamical system can be varied.
  • a part of the message may be used to influence the x-variable in each iteration.
  • Such influence may, e.g., be achieved by XORing certain bits of the message into the least significant digits of x.
  • Hash/MAC functions For further details concerning Hash/MAC functions, reference is made to Applied Cryptography by Bruce Schneier, Second Edition, John Wiley & Sons, 1996.
  • the key used for decryption is different from the key used for encryption.
  • a key-generation function generates a pair of keys, one key for encryption and one key for decryption.
  • One of the keys is private, and the other is public. The latter may for example be sent in an unencrypted version via the Internet.
  • the encryption key may constitute or contain parameters and/or initial conditions for a chaotic system.
  • a plaintext is used to modulate the chaotic system which is irreversible unless initiated by the private key.
  • a mathematical system is used which has dynamics which are inverse to the dynamics of the system used for encryption.
  • the computations involving the variable expressed as a fixed-point number may possibly include computations on other types of variables, including one or more variables expressed as other kinds of numbers, such as floating point numbers and integer numbers.
  • the mathematical system may be a discrete or a continuous system. Various types of mathematical systems are discussed below.
  • the computations may involve at least a first and a second fixed-point number, each fixed- point number having a decimal separator, wherein the decimal separator of the first fixed- point number is positioned at a position different from the position of the decimal separator of the second fixed-point number.
  • the decimal separator of the first and second fixed-point number may be positioned at selected positions.
  • the resulting number may be expressed as a variable selected from the group consisting of: an integer number, a floating point number, and a fixed-point number.
  • the mathematical system may comprise one or more differential equations, or one or more discrete maps or mappings.
  • the mathematical system may comprise one or more ordinary differential equations and/or one or more partial differential equations.
  • discrete mappings the mathematical system may comprise one or more area-preserving maps and/or one or more non area- preserving maps. At least one function of the mathematical system may be non-linear.
  • the method of the invention is also applicable to other types of functions or equations, including integral equations.
  • the at least one non-linear differential equation or mapping may exhibit chaotic behavior, i.e. it may have at least one positive Lyapunov exponent, in which case the method may comprise computing a Lyapunov exponent at least once during the mathematical computations.
  • the method of the invention may advantageously be applied in a pseudo- random number generating method, such as in an encryption/decryption method.
  • At least one Lyapunov exponent may be computed at least once during the mathematical computations in order to determine whether the mathematical system exhibits chaotic behavior. If this is not the case, e.g. if the computed Lyapunov exponent is not positive, the computations may be interrupted and resumed from other initial values and/or other parameters.
  • the at least non-linear differential equation or mapping preferably governs at least one state variable, X, which may be a function of at least one independent variable, t.
  • the mathematical system may comprise one or more of the following systems: - continuous differential equations, including:
  • - ordinary differential equations including: - autonomous systems, such as dissipative flows, including the Lorenz system, coupled Lorenz systems, the R ⁇ ssler system, coupled R ⁇ ssler systems, hyper chaotic R ⁇ ssler system, the Ueda system, simplest quadratic dissipative chaotic flow, simplest piecewise linear dissipative chaotic flow
  • Non-autonomous systems including forced systems, such as the forced Duffing's equation, forced negative resistance oscillator, forced Brusselator, forced damped pendulum equation, coupled pendulums, forced double-well oscillator, forced Van de Pol oscillator, - delay differential equations, including delay logistic equation, population models,
  • forced systems such as the forced Duffing's equation, forced negative resistance oscillator, forced Brusselator, forced damped pendulum equation, coupled pendulums, forced double-well oscillator, forced Van de Pol oscillator, - delay differential equations, including delay logistic equation, population models,
  • - area preserving as well as non area-preserving maps including - maps which are piecewise linear in any dimension, such as a tent map, an asymmetric tent map, 2x modulo 1 map, and also the Anosov map, the generalized Baker's map, the Lozi map, as well as higher order generalizations and/or couplings of piecewise linear maps
  • polynomial maps quadrature or higher
  • a logistic map including a logistic map, the Henon map, higher order generalizations and/or couplings of polynomial map, e.g. N coupled logistic maps, N coupled Henon maps,
  • Trigonometric maps including a Sine circle map, a Sine map, the Chirikov standard map, the Yale map, the standard map, and Higher order generalizations and/or couplings of trigonometric maps, - other maps, including the Bernoulli shift, a decimal shift, the Horseshoe map, the Ikeda map, a pastry map, a model of a digital filter, a construction of the Henon type map in two dimensions from an arbitrary map in one dimension, the DeVogelaere map,
  • the Henon map referred to above has the form:
  • the Anosov map often referred to as the cat map having the form:
  • the map is composed of two steps; i) a linear matrix multiplication, ii) a non-linear modulo operation, which forces the iterates to remain within the unit square. It is possible to generalize the Anosov maps to an arbitrary number of variables. Furthermore, the matrix may have arbitrary coefficient only limited by the requirement of being area-preserving and having at least one positive Lyapunov exponent for the system. These exponents can be calculated analytically for such systems. For more details, reference is made to A.J. Lichtenberg and M.A. Lieberman, Regular and Chaotic Dynamics, Springer 1992 (p.305).
  • a map lattice which is a type of coupled maps may be employed.
  • Xj denotes a variable on a lattice (represented by an N-dimensional array of points), the lattice being a ID array with M points.
  • Each point on the lattice is updated according to the function on the right hand side of the arrow, where the function f may for example be the logistic map.
  • neighbouring points on the lattice couple linearly, where the linear coupling is adjusted by the parameters ⁇ and ⁇ .
  • Boundary conditions refer to the way lattice elements 1 and M are treated.
  • the parameters may be constant or variable, variable parameters contributing, e.g., to the results of the computations being more unpredictable which may be useful in a pseudo-random number generating method or in an encryption/decryption method.
  • the computations may comprise numerically iterating the non-linear function, the iteration being based on an initial condition X 0 of the state variable X.
  • the step of performing computations may comprise numerically integrating the non-linear differential equations by repeatedly computing a solution X n+i based on one or more previous solutions X m , m ⁇ n+1, and a step length, ⁇ T n , of the independent variable, t.
  • a solution X n+i based on one or more previous solutions X m , m ⁇ n+1, and a step length, ⁇ T n , of the independent variable, t.
  • at least one initial condition, X 0 , of the state variable, X, and an initial step length, ⁇ T 0 are provided.
  • the step length may be given before the computations are initiated, or it may be computed as the computations proceed.
  • the initial step length, ⁇ T 0 may be computed from the initial condition X 0 .
  • Zn +1 Z n + (Xny ⁇ - bz n ) - ⁇ t z , n , wherein:
  • ⁇ t x , n is the step length used in the computation of x n+ ⁇
  • ⁇ t y/n is the step length used in the computation of y n+1
  • ⁇ t Zjn is the step length used in the computation of z n+1 .
  • the step length ⁇ T may be constant or may vary throughout the computations.
  • at least one of the elements ( ⁇ t X/n , ⁇ t y , ⁇ , ⁇ t Z/n ) of the step length ⁇ T may be a function of one or more numbers involved in or derived from the computations.
  • at least one of the elements ( ⁇ t x , n , ⁇ t y , n , ⁇ t z , n ) of the step length ⁇ T may be a function of at least one solution, X m , which is a current or previous solution to the mathematical system.
  • At least one of the elements ( ⁇ t X/n , ⁇ t y , n , ⁇ t z>n ) of the step length ⁇ T is a function of at least one step length, ⁇ T m , which is a current or previous integration step.
  • the varying step length ⁇ T may be used not only in the method according to the invention but in any numerical solution of differential equations, and accordingly the present invention also relates to - as an independent aspect - a method of numerically solving differential equations using a variable step length.
  • the variable step length may contribute to improving the security of the system, i.e. to make the resulting keystream more unpredictable.
  • the initial condition X 0 and/or the initial step length ⁇ T 0 may be calculated from or represent a seed value.
  • at least a part of the initial condition X 0 and/or at least a part of the initial step length ⁇ T 0 may be calculated from or represent an encryption key.
  • at least a part of at least some of the parameters of the mathematical system may be calculated from or represent a seed value or an encryption key.
  • the key may be a public or a private key.
  • the extracted set of data may comprise a pseudo-random number which may be used for encryption.
  • a plurality of numbers resulting from the computations may be extracted.
  • the step of extracting may comprise extracting one or more numbers derived from a number, k, of bits of the resulting number, such as the k least significant bits from the resulting number or numbers, which contributes to the unpredictability of the derived number.
  • the k bits extracted may for example be derived by applying a modulus or a logical "and" function to the resulting number or numbers.
  • the step of extracting may comprise extracting k bits at predetermined or variable positions in the resulting number.
  • the number k may be an integer value selected from in the range between 8 and 128, such as 16-64, such as 24-32.
  • the extracted numbers may be derived by means of different values of k, which further contributes to the unpredictability of the derived number.
  • the extracted number or numbers may be manipulated by means of arithmetic and/or logical operations, so as to obtain a combined set of data.
  • One or more of the extracted numbers and/or the combined set of data may be combined with original data in an arithmetic and/or logical operation, so as to encrypt the original data.
  • one or more of the extracted numbers and/or the combined set of data may be combined with encrypted data in a arithmetic and/or logical operation, so as to decrypt the encrypted data and obtain the original data.
  • the arithmetic and/or logical operation may comprise an XOR operation, multiplication or addition.
  • the arithmetic and/or logical operation may comprise addition of the original data and the combined set of data for encryption, and subtraction of the combined set of data from the encrypted data for decryption.
  • the arithmetic and/or logical operation comprises subtraction of the combined set of data from the original data for encryption, and addition of the combined set of data and the encrypted data for decryption.
  • the extracted set of data comprises data derived from a plurality of numbers
  • one set of bits for example the k least significant bits may be extracted from one number
  • other bits for example the 47th - 54th bit in a 64-bit number
  • the computations may involve data representing a block of plaintext, so that the plaintext and a key is entered into, e.g., an encryption system which gives the ciphertext as an output.
  • the extracted set of data may be used to define at least one operation on a block of plaintext in the block-cipher encryption and decryption system.
  • the method of the first aspect of the invention may be applied in a block-cipher algorithm, wherein a block of plaintext is divided into two sub- blocks, and one sub-block is used to influence the other, for example where a modified version of a first block (or a part thereof) is used to influence the other (or a part thereof), e.g., by an XOR function.
  • Such an algorithm is generally referred to as a Feistel Network, cf. Applied Cryptography by Bruce Schneier, Second Edition, John Wiley & Sons, 1996.
  • the first sub-block or the modified version thereof may be transformed by a Hash function relying on the method, the Hash function being given a cryptographic key as an input.
  • a new cryptographic key may be given as input to the Hash function.
  • the same cryptographic key may be given to the Hash function in all rounds.
  • the cryptographic key may vary from block to block, for example by giving the same cryptographic key as an input in all rounds for each block, or by giving different cryptographic keys as inputs for each block and for each round.
  • the extracted data may be used as a decryption or an encryption key.
  • the extracted set of data from one of the systems may be used to generate keys or used as keys for the other system.
  • the extracted data may also be used in generation of data representing a digital signature, and/or in watermarking of digital data.
  • the electronic device may comprise an electronic processing unit having a register width
  • the method may comprising the steps of: - expressing at least one integer number of a bit width larger than said register width as at least two sub-numbers each having a bit width which is at most equal to said register width, - performing at least one of said computations as a sub-computation on each of the sub- numbers so as to arrive at at least two partial results, expressed as integer numbers of a bit width smaller which is at most equal to the register width of the processing unit, - concatenating the partial results to yield a representation of a result of said at least one computation.
  • computations on numbers of a width smaller than the register width of the processor may also be performed, whereby an operation, for example a logical AND, may be performed, so that the upper half of, e.g., a 64-bit register is not used for computations on 32-bit numbers.
  • an operation for example a logical AND
  • the most significant bit of, e.g., the 32-bit number may be copied into the upper 32 bits of the 64- bit register.
  • the integer numbers usually comprise or represent the fixed-point number or numbers used in the computations.
  • a fixed-point number expressed in terms of an integer type number may represent a real number.
  • the invention also relates to a computer program for performing numerical computations in a mathematical system comprising at least one function, the computer program being adapted to:
  • the computer program may further be adapted to perform any of the operations and method steps discussed in the present text.
  • the invention also relates to a computer readable data carrier loaded with such a computer program, and to a computer comprising or being connected to such a computer readable data carrier, the computer comprising processor means for running the program.
  • the invention also relates to a signal comprising an extracted set of data which have been derived from computations in a mathematical system, wherein, in order to arrive at the extracted set of data: - the mathematical system has been expressed in discrete terms, - at least one variable of the mathematical system has been expressed as a fixed-point number,
  • the invention further relates to a signal comprising an encrypted set of data which has been derived as a combination of plaintext and at least one set of data extracted from computations in a mathematical system, wherein, in order to arrive at the extracted set of data:
  • a resulting number has been obtained from said computations, the resulting number representing at least one of: - a. at least a part of a solution to the mathematical system, and
  • the present invention relates to a method of detecting periodic behavior in the solution of a mathematical system comprising at least one non-linear function governing at least one state variable with respect to at least one independent variable, the method comprising:
  • the steps of performing computations, storing selected solutions, and determining may be performed continuously during the computations, i.e. repetitively during the computations, such as in each computational step, such as in connection with each iteration.
  • a current solution or a particular one of the solutions stored in the array is substantially identical to one or more other solutions stored in the array the solution of the mathematical system is likely to show periodic behavior.
  • the method according to the second aspect of the invention is used in a pseudo-random number generating method, in particular if it is used in an encryption/decryption method, such periodic behavior is undesirable, as it negatively influences the unpredictability of the generated pseudo-random numbers or the keystream.
  • periodic behavior may be detected.
  • the step of determining whether a current solution or a particular one of the solutions stored in the array is substantially identical to one or more other solutions stored in the array preferably comprises determining whether the solutions are completely identical.
  • the step of determining may comprise determining whether only some of the entries of X are substantially identical.
  • each entry in the array may contain a solution having an age which is growing by array level, A,, O ⁇ i ⁇ n, and the method may comprise:
  • the number of times an old value stored at the i'th level has been overwritten by a new value without the old value being transferred to the i+l'st level may be counted, the i'th predetermined criterion being fulfilled if the old value has not been transferred for a predetermined number of times.
  • the predetermined number of times may be the same for all levels of the array, A, or it may vary between the levels.
  • the predetermined number of times for the i'th level of the array, A may for example be dependent on one or more values stored in the array, such as when there occurs a change of sign in one or more of the values.
  • the step of determining whether a current solution or a particular one of said solutions stored in the array is substantially identical to one or more other solutions stored in the array may only be performed when a test criterion is fulfilled.
  • the test criterion may be fulfilled when the sign of at least one state variable changes from + to -, or from - to +, or both.
  • the test criterion may also be fulfilled when there occurs a change of sign of at least one derivative of at least one state variable with respect to at least one independent variable, in which case the method further comprises computing the derivative.
  • a test value may be computed from the at least one state variable and/or from the derivative, the test criterion being based on the test value.
  • the test criterion may for example be fulfilled when there occurs a change of sign in the test value or in a derivative of the test value, or predetermined values may be provided.
  • the step of performing computations may be performed by applying the method of the first aspect of the invention, and any step discussed in relation to the first aspect of the invention as well as any step discussed below in connection with the methods of the further aspects of the invention may be incorporated.
  • the present invention relates to a method of generating a pseudo- random number, the method comprising:
  • V extracting, as the pseudo-random number, a number derived from at least one number which has occurred during the computations.
  • the seed value may be a user-defined value, such as an encryption/decryption key in case the method is applied in an encryption/decryption method.
  • the pseudo-random number may be extracted as a number derived from the k digits of the one or more numbers which have occurred during the computations, e.g. the k least significant bits or k selected bit from the one or more numbers.
  • the method may comprise repeating steps IV) and V) until a given amount of pseudorandom numbers has been generated.
  • a given amount of pseudo-random numbers may be generated and stored in a memory of the electronic device as a spare seed value, which may, e.g., be used if periodic behavior is detected by the method according to the second aspect of the invention or by another method.
  • the given amount of pseudo-random numbers may be stored internally in an algorithm.
  • the method may further comprise a method for detecting periodic behavior according to the second aspect of the invention as discussed above.
  • the method for generating a pseudo-random number according to the third aspect of the invention may comprise, if the step of: determining whether a current solution or a particular one of said solutions stored in the array is substantially identical to one or more other solutions stored in the array reveals that the current solution or the particular solution is identical to one or more other solutions, interrupt the pseudo-random-number generation, i.e. interrupting repetition of steps IV) and V), use the spare seed value as the seed value in the step II), resume the pseudo-random-number generation, i.e. resuming repetition of steps IV) and
  • a spare encryption/decryption key may be used if periodic behavior is detected.
  • a given amount of pseudo-random numbers may be generated and stored, in a memory of the electronic device, as a new spare seed value.
  • Each level in the array, A is preferably reset prior to step IV), when steps IV) and V) are initiated with a new seed value at step II).
  • the method according to the third aspect of the invention may comprise the steps described above in connection with the first aspect of the invention and/or the steps described below in connection with the further aspects of the invention.
  • the invention relates to a method of encrypting a set of original data into a set of encrypted data, the method comprising the steps of: A) generating a pseudo-random number by performing the steps of: I) expressing a mathematical system in discrete terms, II) defining an encryption key representing at least an initial condition for the mathematical system,
  • V) extracting, as the pseudo-random number, a number derived from at least one number which has occurred during the computations, B) manipulating the original data and the pseudo-random number by means of at least one of: i. an arithmetic operation, and ii. a logical operation, so as to obtain a combined set of data, the combined set of data being the encrypted data.
  • step A a sub-set of the original data may be separated from the set of data, and step B) may be performed on the sub-set of data. This step may be repeated until a plurality of sub-sets which in common constitute the entire set of original data have been encrypted.
  • the pseudo-random number may be extracted as a number derived from the k bits of the one or more numbers which have occurred during the computations, e.g. the k least significant bits or k selected bits.
  • Steps IV) and V) may be repeated until a given amount of pseudo-random numbers has been generated.
  • a given amount of pseudo-random numbers may be generated and stored in a memory of the electronic device as a spare encryption key.
  • a number resulting from or occurring in at least one integration or iteration step of the computations may be stored as a spare encryption key.
  • the spare encryption key may, e.g., be used if encryption is interrupted due to the occurrence of periodic behavior in the solution to the mathematical system. In case no output of the spare encryption key is needed, it may be stored internally in an encryption algorithm. When the method is used for decryption, the spare key is a decryption key.
  • the method may comprise a method for detecting periodic behavior according to the second aspect of the invention, in which case the method for encrypting according to the fourth aspect of the invention may comprise, if the step of determining whether a current solution or a particular one of said solutions stored in the array is substantially identical to one or more other solutions stored in the array reveals that the current solution or the particular solution is identical to one or more other solutions, interrupt the pseudo-random number generation, i.e. interrupting repetition of steps IV) and V), use the spare encryption key as the encryption key in step II), resume the pseudo-random number generation, i.e. resuming repetition of steps IV) and V).
  • a given amount of pseudo-random numbers may be generated and stored in a memory of the electronic device as a new spare encryption key.
  • each level in the array, A is reset prior to step IV), when steps IV) and V) are initiated with a new seed value at step II).
  • the method for encrypting according to the fourth aspect of the invention may further comprise any of the steps discussed above in connection with the methods of the first, second and third aspects of the invention, and/or any of the steps discussed below in connection with the further aspects of the invention.
  • the invention in a fifth aspect, relates to a method of decrypting a set of encrypted data which has been encrypted by the method according to the fourth aspect of the invention, the method of decrypting according to the fifth aspect comprising the steps of: a) performing step A) as defined above in connection with the encryption method, so as to extract the same pseudo-random number as extracted in step V) of the encryption method, b) manipulating the encrypted data and the pseudo-random number by means of arithmetic and/or logical operations, so as to obtain the original, i.e. decrypted, version of the data.
  • a sub-set of the encrypted data may be separated from the set of encrypted data, and in case the sub-set of data has been encrypted by the above encryption method, the method of decrypting may comprise performing steps a) and b) on the sub-set of data. This step may be repeated until a plurality of sub-sets which in common constitute the entire set of encrypted data have been decrypted.
  • Any of the steps of the encryption method may be applied in an identical manner when decrypting the encrypted data as during the previous sequence of encrypting the original data.
  • the present invention relates to a computer program for encrypting and decrypting a set of data, the computer program being adapted to run in an encryption mode and in a decryption mode, the computer program being further adapted to: i) generate a pseudo-random number in a reproducible way by performing the steps of: - expressing a mathematical system in discrete terms,
  • the combined set of data represents an encrypted version of the data in case the computer program is run in encryption mode
  • the combined set of data represents a decrypted version of the data in case the computer program is run in decryption mode.
  • the step of manipulating may comprise any logical and/or arithmetic function described above.
  • the encryption and decryption modes may comprise identical steps.
  • the step of generating a pseudo-random number may further comprise any of the steps discussed above in connection with the method according to the third aspect of the invention.
  • the computer program of the sixth aspect of the invention may be adapted to perform any step discussed above with the first, second, third, fourth and fifth aspects of the invention, as well as any step discussed below in connection with the further aspects of the invention.
  • the invention further relates to a computer readable data carrier loaded with a computer program according to the sixth aspect of the invention, and to a computer comprising or being connected to such a computer readable data carrier, the computer comprising processor means for running the program.
  • the invention relates to a method of generating a pseudo-random number, the method comprising, in one instance: I) expressing a mathematical system in discrete terms, II) defining a seed value representing at least an initial condition for the mathematical system,
  • IV) performing computations including the at least one variable expressed as a fixed-point number and obtaining a resulting number, the resulting number representing at least one of: a. a part of a solution to the mathematical system, and b. a number usable in further computations involved in the numerical solution of the mathematical system, V) extracting, as the pseudo-random number, a number derived from at least one number which has occurred during the computations, performing steps I) - V) in a plurality of instances in parallel.
  • Computations in the two or more instances may be performed either at the same time, or successively.
  • the computations in the two or more instances may be performed by executing instructions which process a plurality of computations at the same time, or by executing instructions which only process a single computation at a time.
  • pseudo-random number generation in a plurality of instances in parallel may, in some cases, be faster than if the steps are performed in one instance only, in particular if the hardware on which the method is executed supports parallel processing.
  • a larger key length in encryption may be applied than if only one instance were used. For example, one part of an encryption key may be used for a first instance, and another part of the encryption key may be used for a second instance.
  • Mathematical systems of arbitrarily high dimension may be constructed by coupling systems of lower dimension.
  • N logistic maps can be coupled, yielding an N- dimensional system.
  • the coupling mechanism can be engineered by including either linear or non-linear coupling functions in the N different maps corresponding to the N different variables.
  • the coupling function in the map governing one variable may or may not depend on all other variables.
  • the coupling can be carried out by substituting one of the N variables into one or more of the N-l remaining maps.
  • Two or more logistic maps may be coupled through linear coupling terms.
  • the parameters ⁇ x and ⁇ 2 in front of the coupling terms control the strength of the coupling, i.e. the degree of impact that each one of the two logistic maps has on the other one.
  • Numbers or data may be transmitted between the plurality of instances at least while performing step IV) for each of the instances.
  • the method may comprise combining, by use of arithmetic and/or logical operations, a plurality of pseudo-random numbers extracted at step V) in each of the instances into a common pseudo-random number.
  • Parameter and/or variable values, or parts thereof, may be exchanged between the two instances.
  • x n+1 of one instance and x n+1 of another instance may be exchanged after each iteration step, or x n+1 of one instance may be exchanged with y n+ ⁇ of another instance.
  • the step length ⁇ t n may be exchanged between the two instances.
  • the exchange of variable or parameter values may also be achieved by performing logical and/or arithmetic operations on a value of a first instance before using that value for modifying a value of a second instance.
  • the method according to the seventh aspect of the invention may comprise any step discussed above or below in connection with the other aspects of the invention.
  • the invention relates to a method of performing numerical computations in a mathematical system comprising at least one function, the method comprising the steps of:
  • the invention relates to a method of determining an identification value for identifying a set of data, the method comprising performing numerical computations in a mathematical system comprising at least one function, the method comprising the steps of: - expressing the mathematical system in discrete terms,
  • the computations include the at least one variable expressed as a fixed-point number, - obtaining, from said computations, a resulting number, the resulting number representing at least one of: a. at least a part of a solution to the mathematical system, and b. a number usable in further computations involved in the numerical solution of the mathematical system, whereby a representation of at least part of the set of data is used in said computations, the method further comprising:
  • the method of the ninth aspect of the invention may be regarded a Hash function or Hash algorithm which have been discussed in detail above.
  • the identification value may be constituted by a number of extracted numbers which have been extracted at different computational stages in the numerical computations. Extraction may occur at each computational step or at each iteration step, or it may occur only at selected computational stages.
  • identification value may be a hash value or a cryptographic check-sum which identifies the set of data, cf. for example Applied Cryptography by Bruce Schneier, Second Edition, John Wiley & Sons, 1996.
  • the hash function is referred to as a MAC function (Message Authentication Code).
  • the mathematical system may comprise a differential equation, such as a partial differential equation or an ordinary differential equation, or a discrete mapping, such as an area-preserving map or a non area-preserving map.
  • the mathematical system may comprise at least one non-linear mapping function governing at least one state variable X.
  • a cryptographic key may be used for at least partially determining at least one of the following: ⁇ , ⁇ and an initial value x 0 of state variable x.
  • the mathematical system may comprise a set of non-linear mapping functions, such as: an Anosov map of the form:
  • the mathematical system may comprise at least one non-linear differential equation and/or a set of non-linear differential equations.
  • the mathematical system has at least one positive Lyapunov exponent, whereby a certain degree of irregular or chaotic behavior is achieved, whereby randomness properties of the system and security are enhanced.
  • At least one Lyapunov exponent may be computed at least once during the mathematical computations in order to determine whether the mathematical system exhibits chaotic behavior. If this is not the case, e.g. if the computed Lyapunov exponent is not positive, the computations may be interrupted and resumed from other initial values and/or other parameters.
  • the at least non-linear differential equation preferably governs at least one state variable, X, which is a function of at least one independent variable, t.
  • the set of non-linear differential equations may for example comprise a Lorenz system.
  • the present invention relates to a method of, performing numerical computations in a mathematical system comprising at least one function, the method comprising the steps of:
  • a resulting number representing at least one of: a. a part of a solution to the mathematical system, and b. a number usable in further computations involved in the numerical solution of the mathematical system,
  • the step of assigning a value within the range may be seen as a modulus function.
  • the steps of the method of the tenth aspect of the invention may thus provide deliberate overflow, e.g. in order to enhance randomness properties of an encryption/decryption system and/or in order to make it more difficult to derive information about internal states of the mathematical system from encrypted data.
  • any and all comments and discussions herein set forth in connection with the other aspects of the invention also applies to the method of the ninth aspect of the invention.
  • any and all comments set forth in connection with encryption and decryption apply, and the method of the tenth aspect of the invention analogously applies to any and all aspects of the present invention, in particular to aspects related to encryption and decryption.
  • the method of the tenth aspect of the invention may thus be a part of a pseudo-random number generating method which, e.g., generates pseudo-random numbers for use in at least one of encryption and decryption.
  • the mathematical system preferably has at least one positive Lyapunov exponent.
  • the present invention provides a method of performing numerical computations in a mathematical system comprising at least one function, the method comprising the steps of:
  • - positioning the imaginary decimal separator in the resulting number at a predetermined position by performing at least one of the steps of: - correcting the position of the imaginary decimal separator in the integer number, and - placing an imaginary separator in the resulting number.
  • the resulting number is usually a fixed-point number having a fixed position of the decimal separator.
  • the position of the decimal separator in the resulting number may be corrected after the computation has been completed.
  • a third possibility is to correct the position of the decimal separator before and after performing the computation. This may be relevant if not all positions to the left of the decimal separator in the resulting number are used, and it is desired to maintain a relatively higher resolution in the computations than the resolution of the resulting number.
  • the resulting number is desired to have a S(10.21) format.
  • the addition of, say, two S(7.24) format numbers may be performed in a S(8.23) format which then is converted to the S(10.21) format resulting number.
  • the carry from the second and third least significant bits in the arguments may influence the result.
  • no correction of the position of any decimal separator may be required or needed.
  • the correction of the position of a decimal separator are usually performed by means of shift operations.
  • the present invention provides a method of performing numerical computations in a mathematical system comprising at least one function, the method comprising the steps of:
  • - obtaining, from said computations, a resulting number, the resulting number representing at least one of: a. at least a part of a solution to the mathematical system, and b. a number usable in further computations involved in the numerical solution of the mathematical system.
  • the invention provides a circuit for performing numerical computations in a non-linear mathematical system comprising at least one function, the circuit being designed or programmed so that the mathematical system, in the circuit or in the computer program code, is represented in modified terms in such a way that at least a selected one of the numerical computations involves an integer operation, whereby said selected numerical computation in a non-modified representation of the mathematical system would require one or more floating point operations or controlling the positioning of a decimal separator in one or more fixed-point numbers, the circuit being designed or programmed so that said selected computation is substituted by at least one substitute computation on one or more integer numbers, whereby the mathematical system, in the circuit or in the computer program code, is represented in such a way that the at least one substitute computation requires no positioning of an imaginary decimal separator.
  • the mathematical system may exhibit chaotic behavior.
  • the invention also provides method of, in an electronic circuit, performing numerical computations in a non-linear mathematical system comprising at least one function, the method comprising, in the circuit or in a computer program segment according to which the circuit operates, the steps of: - representing the mathematical system in modified terms in such a way that at least a selected one of the numerical computations involves an integer operation, whereby said selected numerical computation in a non-modified representation of the mathematical system would require one or more floating point operations or controlling the positioning of a decimal separator in one or more fixed-point numbers, - substituting said selected computation by at least one substitute computation on one or more integer numbers, whereby the mathematical system, in the circuit or in the computer program code, is represented in such a way that the at least one substitute computation requires no positioning of an imaginary decimal separator, performing said substitute computation.
  • Fig. 1 is an illustration of a sequence for encrypting, transmitting and decrypting electronic data
  • Fig. 2 is an illustration of an encryption sequence in a block cipher system
  • Fig. 3 is an illustration of an encryption sequence in a stream cipher system
  • Fig. 4 is an illustration of the key elements in an encryption/decryption algorithm relying on various aspects of the invention
  • Fig. 5 is a plot of a numerical solution to a Lorenz system
  • Fig. 6 is an illustration of key extension by padding
  • Fig. 7 illustrates a possible method of simultaneously computing two or more instances of identical or different chaotic systems
  • Fig. 8 illustrates the principle of performing a check for periodic solutions
  • Fig. 9 shows a mathematical system with a period solution
  • Fig. 10 illustrates transport between levels in the coordinate cache which stores previously calculated coordinates
  • Figs. 11-13 illustrate various criteria for the detection of periodic solutions
  • Fig. 14 contains an illustration of a method for multiplication of 16-bit numbers on an 8-bit processor
  • Figs. 15-22 are flow charts showing the operation of one embodiment of an encryption method according to the present invention.
  • Fig. 1 is a general illustration of a sequence for encrypting, transmitting and decrypting digital data.
  • Fig. 2 is an illustration of an encryption sequence in a block cipher system
  • Fig. 3 is an illustration of an encryption sequence in a stream cipher system, block cipher and stream cipher systems being discussed in the above discussion of the background of the invention.
  • a method and algorithm for encrypting/decrypting data will now be described as a preferred embodiment of the various aspects of the invention.
  • the algorithm is applicable for most purposes in data encryption/decryption.
  • the nature of the algorithm favours encryption of data streams or other continuous data, such as large files, live or pre-recorded audio/video, copyrighted material (e.g. computer games or other software) and data for storage (e.g. backup and/or transportation).
  • the speed of the algorithm makes it particularly suitable for these purposes. Because of the calculation method, the algorithm is also useable on very small processors.
  • PSSRC Pseudo-Random Sequence Stream Cipher system
  • PSSRC systems are characterized by a pseudo-random number generator (the content of the outer boxes on Fig. 4), which generates a sequence of data, which is pseudo-random, based on a binary key.
  • This sequence the so-called keystream, cf. Fig. 4, is used for the encryption and decryption.
  • the keystream is unique for each possible key.
  • the integrity of the encrypted data is lying in the key capable of decrypting the ciphertext.
  • the basic design of the algorithm is using a key of at least 128 bit.
  • a key-size of 128 bit gives approximately
  • the algorithm uses a system, which exhibits chaotic behaviour, such as a Lorenz system, which consists of the following three ordinary differential equations: _ dx-root( ,,-, ⁇ ) dy
  • Fig. 5 shows a plot of a numerical solution to a Lorenz system.
  • the parameters are typically determined from a seed value, such as ah encryption key or a part of an encryption key.
  • algorithms embodying the method of the present invention are designed so that only parameter values within predefined intervals are made possible, whereby it is ensured that the probability of the system having a positive Lyapunov exponent is high. Accordingly, the mathematical system will have a high probability of exhibiting chaotic behavior.
  • the Lyapunov exponent may additionally or alternatively be determined at the beginning or during the mathematical computations, so as to be able to detect non-chaotic behavior of the solution to the mathematical system.
  • the mathematical system could as well be another continuous system (such as the R ⁇ ssler system) or a discrete map (such as the Henon map).
  • the integration is performed using a numerical integration routine.
  • the numerical integration routine calculates the solution at discrete mesh points, e.g. by using the Euler method or a Runge-Kutta method.
  • the continuous non-dependent variables (such as time t or space s) are discretized. This process refers to replacing the continuous interval [a;b] with a set of discrete points.
  • Fig. 7 illustrates a possible method of simultaneously computing two or more instances of the same system or different systems, such as chaotic systems.
  • the method confers higher computational speed and improved security, and a larger key may be used.
  • there should be some kind of communication or coupling between the two systems like for example exchange of step length, such as exchange of ⁇ t x , ⁇ t y , and/or ⁇ t z .
  • the internal variables are in the basic design 32 bits wide each, but any variable width could be used.
  • 192 bits (in the basic design) are used to represent an internal state of the generator given by a set of the internal variables.
  • the padding of the 128 bits key up to 192 bits should be done in such a way as to avoid illegal values, i.e. to ensure that all variables contain allowed values, and as to avoid that bits from the key are ignored.
  • the padding may include inserting predetermined values of zeros and ones or repetitions of bits from the key.
  • Fig. 6 contains an illustration of key extension by padding.
  • the integration may be performed with variable time steps, which e.g. can be calculated from any one of the state variables.
  • the step length ⁇ t varies in each integration step. This variation is coupled to the state variable X.
  • the keystream is extracted from some of the data related to the state variables. This may be done by extracting the 8 least significant bits from the y variable or by collecting some of the data wiped out in the calculations; e.g. from one or more of the multiplications performed in the calculation of one step.
  • the fixed-point variable is based on the integer data type; which is implemented identically on various computer systems. To express numbers, such as real numbers, digits after the decimal point are needed, the decimal point being artificially located somewhere else than at the end of the number (e.g. 12.345 instead of 12345).
  • Some of these tests are performed at run-time, and others are performed at design-time.
  • an amount of keystream equal to the complete data content of the state variables (e.g. 192 bits) or equal to the amount of a complete key (e.g. 128 bits) are generated using the algorithm and saved, in case the key has to be reloaded due to detection of periodic solutions or stationary points. In that case, the saved sequence is loaded as a new key, and the initialization, including extraction of extra key, is redone.
  • the complete data content of the state variables e.g. 192 bits
  • the amount of a complete key e.g. 128 bits
  • the present invention comprises an algorithm for detecting such periodic solutions .
  • This algorithm watches the sign of a variable or the slope of a variable.
  • the check is performed on x.
  • the position check is performed (the position check can also be performed after all iterations). The position check compares the complete set of state variables with buffered sets from earlier. If a complete match is found, a periodic solution is detected.
  • Stationary points of a dynamical system are sets of state variables which remain unchanged during iteration. Such stationary points may be detected by comparing the current set of state variables with the last set, or by checking if the slopes of all of the variables are zero or by checking if both the current slope of one variable and its previous slope are zero.
  • Chaotic systems may, for one reason or another, enter into periodic solutions. This has to be detected and corrected in order not to compromise the security of the system. If the solution of the system becomes periodic, encryption may preferably be stopped, as the extracted number from the solution of the mathematical system will also be periodic and hence not pseudo-random.
  • the test for periodic solutions includes comparing coordinates of the solution with previously calculated coordinates. If a complete match is found, the system has entered a periodic solution.
  • Fig. 8 illustrates the principle of performing a check for periodic solutions.
  • Fig. 9 shows a mathematical system with a period solution, more specifically a two- dimensional non-linear system with a periodic solution.
  • the system is deterministic meaning that the solution is completely specified by its initial conditions. In theory, the solution will be continuous, thereby consisting of infinite many points.
  • the time-interval is discretized, and the solution is calculated at these points.
  • the numerical solution to a mathematical system is simply a sequence of coordinate sets. If we consider a two-dimensional system, then the solution is specified at a number of points (x,y), illustrated by dots on the curve in Fig. 9.
  • the deterministic nature of the system implies that if the solution ever hits a point, which it has visited previously, the solution is periodic and will keep being periodic. This property is employed in the present test.
  • the coordinate sets are stored as they are calculated. This storage works like a queue and is referred to as the coordinate cache.
  • a calculated coordinate set is compared to every coordinate set in the coordinate cache. If a complete match (all values in the two coordinate sets are equal) is found, the system is in a periodic state. If the test is passed without a complete match, no periodic behavior is detected, and the calculations may continue. Before the calculations continue, the tested coordinate is added to the cache, for further comparisons.
  • the cache consists of a number of levels, each containing a coordinate of age growing by level. After each test or after a number of tests, the tested coordinate is inserted at level 0. Every second time (or any other time) a coordinate is inserted into level 0, the old value is inserted into level 1 before it is overwritten.
  • the method for inserting coordinates at the other levels is similar; every second time a value is inserted at any level, the old value is transported to the next level before it is overwritten at the current level.
  • This method results in a coordinate cache containing coordinates with an exponentially growing age.
  • Level 0 stores coordinates with an age of 1 or 2 (the prior checked coordinate or the one before the prior checked coordinate)
  • level 1 stores coordinates with an age of 3 - 6 (3 at the test after the coordinate has been inserted, and then growing to 6 before the next coordinate is inserted)
  • level 2 stores coordinates with an age of 7 - 14, and so on.
  • the pseudo program code in Example I shows how the cache may be implemented.
  • a periodic solution having a period length of 11 tests will be detected at level 2 of the cache, because the age of the data at level 2 is between 7 and 14. However, the test will not detect the periodic solution before the coordinate is exactly 11 tests old. Therefore up to 12 tests may be performed before the periodic behavior is detected. In this case, it means that the system may pass through up to 12/11 period before it is detected.
  • a possible expansion to the algorithm described above is a varying TransportAge, cf. the pseudo code program in Example I. If some coordinates can be identified as more likely to take part of a periodic solution then others, the InsertCoordinate procedure, cf. the pseudo code program in Example I, may recognize them, and use a reduced value of TransportAge for those. This will favor the critical coordinates in the cache, and make the data in cache become younger if many critical coordinates are stored. The younger age of data in the cache makes a periodical solution detectable after less iteration within the periodic solution.
  • the test may be performed after each iteration. That means every time we have calculated a new coordinate set of the solution. However, to save processor resources, the test should instead be performed at a periodic interval. I order to make the test work; the test must be performed when the solutions is at a recognizable position. One way to make sure the test is performed at the same position each time is to find a recognizable point in the graphical plot of the solution. To do so, the system has to be analyzed for its characteristic behavior, and a criterion has to be chosen. For the above shown non-linear system, the examples of criteria illustrated in Figs. 11-13 are useable.
  • First possible criterion as illustrated in Fig. 11 is change of sign of x from minus to plus. That is, when the sign of x changes from minus to plus, the test is performed.
  • the second criterion is change of sign of dx from plus to minus, as illustrated in Fig. 12.
  • the third criterion is change of dy from plus to minus, as illustrated in Fig. 13.
  • the following pseudo code program shows an example of a program for encrypting and decrypting data according to the invention which encrypts one byte at a time.
  • the program works in accordance with the flow charts of Figs. 15-22.
  • the program works with 32-bit registers.
  • Fig. 15 illustrates a method which encrypts a file containing data.
  • Figs. 16-22 correspond to those functions shown in the pseudo-code below which relate to check for periodic solution and to a stream-cipher using the Lorenz system.
  • FloatToFixedPoint Converts a floating-point number, X, into a fixed-point number.
  • the result of the function has the format S(a.b) or U(a.b) fixedpoint FloatToFixedPoint (float X)
  • FixedPointToFloat Converts a fixed-point number, X, having the format S(a.b) or U(a.b), into a floating-point number.
  • float FixedPointToFloat (fixedpoint X)
  • ConvertFixedPoint Converts an input fixed-point number, X, having the format S(a.b) or
  • MulFixedPoint Multiply two fixed-point numbers, X and Y.
  • X has the format S(a.b) or U(a.b) and Y has the format S(c.d) or U(c.d).
  • the resulting fixed-point number has the format S(e.f) or U(e.f).
  • the result as well as X and Y must all be either signed or unsigned values and stored in 32-bit registers.
  • ">>" is the arithmetic shift right for signed multiplication and logical shift right for unsigned multiplication.
  • fixedpoint MulFixedPoint (fixedpoint X, fixedpoint Y) ⁇ fixedpoint64 Temp; // A 6 -bit register to hold the intermediate
  • Temp X*Y; // Two 32-bit values X and Y are multiplied // into the 64-bit intermediate result return Temp » b+d-f; // b and d are the number of bits after the
  • the sub-system for checking for periodic solutions has a number of global variables e.g. to store the cache of old coordinates and the spare key to be loaded if a periodic solutions is found.
  • InsertCoordinate Inserts a coordinate at a certain level of the coordinate cache if the age of the previous values stored at that level has passed a certain threshold value. Before the old coordinate at that certain level is overwritten, is it inserted at the next level. void InsertCoordinate (fixedpoint x, fixedpoint y, fixedpoint z, int Level)
  • modulus function which takes an argument, q, returns a positive values in the range [0;q[.
  • Crypt Encryption, decryption and PRNG function.
  • Arguments are PData (pointer to the first byte to encrypt/decrypt) and PEnd (pointer to the last byte to encrypt/decrypt). If the function is intended to generate pseudo-random numbers, the function should be given an amount of data to encrypt (e.g. zeroes) of the same size as the requested pseudo-random data.
  • PData PData + 1; // increase the pointer to data to encrypt MaskParameters: To ensure that the initial state and the parameters are valid after loading an expanded key or a pseudo-random sequence, the state and parameters has to be modified using this function. The correction is performed according to the restrictions defined in table III. void MaskParameters ()
  • Initl92 Load a 192-bit seed (pointed to by the PSeed pointer) into the state of the system.
  • Initl28 Load a 128-bit seed (or key) (pointed to by the PSeed pointer) into the state of the system performing the key setup procedure.
  • Initl92 (Seedl92) ; // Load the pseudo-random data into the state
  • the statistical properties of the output of the system may be tested according to the NIST (National Institute of Standards and Technology) Test Suite, cf. ⁇ A statistical test suite for random and pseudo-random number generators for cryptographic applications', NIST Special Publication 800-22. See also http://csrc.nist.gov/rng/rng2.html.
  • the NIST Test Suite comprises sixteen different tests, which are briefly summarized below.
  • the tests may for example be performed on a program similar to the above pseudo-code for a stream cipher using the Lorenz system.
  • Frequency monobit test This test determines the proportion of zeroes and ones for the entire keystream sequence. For a truly random keystream sequence, the number of ones is expected to be about the same as the number of zeros. During the test, it is investigated whether this property holds for the keystream sequence in question.
  • Frequency block test In this test, the keystream sequence is divided into M-bit blocks. In a truly random keystream sequence, the number of ones in each block is approximately M/2. If this also characterizes the tested keystream sequence, the test is regarded as successful.
  • Runs test A run within the keystream sequence is defined as a sub-sequence of identical bits. The test checks for runs of different lengths, where a run of length k is constituted by k identical bits bounded by bits of a value opposite to the bits in the run. The occurrence of runs of different lengths is compared to what is expected for a truly random sequence.
  • Longest run of zeroes In this test, the sequence is divided into blocks of M bits each, and the longest run of ones within each block is found. The distribution of the lengths of runs for the blocks is compared to the distribution for blocks in a random sequence. An irregularity in the expected length of the longest run of ones indicates that there is also an irregularity in the expected length of the longest run of zeroes.
  • Binary matrix rank test In this test, fixed length sub-sequences of the keystream sequence are used to form a number of matrices by colllecting M-Q bit seggments into M by Q matrices. By calculating the rank of these matrices, the test checks for linear dependence among the sub-sequences.
  • Discrete Fourier transform test By applying the discrete Fourier transform, this test checks for periodic characteristics of the keystream sequence. The height of the resulting frequency components are compared to a threshold defined from a truly random sequence.
  • Non-overlapping template matching test When performing this test, a number of non- periodic m-bit patterns are defined, and the occurrences of the particular patterns are counted.
  • Overlapping template matching test This test is very similar to the non-overlapping template matching test, the only differences being the structure of the pattern of m bits, and the way the search for the pattern is performed.
  • the pattern of m bits is now a sequence of m ones.
  • Maurer's universal statistical test This test calculates the distance between matching patterns in the keystream sequence. By doing so, a measure of the compressibility of the keystream sequence is obtained. A significantly compressible keystream sequence is considered to be non-random.
  • Lempel-Ziv compression test In this test, the number of cumulatively distinct patterns is calculated, thus providing a measure of the compressibility of the keystream sequence. The result is compared to a random sequence, which has a characteristic number of distinct patterns.
  • Linear complexity test This test calculates the length of a linear feedback shift register in order to determine whether or not the sequence is complex enough to be considered random.
  • Serial test This test calculates the frequency of all possible overlapping m-bit patterns across the entire sequence. For a truly random keystream sequence, all of the 2 m possible m-bit patterns occur with the same probability. The deviation from this probability is calculated for the keystream sequence in question.
  • Approximate entropy test This test has the same focus as the serial test, but with the added feature that the frequencies of m- and (m+l)-bit patterns are calculated. The results obtained for the patterns of different length are compared and used to characterize the sequence as either random or non-random.
  • Cumulative sums test In this test, the sequence is used to define a random walk with ones and zeroes corresponding to +1 and -1, respectively. It is determined whether the amplitudes of the cumulative sums of the partial keystream sequences are too large or too small relative to what is expected for a truly random keystream sequence.
  • Random excursions test In this test, the sequence is similarly to the cumulative sums test transferred into a random walk. The number of visits to certain states (values the cumulative sum can hold), which the random walk potentially passes through, is used to characterize the sequence as either random or non-random. The considered states are -4, -3, -2, -1, 1, 2, 3, 4.
  • Random excursions variant test Almost identical to the random excursions test. Eighteen states are used in this test.
  • P va ⁇ For each test, a P-value, P va ⁇ , is calculated, which provides a quantitative comparison of the actual sequence and an assumed truly random sequence. The definitions of the P-values depend on the actual test (see the NIST documentation). Values of P va ⁇ > ⁇ indicate randomness, where is a value in the interval 0.001 ⁇ ⁇ ⁇ 0.01, the exact value of ⁇ being defined for each test. Otherwise, non-randomness is declared.
  • the NIST Test Suite defines, for each test, the proportion of samples, whose P-value should pass the criterion P va ⁇ > ⁇ . In all of the above tests, except the Random excursions test, the proportion of samples whose respective P-values, P va ⁇ , pass the appropriate criteria should be at least 0.972766. For the Random excursions test, the proportion given by NIST is at least 0.967813.
  • the following proportions are preferably achieved, as an average of at least 10 4 samples obtained by use of randomly chosen keys: at least 0.975, such as at least 0.98, such as at least 0.985, such as at least 0.99, such as at least 0.995, such as at least 0.998.
  • Table V shows the speed of encryption of a method according to the present invention as well as speeds of encryption of various known encryption methods.
  • the speed of the encryption method of the present invention was achieved in a prototype incorporating the features of the encryption/decryption program according to the invention.
  • the key size was a 256 bit key
  • the encryption/decryption speed was measured on a 400 MHz Pentium II processor by counting number of clock cycles spend on execution of the encryption/decryption algorithm.
  • the prototype of the algorithm was implemented in assembly language using MMXTM instructions on a system involving two instances, as exemplified in Fig. 7.
  • the prototype solved two Lorenz systems exhibiting chaotic behavior and extracted a total of 64 bit in each integration step, i.e. in each combined integration step of the two instances.
  • the prototype differed from the algorithm of the pseudo code program described in Example I with reference to Figs. 15-22 mainly in that:
  • the prototype utilized the MMXTM technology by solving two systems in parallel.
  • the prototype extracted a total of 64 bit in each integration step.
  • the speed was calculated to be equivalent to an encryption/decryption speed of 1010 Mbit/sec on a 450 MHz Pentium II processor.
  • Speed is estimated from different sources.
  • the superscripts in the "Speed [clocks/byte]" column of Table V refers to the below source references: 1. Crypto++ 4.0 Benchmarks, www.eskimo.com/ ⁇ weidai/benchmarks.html, MS C++ (Intel Celeron 850MHz), available on 7 December 2001.
  • Kazumaro Aoki et al. Fast Implementation of AES Candidates (128 bit keys, 128 bit blocks, Pentium II).
  • speed and memory can be traded for many of the implementations, e.g. by using lookup tables which require more memory but may save processing time.
  • the present invention relates to a method for performing mathematical operations on integer numbers of a certain bit width which is larger than the register width of the processing unit on which the computations are performed.
  • Mathematical operations or computations on fixed-point numbers are performed as integer operations, whereby the integer numbers are expressed as binary numbers.
  • the binary representation of integer numbers requires a certain register width, e.g. 32 bit.
  • the binary numbers may be split into a plurality of binary sub-numbers, each represented by a width equal to or smaller than the register width of the processing unit.
  • two 32 bit numbers may be split into two sets of four 8 bit sub-numbers, and multiplication or addition may be performed on the 8 bit sub-numbers by means of an 8 bit processing unit.
  • Each of the numbers A and B is split into four sub-numbers, Al, A2, A3, A4, and BI, B2, B3, and B4.
  • Al represents the 8 most significant bits of the number A
  • A4 represents the 8 least significant bits of the number A, etc.
  • the number resulting from the addition of A and B is stored as four sub-numbers, Rl, R2, R3 and R4, and/or represented by a 32 bit wide string built from the sub-numbers Rl, R2, R3, and R4.
  • processing time in connection with multiplication operations on a processing unit having a register width smaller than the bit width of the numbers to be multiplied may be reduced by performing only partial multiplication as explained below.
  • Dl represents the 8 most significant bits of D
  • D2 represents the 8 least significant bits of D
  • the sub-numbers are:
  • Dl is multiplied with El to achieve a 16 bit number expressed as two 8 bit numbers, Gl and G2.
  • Dl is multiplied with E2 to achieve a 16 bit number expressed as two 8 bit numbers, HI and H2.
  • D2 is multiplied with El to achieve a 16 bit number expressed as two 8 bit numbers, II and 12.
  • D2 is multiplied with E2 to achieve a 16 bit number expressed as two 8 bit numbers, Jl and J2.
  • F2 G2+Hl+Il+[any carry resulting from the calculation of F3]
  • Fl Gl+[any carry resulting from the calculation of F2], as illustrated in Fig. 14 wherein MS denotes "most significant 8 bit” and LS denotes "least significant 8 bit”.
  • Processing time may be saved by disregarding F4, i.e. the least significant bits of the number resulting from the multiplication, and by disregarding Jl in the addition which leads to F3.
  • the multiplication of D2 with E2 at step 5 may be omitted, whereby less mathematical operations are performed, which leads to saving of processing time. This omission has an impact on the computational result which, however, may be acceptable if the omission is performed consistently throughout the computations in, e.g.
  • a pseudorandom number generator e.g. in , an encryption/decryption algorithm, and if it is performed both in decryption and encryption. It should usually be ensured that properties of the mathematical system, e.g. chaotic behavior, which are of importance in the context in question, e.g. encryption/decryption, are maintained in spite of the impact which the omission of one or more computational steps has on the computations.
  • the invention relates to a method of performing multiplication operations on a first binary number and a second binary number.
  • the method comprises summing a number of intermediate results, whereby the sum of the intermediate results is equal to the product of the two numbers.
  • the intermediate number is shifted a number of positions to the left, the number of positions corresponding to the position of the bit of the first number from which that particular intermediate number is calculated.
  • either the second number or the particular bit of the first number is switched to the left.
  • the step of multiplying one bit of a first one of the two numbers is repeated for each bit of the first number.
  • the product of a first number, 0110, and a second number 1010 is computed as follows: the least significant bit of the first number, 0, is multiplied with the second number 1010 to obtain a first intermediate number, 0000.
  • the second least significant bit of the first number, 1, is multiplied with the second number and shifted one position to the left to obtain a second intermediate number, 10100.
  • the third least significant bit of the first number, 1, is multiplied with the second number and shifted two positions to the left to obtain a third intermediate number, 101000.
  • the most significant bit of the first number, 0, is multiplied with the second number and shifted three positions to the left to obtain a fourth intermediate number, 0000000.
  • the resulting number is obtained as a sum of the four intermediate numbers, as illustrated below, the underiinings indicating which bits are being multiplied in the individual steps: 0110 ⁇ 1010 ⁇ 0000 (first intermediate number)

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Abstract

L'invention concerne un procédé permettant d'effectuer des calculs numériques dans un système mathématique, et consistant à exprimer ce système mathématique dans des termes discrets, à utiliser des variables en virgule fixe dans des calculs et à extraire un sous-ensemble de chiffres d'un nombre. Le sous-ensemble de chiffres peut représenter un nombre aléatoire ou pseudo-aléatoire. Le système mathématique peut être un système d'équations différentielles non linéaires, tel qu'un système chaotique, par exemple un système présentant un exposant de Lyapunov positif, ou un mappage discret, tel qu'une application logistique, une application d'Anosov ou une application de Hénon. Le procédé peut être appliqué à des algorithmes de cryptage et de décryptage, y compris des cryptages continus et des cryptages par blocs, des systèmes permettant de générer une signature numérique, des fonctions de condensation et des fonctions MAC (code d'authentification de message). L'invention concerne également un système permettant de tester le comportement périodique d'une solution du système mathématique.
EP01270019A 2000-12-07 2001-12-07 Procede permettant d'effectuer des operations mathematiques dans un dispositif electronique, procede permettant de generer des nombres pseudo-aleatoires dans un dispositif electronique et procede permettant de crypter et de decrypter des donnees electroniques Withdrawn EP1360767A2 (fr)

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