EP1350327A1 - Procede et dispositif de codage ou de decodage - Google Patents

Procede et dispositif de codage ou de decodage

Info

Publication number
EP1350327A1
EP1350327A1 EP01991699A EP01991699A EP1350327A1 EP 1350327 A1 EP1350327 A1 EP 1350327A1 EP 01991699 A EP01991699 A EP 01991699A EP 01991699 A EP01991699 A EP 01991699A EP 1350327 A1 EP1350327 A1 EP 1350327A1
Authority
EP
European Patent Office
Prior art keywords
bits
information
bit
coding
information bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP01991699A
Other languages
German (de)
English (en)
Inventor
Tim Fingscheidt
Matthias Marke
Wen Xu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP1350327A1 publication Critical patent/EP1350327A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/23Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63Joint error correction and other techniques
    • H03M13/635Error control coding in combination with rate matching
    • H03M13/6356Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3994Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using state pinning or decision forcing, i.e. the decoded sequence is forced through a particular trellis state or a particular set of trellis states or a particular decoded symbol

Definitions

  • the invention relates to a method and an arrangement for coding an information bit sequence as well as a method and an arrangement for decoding, which are used in particular in the context of multi-rate coding.
  • Source signals or source information such as voice, sound,
  • Image and video signals almost always contain statistical redundancy, i.e. redundant information.
  • This redundancy can be greatly reduced by source coding, so that an efficient transmission or storage of the source signal is made possible.
  • This reduction in redundancy eliminates redundant signal contents based on the prior knowledge of e.g. statistical parameters of the signal curve are based. After the transmission, these parts are added to the signal again during source decoding, so that there is little or no loss of quality.
  • the bit rate of the source-coded information which is composed of so-called net bits, is also called the net bit rate.
  • channel coding it is customary to add redundancy by channel coding to the information bits resulting from the source coding in order to largely recognize and possibly also correct the influence of the transmission on channel interference in the receiver or in the decoder.
  • a predetermined number NK of redundant error protection bits is added to a predetermined number K of information bits or net bits, resulting in N so-called code bits or gross bits, which before finally being transmitted over the disturbed transmission channel.
  • the bit rate of the channel-coded information, ie the gross bits, is also called the gross bit rate.
  • a simple type of channel coding is to simply repeat the information bits to be transmitted.
  • newer channel coding methods which are also known per se, are based on convolutional coding.
  • ratio of the gross bit rate to the net bit rate is often around 2: 1, which enables efficient channel coding and decoding.
  • adaptive source and / or channel coding including adaptive decoding has been proposed, which should make it possible to source signals depending on the quality requirements of the information transmission or depending on the transmission conditions within the framework of a To remove source coding more or less redundant information and / or to add more or less redundant information as part of a channel coding for error protection.
  • AMR Adaptive Multirate
  • Such multi-rate coding methods are also described by their associated code modes and channel modes. Different code modes have different net bit rates, whereas different channel modes have different gross bit rates. Different code modes can exist within a channel mode.
  • such a multi-rate coding method can work in good half-channel (HR) channel mode under good channel conditions and / or in highly utilized radio cells. Under poor channel conditions and / or in low-capacity radio cells, the system should switch dynamically to the fill rate (FR) channel mode and vice versa.
  • the gross bit rate after the channel coding is constant, for example, within a channel mode; for example in the fill rate (FR) channel mode it is 22.8 kbit / sec. and in Half Rate (HR) channel mode 11.4 Kbit / sec. Since the gross bit rate with a variable net bit rate within a channel mode should be uniform after the channel coding, the channel coding is adapted accordingly and the information bits during the channel coding have a correspondingly adapted variable number of errors. protection bits added. It is also known to carry out convolutional coding in the context of multi-rate coding.
  • the rate adaptation from the net bit rate to the desired gross bit rate can be carried out by puncturing and / or repeating bits and / or inserting previously known dummy bits together with or as part of the channel coding.
  • the invention is based on the problem of specifying a method and an arrangement for coding or for decoding which makes it possible to transmit information sequences with a variable net bit rate with good quality and little effort.
  • At least one deliberately selected information bit sequence with a low net bit rate which results from a source coding with a variable net bit rate, is added as error protection bits to at least known dummy bits at previously known bit positions of the information bit sequence in order to generate one or more uniform gross bit rates.
  • "Variable net bit rate” also means at least two different adjustable net bit rates.
  • the information bit sequences with a low net bit rate also include a bit sequence (case 1) or not (case 2) representing the background noise of a DTX (discontinous transmission) mode.
  • a bit sequence (case 1) or not (case 2) representing the background noise of a DTX (discontinous transmission) mode.
  • DTX discrete transmission
  • the use of a DTX (discontinous transmission) mode in speech processing to reduce interference and power consumption is known as such. For example, if dummy bits are to be added to the two information bit sequences with the two lowest net bit rates, this means in case 1 that this is the background noise of a DTX
  • the invention in particular the targeted and selective use of the insertion of previously known dummy bits for rate adaptation in multi-rate coding, is based on simulation results which were determined by means of complex simulation tools which were created especially for this purpose. In these simulations, it was found that the insertion of dummy bits for the purpose of rate adaptation in the context of multi-rate coding is particularly advantageous if at least the
  • Information bit sequences with the lowest non-zero net bit rate in particular only the information bit sequence with the lowest non-zero net bit rate, at least known dummy bits are added to known bit positions of the information bit sequence as error protection bits. No dummy bits for rate adaptation are added to the information bit sequences with higher net bit rates; The rate adaptation for these information bit sequences can take place in another way. Depending on the net bit rate of the information bit sequence, a switch is made between different rate adaptation methods.
  • the information bit sequences to which dummy bits have been added for error protection are convolutionally coded, a systematic or recursive-systematic code being used for the convolutional coding, and after the convolutional coding, the bits systematic for the dummy bits are at least partially be removed.
  • This has the advantage that the dummy bits are processed in order to achieve better error protection in the convolutional coding, but the resulting systematic bits, which can be found in the convolutionally coded bit sequence, do not have to be transmitted because their value and position are received is previously known and therefore these previously known systematic bits can be inserted into the received bit sequence at the previously known positions before the convolutional decoding.
  • a particularly advantageous embodiment variant of the invention or one of its further developments, as was shown in the above-mentioned simulations, provides for dummy bits to be added to the rate adaptation only if the gross bit rate to be implemented is particularly large, in particular if the gross bit rate to be implemented is largest of the gross bit rates occurring within the multi-rate coding. For example, dummy bits are only added to the two information bit sequences with the lowest or the two lowest net bit rates if their net bit rate is to be converted into the largest or second largest gross bit rate occurring within the multi-rate coding.
  • the rate adaptation is determined in further refinements
  • Information bit sequences with certain selected net bit rates are not only realized by adding dummy bits as described above, but are also punctured or repeated before or after the addition of dummy bits.
  • Information about the addition of dummy bits is used as a priori information for decoding an information bit sequence coded according to one of the abovementioned methods.
  • an arrangement for coding and an arrangement for decoding are also specified, which are set up in particular to carry out the method according to the invention or one of its developments.
  • Figure 1 simplified flow diagram of a method for multi-rate coding
  • Figure 2 block diagram of a processor device.
  • FIG. 1 shows multi-rate coding on the basis of a simplified scheme of a message transmission chain.
  • source signals are first compressed in the context of a source coding QC into information bit sequences of variable net bit rate nbr.
  • the different net bit rates from 6.8kbps to 24.0 kbps generated by the variable source coding characterize different code modes cml - cm8.
  • the information bit sequences with a variable net bit rate become one by means of various channel coding methods KC0 -KC19 Channel coding KC subjected, the component of which may be the rate adaptation according to the invention.
  • the channel coding KC converts the variable net bit rates into one or more uniform gross bit rates, which in turn characterize different channel modes km1 - km3.
  • bit sequences or code bits which are coded in this way, are further processed in a modulator (not shown) and then transmitted via a transmission link CH. Interference such as fading or noise occurs during transmission.
  • the transmission path CH lies between the transmitter and a receiver.
  • the receiver E optionally contains an antenna, not shown, for receiving the signals transmitted via the transmission link CH, a sampling device, a demodulator for demodulating the signals and an equalizer for eliminating the intersymbol interference. For simplification reasons, these facilities were not shown in FIG. 1 either. Possible interleaving and deinterleaving is also not shown.
  • An equalizer outputs reception values of a reception sequence. The received values have values' which deviate from "+1" and "-l" due to the disturbances in the transmission over the transmission link CH. Finally, in a channel decoder, the channel coding is undone.
  • the Viterbi algorithm is advantageously used for decoding convolutional codes.
  • the following is based on the first channel mode kml with a gross bit rate of 68 kbps, within which eight (shown) or nine (not shown) code modes cml, cm2 - cm8 with variable net bit rate of 6.8 kbps, 8.0 kbps, 10.0 kbps - 24.0 kbps are implemented , the coding in more detail wrote.
  • the gross bitrate of 68 kbps is the largest gross bitrate that occurs within multi-rate coding.
  • the remaining code modes or the corresponding information bit sequences are brought to 68 kbps gross bit rate by means of gross bit repetition and reception-side addition or simply by means of convolutional coding and puncturing; there is no provision for dummy bits known a priori.
  • This transmission-side coding with an effective total rate 1/10 of the code mode with the lowest net bit rate of 6.8 kbps is illustrated using the following scheme, the following abbreviations being used: apbB: bit known a priori; FC: convolutional coding; a, b: information bits; 0: apbB; ?: redundant bit due to convolutional coding.
  • apbB bit known a priori
  • A, B information bits
  • 0 Software for apbB
  • ? unknown software
  • 0 decoded apbB
  • FD convolutional decoding
  • the convolutional decoder is operated at three times the net bit rate due to the addition of the a priori known bits (dummy bits), which means an increase in complexity. It is therefore provided that dummy bits are inserted only in low-rate code modes. For example, in the example described, the three times the net bit rate of the lowest rate code with 3 * 6.8 kbps still corresponds approximately to the net bit rate and thus the decoding complexity of the highest rate code mode of 24 kbps.
  • the AMR-WB speech codec Adaptive Multirate Wideband
  • the EDGE / GERAN half rate channel in connection with the AMR speech codec (narrowband).
  • the AMR-WB speech codec has net bit rates between about 6 kbps and about 24 kbps, while the gross bit rate in the EDGE / GER N full rate channel is about 68 kbps.
  • FIG. 2 shows a program-controlled processor device PE, such as a microcontroller, which can also include a processor CPU and a memory device SPE.
  • Processor device PE which can be contained in particular in a communication device, such as a base station or a mobile station, is set up to carry out the methods explained above.
  • further components such as a digital signal processor or further memory devices, the basic function of which is associated with a processor, can be arranged inside or outside the processor device PE, such as a digital signal processor or other memory devices, which are assigned to the processor device, belong to the processor device, are controlled by the processor device or control the processor device
  • Processor device for controlling a mobile station is sufficiently known to a person skilled in the art, and which is therefore not dealt with in more detail at this point.
  • the different components can exchange data with the processor CPU via a bus system BUS or the input / output interfaces and, if appropriate, suitable controllers.
  • the memory device SPE which can also be one or more volatile and / or non-volatile memory modules, or parts the storage device SPE as part of the processor device
  • PE (shown in the figure) can be implemented or can be implemented as an external memory device (not shown in the figure) which is located outside the processor device PE and is connected to the processor device PE by means of suitable interfaces or a suitable bus system.
  • the program data such as, for example, the control commands or control procedures that are used to control the execution of the above-described methods, are stored in the storage device SPE.

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  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)

Abstract

Au moins des bits factices préalablement connus et disposés en des emplacements de bits préalablement connus d'une séquence de bits d'information sont ajoutés, en tant que bits de protection d'erreurs, à au moins la séquence de bits d'information ayant le débit net de bits le plus faible qui émerge d'un codage de source ayant un débit net variable de bits.
EP01991699A 2001-01-09 2001-12-27 Procede et dispositif de codage ou de decodage Withdrawn EP1350327A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10100614 2001-01-09
DE2001100614 DE10100614A1 (de) 2001-01-09 2001-01-09 Verfahren und Anordnung zur Codierung bzw. Decodierung
PCT/DE2001/004933 WO2002056479A1 (fr) 2001-01-09 2001-12-27 Procede et dispositif de codage ou de decodage

Publications (1)

Publication Number Publication Date
EP1350327A1 true EP1350327A1 (fr) 2003-10-08

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EP01991699A Withdrawn EP1350327A1 (fr) 2001-01-09 2001-12-27 Procede et dispositif de codage ou de decodage

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EP (1) EP1350327A1 (fr)
DE (1) DE10100614A1 (fr)
WO (1) WO2002056479A1 (fr)

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Publication number Priority date Publication date Assignee Title
JP4563476B2 (ja) * 2008-07-09 2010-10-13 パナソニック株式会社 符号化器、復号化器及び符号化方法

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Publication number Priority date Publication date Assignee Title
DE3724729A1 (de) * 1987-07-25 1989-02-02 Ant Nachrichtentech Verfahren zur aufbereitung eines faltungscodes zur uebertragung sowie dessen empfangsseitige rueckwandlung sowie anordnung hierzu

Non-Patent Citations (1)

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Publication number Publication date
WO2002056479A1 (fr) 2002-07-18
DE10100614A1 (de) 2002-07-11

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