EP1336136B1 - Method for adjusting a bgr circuit - Google Patents

Method for adjusting a bgr circuit Download PDF

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Publication number
EP1336136B1
EP1336136B1 EP01997727A EP01997727A EP1336136B1 EP 1336136 B1 EP1336136 B1 EP 1336136B1 EP 01997727 A EP01997727 A EP 01997727A EP 01997727 A EP01997727 A EP 01997727A EP 1336136 B1 EP1336136 B1 EP 1336136B1
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EP
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Prior art keywords
voltage
differential amplifier
circuit
voltage differential
reference voltage
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German (de)
French (fr)
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EP1336136A1 (en
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Martin Leifhelm
Markus Müllauer
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Infineon Technologies AG
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Infineon Technologies AG
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

Definitions

  • the invention relates to a method for comparing a BGR circuit and one that can be compared according to the method BGR circuit.
  • Circuits which are one of temperature and supply voltage fluctuations generate independent, constant output voltage, are becoming more diverse in semiconductor circuit technology Way needed. They are both in analog, digital as well as used in analog-digital mixed circuits.
  • a common type of such circuits are the so-called BGR circuits (band gap reference circuits).
  • the basic principle of a BGR circuit is two Partial signals (voltages or currents) that are opposite Have temperature behavior to add. During one of the both partial signals falls with increasing temperature, increases the other partial signal with increasing temperature. From the The sum of the two partial signals is then over a certain Range derived from constant temperature output voltage.
  • the output voltage of a BGR circuit is made according to the usual Language usage in the following also as reference voltage designated.
  • a known problem with BGR circuits is that circuits of the same series are different Have reference voltages. It is therefore common in practice required the BGR circuit to achieve one sufficient accuracy with regard to the desired absolute Reference voltage value and / or the desired temperature constancy the reference voltage.
  • BGR circuits have both passive components, e.g. resistors, as well as active components, mostly in the form of a Differential or operational amplifier. A deviation from the Reference voltage from the ideal, calculated value and from a constant temperature behavior goes to a lack Adaptation of passive and active components.
  • the goal of balancing a BGR circuit is to on the one hand a deviation of at a certain temperature obtained reference voltage value from a with respect to minimize this temperature calculated value and on the other hand the temperature characteristic of the reference voltage optimize, i.e. a flat voltage-temperature characteristic to obtain.
  • offset compensation is used directly on the amplifier generating the offset.
  • Most operational amplifiers have suitable ones for this Control inputs.
  • Through offset compensation becomes the dominant error portion of the deviation between the reference voltage value obtained at the output of the circuit and the calculated value is eliminated.
  • the disadvantage is that there is usually a residual deviation of the sizes mentioned remains and that no optimal temperature characteristics the reference voltage is obtained, but on the contrary often the temperature characteristic through this step even is deteriorating.
  • the output voltage of the circuit i.e. the reference voltage
  • the circuit is set directly to the calculated value. This way, at the temperature at which the setting the correct voltage value is achieved.
  • U.S. Patent No. 6,118,264 A is a BGR circuit described with a balancing device is connected.
  • the balancing device generates a compensation voltage, which on the from the BGR circuit provided BGR voltage is added, creating a reference voltage is produced.
  • the compensation voltage has over certain temperature ranges to the BGR voltage opposite temperature characteristics. Total results this results in an improved temperature characteristic of the reference voltage.
  • the invention is based, an easy to carry out the task To specify adjustment procedures for BGR circuits, with which there is a good temperature stability of the reference voltage and a good match of the reference voltage value with an expected or calculated voltage value let achieve.
  • the invention further aims to provide one easy to match BGR circuitry.
  • the adjustment method according to the invention comprises Claim 1 two consecutive adjustment steps: In a first adjustment step, an offset adjustment is carried out of the voltage difference amplifier at a predetermined temperature carried out. In a second adjustment step then the value of the reference voltage, which at the first Matching step has been obtained to the predetermined (i.e. calculated) value of the reference voltage for this circuit set.
  • the particular advantage of the method according to the invention lies in that the two adjustment steps in one and the same Temperature are carried out and (nevertheless) an adjustment both in terms of the absolute value and the Temperature characteristic of the reference voltage obtained becomes.
  • voltage differential amplifier is every type an amplifier meant to amplify a voltage difference is designed.
  • the term includes a differential amplifier and an operational amplifier.
  • Step the partial steps of short-circuiting the inputs of the voltage differential amplifier and regulating the output voltage of the Differential voltage amplifier to a predetermined voltage value includes.
  • the specified voltage value can in particular be the common mode voltage, which is the mean of the positive and negative potential the operating voltage of the voltage differential amplifier is.
  • the voltage difference amplifier is used for the offset adjustment preferably operated as a comparator.
  • the inputs of the voltage differential amplifier through the Disconnect the first switching means from the external circuit and short circuit by the second switching means can then short-circuit compensation of the voltage difference amplifier for offset correction become. Then the inputs of the Differential voltage amplifier by the first switching means reconnect to the external wiring and the short circuit the inputs can be canceled by the second switching means become.
  • the circuit can now by adjusting the resistance of the at least one Component with adjustable resistance to balance the Output voltage of the circuit to the specified value Reference voltage can be carried out. Through this comparison is caused to be within a certain range around the predetermined Temperature around an almost constant, i.e. temperature-independent Sets reference voltage.
  • 1A and 1B illustrate the two essential effects, the for the occurrence of discrepancies between the received Reference voltage and the calculated reference voltage are responsible.
  • Fig. 1A shows the case where that of an unbalanced one BGR circuit output reference voltage plotted on the Y axis over the entire temperature range considered (X-axis) either higher (reference voltage curve RS +) or lower (reference voltage curve RS-) than the calculated one ideal reference voltage curve RS0 runs, but with respect on their temperature behavior an optimally flat and regarding the room or operating temperature TR symmetrical course having.
  • This effect is mainly due to a Offset in the voltage differential amplifier causes. He will be in hereinafter referred to as offset error and is usually the dominant proportion of errors in unbalanced BGR circuits.
  • Fig. 1B shows the case where the reference voltage is either a characteristic increasing with increasing temperature (Reference voltage curve RSd +) or one with increasing temperature falling characteristic (reference voltage curve RSd-) having. This effect is mainly due to a lack of adjustment of the passive components of the BGR circuit. In the following, it is also called a temperature characteristic error designated.
  • the reference voltage curve RSOT is both with an offset error as well as a temperature characteristic error afflicted.
  • the offset error is eliminated so that the reference voltage curve RSOT parallel to the X axis in the direction of calculated ideal reference voltage curve RS0 shifted becomes.
  • this step does not result in the optimal one Temperature characteristic (i.e. the resulting reference voltage curve RST differs in their temperature characteristics still from the calculated ideal reference voltage curve RS0) because the errors of the passive components of the BGR circuit cannot be compensated.
  • FIG. 3 illustrates the second adjustment step according to the invention AS2.
  • AS2 the temperature characteristic error the reference voltage curve RST is eliminated by an adjustment the reference voltage to the specified value of the reference voltage performed at room or operating temperature TR becomes.
  • This will make the temperature characteristic of the reference voltage curve RST to the calculated ideal reference voltage curve RS0 adjusted so that both reference voltage curves then have the same course.
  • Fig. 4 shows a BGR circuit according to the invention, which suitable for carrying out the method according to the invention and is designed.
  • the inverting input of an operational amplifier OP1 is via a switch S1 with a node K1 of a first circuit branch of an external circuit of the operational amplifier OP1 connected.
  • the non-inverting Input of the operational amplifier OP1 is via a switch S2 with a node K2 of a second Circuit branch of the external circuitry of the operational amplifier OP1 in connection.
  • the two circuit branches extend each have a common fixed potential, especially a mass VSS, up to a common node K3. From there they are connected to the output via a switch S3 of the operational amplifier OP1 connected.
  • the first circuit branch points between the nodes K1 and the common node K3 has a resistor R1.
  • the second Circuit branch is located between nodes K2 and K3 a resistor R2.
  • the node K1 is above an adjustable resistor R0 with the collector terminal of a bipolar transistor T1 of the first circuit branch in connection.
  • the basic connection of the bipolar transistor T1 is also with its Collector connection connected while the emitter connection lies on the ground VSS.
  • the node K2 is with the collector and the emitter terminal of a bipolar transistor T2 of the second Circuit branch connected.
  • the emitter connection of the bipolar transistor T2 is again on the ground VSS.
  • the inverting and the non-inverting input of the Operational amplifiers OP1 can be switched via a switch S4 short.
  • the constant voltage source shown in Fig. 4 Vdc represents the common mode voltage, which by the mean of the operating voltage potentials is given.
  • At the A reference voltage can be output from the operational amplifier OP1 Tap Vref.
  • At the connections of the operational amplifier OP1 for offset adjustment is an adjustable one Roffset resistance on.
  • Ic1 Collector current of the bipolar transistor T1 Ic2 Collector current of the bipolar transistor T2 Vbe1 Base-emitter voltage of the bipolar transistor T1 be2 Base-emitter voltage of the bipolar transistor T2 VR0 Voltage dropping at the adjustable resistor R0 VR1 Voltage drop across resistor R1 VR2 Voltage drop across resistor R2
  • Vref VR2 + Vbe2
  • the one falling at a bipolar transistor between the base and emitter Voltage has a temperature dependency.
  • To a temperature stabilized To get reference voltage Vref must the base-emitter voltage is a voltage with absolute value same temperature coefficient, but opposite Signs are added. That means that the resistance R2 falling voltage VR2 at a temperature of 300 K have a temperature coefficient of +2 mV / K got to. This temperature dependent voltage is with the help of the bipolar transistor T1 generated.
  • Equation (5) represents the voltage VR2.
  • Isx stands for the reverse current of the respective bipolar transistor T1 or T2.
  • T temperature voltage
  • VT k * T / q
  • k denotes the Boltzmann constant (1.38 * 10 -23 J / K) and q the elementary charge (1.6 * 10 -19 C).
  • the base-emitter voltage shows Vbe2 has a temperature coefficient of -2 mV / K. From equation (7) it follows that the temperature voltage VT has a temperature coefficient of +0.086 mV / K.
  • suitable resistors R0, R1 and R2 Summand of the right side of equation (11) designed in this way that it has a temperature coefficient of +2 mV / K.
  • the BGR circuit according to the invention creates two tensions, the opposite, but have equal magnitude temperature coefficients. By adding these two tensions one a temperature stabilized reference voltage. by virtue of of inhomogeneities among the same components that are used for the different BGR circuits from the same series are used, there are deviations from the ideal Value of the reference voltage and the ideal temperature behavior the reference voltage.
  • the BGR circuit according to the invention allows such inhomogeneities by voltage balancing both the operational amplifier used and the to compensate for built-in resistances.

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Description

Die Erfindung betrifft ein Verfahren zum Abgleichen eines BGR-Schaltkreises sowie einen nach dem Verfahren abgleichbaren BGR-Schaltkreis.The invention relates to a method for comparing a BGR circuit and one that can be compared according to the method BGR circuit.

Schaltungen, welche eine von Temperatur- und Versorgungsspannungsschwankungen unabhängige, konstante Ausgangsspannung erzeugen, werden in der Halbleiterschaltungstechnik in vielfältiger Weise benötigt. Sie werden sowohl in analogen, digitalen als auch in analog-digital-gemischten Schaltkreisen eingesetzt. Ein häufig verwendeter Typ solcher Schaltungen sind die sogenannten BGR-Schaltkreise (Bandgap-Reference-Schaltkreise).Circuits which are one of temperature and supply voltage fluctuations generate independent, constant output voltage, are becoming more diverse in semiconductor circuit technology Way needed. They are both in analog, digital as well as used in analog-digital mixed circuits. A common type of such circuits are the so-called BGR circuits (band gap reference circuits).

Das Grundprinzip eines BGR-Schaltkreises besteht darin, zwei Teilsignale (Spannungen oder Ströme), die ein gegenläufiges Temperaturverhalten aufweisen, zu addieren. Während eines der beiden Teilsignale mit zunehmender Temperatur fällt, steigt das andere Teilsignal mit zunehmender Temperatur an. Aus der Summe der beiden Teilsignale wird dann die über einen gewissen Bereich temperaturkonstante Ausgangsspannung abgeleitet. Die Ausgangsspannung eines BGR-Schaltkreises wird gemäß üblichem Sprachgebrauch im folgenden auch als Referenzspannung bezeichnet.The basic principle of a BGR circuit is two Partial signals (voltages or currents) that are opposite Have temperature behavior to add. During one of the both partial signals falls with increasing temperature, increases the other partial signal with increasing temperature. From the The sum of the two partial signals is then over a certain Range derived from constant temperature output voltage. The output voltage of a BGR circuit is made according to the usual Language usage in the following also as reference voltage designated.

Ein bei BGR-Schaltkreisen bekanntes Problem besteht darin, daß Schaltkreise derselben Herstellungsreihe unterschiedliche Referenzspannungen aufweisen. In der Praxis ist es daher häufig erforderlich, den BGR-Schaltkreis zur Erzielung einer ausreichenden Genauigkeit hinsichtlich des gewünschten absoluten Referenzspannungswerts und/oder der gewünschten Temperaturkonstanz der Referenzspannung abzugleichen. A known problem with BGR circuits is that circuits of the same series are different Have reference voltages. It is therefore common in practice required the BGR circuit to achieve one sufficient accuracy with regard to the desired absolute Reference voltage value and / or the desired temperature constancy the reference voltage.

BGR-Schaltkreise weisen sowohl passive Bauelemente, z.B. Widerstände, als auch aktive Bauelemente, zumeist in Form eines Differenz- oder Operationsverstärkers, auf. Ein Abweichen der Referenzspannung von dem idealen, berechneten Wert und von einem konstanten Temperaturverhalten geht auf eine fehlende Anpassung der passiven und aktiven Bauelemente zurück.BGR circuits have both passive components, e.g. resistors, as well as active components, mostly in the form of a Differential or operational amplifier. A deviation from the Reference voltage from the ideal, calculated value and from a constant temperature behavior goes to a lack Adaptation of passive and active components.

Das Ziel eines Abgleichs eines BGR-Schaltkreises besteht darin, einerseits eine Abweichung des bei einer bestimmten Temperatur erhaltenen Referenzspannungswerts von einem bezüglich dieser Temperatur berechneten Wert zu minimieren und andererseits die Temperaturcharakteristik der Referenzspannung zu optimieren, d.h. eine flache Spannungs-Temperatur-Kennlinie zu erhalten.The goal of balancing a BGR circuit is to on the one hand a deviation of at a certain temperature obtained reference voltage value from a with respect to minimize this temperature calculated value and on the other hand the temperature characteristic of the reference voltage optimize, i.e. a flat voltage-temperature characteristic to obtain.

Zum Abgleichen von BGR-Schaltkreisen sind bisher die folgenden Verfahren bekannt:So far, the following have been used to align BGR circuits Process known:

Bei einem ersten bekannten Verfahren wird eine Offset-Kompensation direkt an dem den Offset erzeugenden Verstärker vorgenommen. Die meisten Operationsverstärker weisen hierfür geeignete Stelleingänge auf. Durch eine Offset-Kompensation wird der dominierende Fehleranteil der Abweichung zwischen dem am Ausgang der Schaltung erhaltenen Referenzspannungswert und dem berechneten Wert eliminiert. Nachteilig ist jedoch, daß in der Regel eine Restabweichung der genannten Größen bestehen bleibt und daß keine optimale Temperaturcharakteristik der Referenzspannung erhalten wird, sondern im Gegenteil häufig die Temperaturcharakteristik durch diesen Schritt sogar verschlechtert wird.In a first known method, offset compensation is used directly on the amplifier generating the offset. Most operational amplifiers have suitable ones for this Control inputs. Through offset compensation becomes the dominant error portion of the deviation between the reference voltage value obtained at the output of the circuit and the calculated value is eliminated. However, the disadvantage is that there is usually a residual deviation of the sizes mentioned remains and that no optimal temperature characteristics the reference voltage is obtained, but on the contrary often the temperature characteristic through this step even is deteriorating.

Bei einem zweiten bekannten Verfahren wird die Ausgangsspannung des Schaltkreises (d.h. die Referenzspannung) über einen regelbaren Widerstand oder ein anderes passives Bauelement der Schaltung direkt auf den berechneten Wert eingestellt. Auf diese Weise wird bei der Temperatur, bei welcher die Einstellung erfolgt, der korrekte Spannungswert erzielt. Nach-Nachteilig ist, daß bei diesem Verfahren eine optimale Temperaturkonstanz der Referenzspannung nicht garantiert werden kann.In a second known method, the output voltage of the circuit (i.e. the reference voltage) via a adjustable resistance or another passive component the circuit is set directly to the calculated value. This way, at the temperature at which the setting the correct voltage value is achieved. After-disadvantage is that with this method an optimal temperature constancy the reference voltage cannot be guaranteed can.

BGR-Schaltkreise, die höchsten Anforderungen bezüglich des Absolutwertes und der Temperaturkonstanz der Referenzspannung genügen müssen, müssen sowohl in Hinblick auf ihren Absolutwert (welcher durch den Offset-Fehler dominiert wird) als auch in Hinblick auf ihr Temperaturverhalten optimiert werden. Solche BGR-Schaltkreise müssen bei zwei unterschiedlichen Temperaturen abgeglichen werden. Nachteilig ist der hierfür erforderliche hohe Aufwand.BGR circuits, the highest requirements regarding the Absolute value and constant temperature of the reference voltage must satisfy both in terms of their absolute value (which is dominated by the offset error) as can also be optimized with regard to their temperature behavior. Such BGR circuits must have two different Temperatures are adjusted. The disadvantage is that high effort required for this.

In der U.S.-Patentschrift US 6,118,264 A ist ein BGR-Schaltkreis beschrieben, der mit einer Abgleichvorrichtung beschaltet ist. Die Abgleichvorrichtung generiert eine Kompensationsspannung, welche auf die von dem BGR-Schaltkreis bereitgestellte BGR-Spannung addiert wird, wodurch eine Referenzspannung erzeugt wird. Die Kompensationsspannung weist über bestimmte Temperaturbereiche eine zu der BGR-Spannung gegenläufige Temperaturcharakteristik auf. Insgesamt ergibt sich daraus eine verbesserte Temperaturcharakteristik der Referenzspannung.In U.S. Patent No. 6,118,264 A is a BGR circuit described with a balancing device is connected. The balancing device generates a compensation voltage, which on the from the BGR circuit provided BGR voltage is added, creating a reference voltage is produced. The compensation voltage has over certain temperature ranges to the BGR voltage opposite temperature characteristics. Total results this results in an improved temperature characteristic of the reference voltage.

Der Erfindung liegt die Aufgabe zugrunde, ein einfach durchführbares Abgleichverfahren für BGR-Schaltkreise anzugeben, mit welchem sich eine gute Temperaturkonstanz der Referenzspannung und eine gute Übereinstimmung des Referenzspannungswertes mit einem erwarteten bzw. berechneten Spannungswert erreichen lassen. Ferner zielt die Erfindung darauf ab, einen einfach abgleichbaren BGR-Schaltkreis zu schaffen.The invention is based, an easy to carry out the task To specify adjustment procedures for BGR circuits, with which there is a good temperature stability of the reference voltage and a good match of the reference voltage value with an expected or calculated voltage value let achieve. The invention further aims to provide one easy to match BGR circuitry.

Die der Erfindung zugrundeliegende Aufgabenstellung wird durch die Merkmale der unabhängigen Ansprüche gelöst.The problem underlying the invention will solved by the features of the independent claims.

Demnach umfaßt das erfindungsgemäße Abgleichverfahren nach Anspruch 1 zwei nacheinander durchzuführende Abgleichschritte: In einem ersten Abgleichschritt wird ein Offset-Abgleich des Spannungsdifferenzverstärkers bei einer vorgegebenen Temperatur durchgeführt. In einem zweiten Abgleichschritt wird dann der Wert der Referenzspannung, welcher bei dem ersten Abgleichschritt erhalten wurde, auf den vorgegebenen (d.h. berechneten) Wert der Referenzspannung für diese Schaltung eingestellt.Accordingly, the adjustment method according to the invention comprises Claim 1 two consecutive adjustment steps: In a first adjustment step, an offset adjustment is carried out of the voltage difference amplifier at a predetermined temperature carried out. In a second adjustment step then the value of the reference voltage, which at the first Matching step has been obtained to the predetermined (i.e. calculated) value of the reference voltage for this circuit set.

Der besondere Vorteil des erfindungsgemäßen Verfahrens liegt darin, daß die beiden Abgleichschritte bei ein und derselben Temperatur durchgeführt werden und dabei (dennoch) ein Abgleich sowohl in Hinblick auf den Absolutwert als auch die Temperaturcharakteristik der erhaltenen Referenzspannung herbeigeführt wird.The particular advantage of the method according to the invention lies in that the two adjustment steps in one and the same Temperature are carried out and (nevertheless) an adjustment both in terms of the absolute value and the Temperature characteristic of the reference voltage obtained becomes.

Mit dem Begriff "Spannungsdifferenzverstärker" ist jeder Typ eines Verstärkers gemeint, der zur Verstärkung einer Spannungsdifferenz ausgelegt ist. Insbesondere umfaßt der Begriff einen Differenzverstärker und einen Operationsverstärker.With the term "voltage differential amplifier" is every type an amplifier meant to amplify a voltage difference is designed. In particular, the term includes a differential amplifier and an operational amplifier.

Eine vorteilhafte Vorgehensweise bei der Durchführung des ersten Abgleichschrittes kennzeichnet sich dadurch, daß dieser Schritt die Teilschritte Kurzschließen der Eingänge des Spannungsdifferenzverstärkers und Regeln der Ausgangsspannung des Spannungsdifferenzverstärkers auf einen vorgegebenen Spannungswert umfaßt. Der vorgegebene Spannungswert kann insbesondere die Gleichtaktspannung (Common Mode Voltage) sein, welche das Mittel aus dem positiven und dem negativen Potential der Betriebsspannung des Spannungsdifferenzverstärkers ist. Der Spannungsdifferenzverstärker wird bei dem Offset-Abgleich vorzugsweise als Komparator betrieben.An advantageous approach when performing the first Adjustment step is characterized in that this Step the partial steps of short-circuiting the inputs of the voltage differential amplifier and regulating the output voltage of the Differential voltage amplifier to a predetermined voltage value includes. The specified voltage value can in particular be the common mode voltage, which is the mean of the positive and negative potential the operating voltage of the voltage differential amplifier is. The voltage difference amplifier is used for the offset adjustment preferably operated as a comparator.

Bei der erfindungsgemäßen Schaltung nach Anspruch 5 lassen sich die Eingänge des Spannungsdifferenzverstärkers durch das erste Schaltmittel von der äußeren Beschaltung trennen und durch das zweite Schaltmittel kurzschließen. In dieser Konfiguration des Schaltkreises kann dann der Kurzschlußabgleich des Spannungsdifferenzverstärkers zur Offset-Korrektur vorgenommen werden. Anschließend lassen sich die Eingänge des Spannungsdifferenzverstärkers durch das erste Schaltmittel wieder mit der äußeren Beschaltung verbinden und der Kurzschluß der Eingänge kann durch das zweite Schaltmittel aufgehoben werden. In dieser Konfiguration des Schaltkreises kann nun durch Verstellen des Widerstands des mindestens einen Bauelements mit einstellbarem Widerstand der Abgleich der Ausgangsspannung der Schaltung auf den vorgegebenen Wert der Referenzspannung durchgeführt werden. Durch diesen Abgleich wird bewirkt, daß sich in einem gewissen Bereich um die vorgegebene Temperatur herum eine nahezu konstante, d.h. temperaturunabhängige Referenzspannung einstellt.Leave in the circuit according to the invention according to claim 5 the inputs of the voltage differential amplifier through the Disconnect the first switching means from the external circuit and short circuit by the second switching means. In this configuration of the circuit can then short-circuit compensation of the voltage difference amplifier for offset correction become. Then the inputs of the Differential voltage amplifier by the first switching means reconnect to the external wiring and the short circuit the inputs can be canceled by the second switching means become. In this configuration the circuit can now by adjusting the resistance of the at least one Component with adjustable resistance to balance the Output voltage of the circuit to the specified value Reference voltage can be carried out. Through this comparison is caused to be within a certain range around the predetermined Temperature around an almost constant, i.e. temperature-independent Sets reference voltage.

Die Vorteile dieses BGR-Schaltkreises bestehen darin, daß sich mit derselben Schaltung sowohl der Spannungsoffset des Spannungsdifferenzverstärkers kompensieren als auch der Abgleich der passiven Bauelemente der Schaltung durchführen läßt.The advantages of this BGR circuit are that both the voltage offset of the Voltage differential amplifier compensate as well as the adjustment perform the passive components of the circuit leaves.

Die Erfindung wird nachfolgend in beispielhafter Weise unter Bezugnahme auf die Zeichnungen erläutert; in diesen zeigen:

Fig. 1A
ein Schaubild, in welchem die Referenzspannung über der Temperatur aufgetragen ist, zur Erläuterung des Offset-Fehlers;
Fig. 1B
ein Schaubild, in welchem die Referenzspannung über der Temperatur aufgetragen ist, zur Erläuterung des Temperaturcharakteristik-Fehlers;
Fig. 2
ein Schaubild, in welchem die Referenzspannung über der Temperatur aufgetragen ist, zur Erläuterung der erfindungsgemäßen Kompensation des Offset-Fehlers;
Fig. 3
ein Schaubild, in welchem die Referenzspannung über der Temperatur aufgetragen ist, zur Erläuterung der erfindungsgemäßen Kompensation des Temperaturcharakteristik-Fehlers; und
Fig. 4
ein Schaltbild eines erfindungsgemäßen BGR-Schaltkreises.
The invention is explained below by way of example with reference to the drawings; in these show:
Fig. 1A
a graph in which the reference voltage is plotted against the temperature to explain the offset error;
Figure 1B
a graph in which the reference voltage is plotted against the temperature to explain the temperature characteristic error;
Fig. 2
a diagram in which the reference voltage is plotted against the temperature to explain the compensation of the offset error according to the invention;
Fig. 3
a graph in which the reference voltage is plotted against the temperature to explain the compensation of the temperature characteristic error according to the invention; and
Fig. 4
a circuit diagram of a BGR circuit according to the invention.

Die Fig. 1A und 1B verdeutlichen die zwei wesentlichen Effekte, die für das Auftreten von Abweichungen zwischen der erhaltenen Referenzspannung und der berechneten Referenzspannung verantwortlich sind. 1A and 1B illustrate the two essential effects, the for the occurrence of discrepancies between the received Reference voltage and the calculated reference voltage are responsible.

Fig. 1A zeigt den Fall, daß die von einem nicht abgeglichenen BGR-Schaltkreis ausgegebene, auf der Y-Achse aufgetragene Referenzspannung über den gesamten betrachteten Temperaturbereich (X-Achse) entweder höher (Referenzspannungskurve RS+) oder tiefer (Referenzspannungskurve RS-) als die berechnete ideale Referenzspannungskurve RS0 verläuft, jedoch in bezug auf ihr Temperaturverhalten einen optimal flachen und bezüglich der Raum- oder Einsatztemperatur TR symmetrischen Verlauf aufweist. Dieser Effekt wird hauptsächlich durch einen Offset im Spannungsdifferenzverstärker bewirkt. Er wird im folgenden als Offset-Fehler bezeichnet und ist in der Regel der dominante Fehleranteil bei nicht abgeglichenen BGR-Schaltkreisen.Fig. 1A shows the case where that of an unbalanced one BGR circuit output reference voltage plotted on the Y axis over the entire temperature range considered (X-axis) either higher (reference voltage curve RS +) or lower (reference voltage curve RS-) than the calculated one ideal reference voltage curve RS0 runs, but with respect on their temperature behavior an optimally flat and regarding the room or operating temperature TR symmetrical course having. This effect is mainly due to a Offset in the voltage differential amplifier causes. He will be in hereinafter referred to as offset error and is usually the dominant proportion of errors in unbalanced BGR circuits.

Fig. 1B zeigt den Fall, daß die Referenzspannung entweder eine mit zunehmender Temperatur steigende Charakteristik (Referenzspannungskurve RSd+) oder eine mit zunehmender Temperatur fallende Charakteristik (Referenzspannungskurve RSd-) aufweist. Diesem Effekt liegt hauptsächlich eine fehlende Anpassung der passiven Bauelemente des BGR-Schaltkreises zugrunde. Er wird im folgenden auch als Temperaturcharakteristik-Fehler bezeichnet.Fig. 1B shows the case where the reference voltage is either a characteristic increasing with increasing temperature (Reference voltage curve RSd +) or one with increasing temperature falling characteristic (reference voltage curve RSd-) having. This effect is mainly due to a lack of adjustment of the passive components of the BGR circuit. In the following, it is also called a temperature characteristic error designated.

Bei einem nicht abgeglichenen BGR-Schaltkreis treten die beiden anhand der Fig. 1A und 1B erläuterten Fehler gemeinsam auf.In an unbalanced BGR circuit, the two kick 1A and 1B jointly explained errors on.

Die Fig. 2 und 3 veranschaulichen die zwei Abgleichschritte des erfindungsgemäßen Verfahrens, welches zum Ziel hat, die erläuterten Fehler zu eliminieren.2 and 3 illustrate the two adjustment steps of the method according to the invention, the aim of which eliminate explained errors.

Fig. 2 verdeutlicht den ersten erfindungsgemäßen Abgleichschritt AS1. Die Referenzspannungskurve RSOT ist sowohl mit einem Offset-Fehler als auch mit einem Temperaturcharakteristik-Fehler behaftet. Durch einen Offset-Abgleich des Spannungsdifferenzverstärkers bei der Raum- oder Einsatztemperatur TR wird der Offset-Fehler eliminiert, so daß die Referenzspannungskurve RSOT parallel zur X-Achse in Richtung der berechneten idealen Referenzspannungskurve RS0 verschoben wird. Jedoch entsteht bei diesem Schritt nicht die optimale Temperaturcharakteristik (d.h. die dadurch erzeugte Referenzspannungskurve RST unterscheidet sich in ihrer Temperaturcharakteristik noch von der berechneten idealen Referenzspannungskurve RS0), da die Fehler der passiven Bauelemente des BGR-Schaltkreises nicht kompensiert werden.2 illustrates the first adjustment step according to the invention AS1. The reference voltage curve RSOT is both with an offset error as well as a temperature characteristic error afflicted. Through an offset adjustment of the voltage differential amplifier at the room or operating temperature TR the offset error is eliminated so that the reference voltage curve RSOT parallel to the X axis in the direction of calculated ideal reference voltage curve RS0 shifted becomes. However, this step does not result in the optimal one Temperature characteristic (i.e. the resulting reference voltage curve RST differs in their temperature characteristics still from the calculated ideal reference voltage curve RS0) because the errors of the passive components of the BGR circuit cannot be compensated.

Fig. 3 verdeutlicht den zweiten erfindungsgemäßen Abgleichschritt AS2. Dabei wird der Temperaturcharakteristik-Fehler der Referenzspannungskurve RST eliminiert, indem ein Abgleich der Referenzspannung auf den vorgegebenen Wert der Referenzspannung bei der Raum- oder Einsatztemperatur TR durchgeführt wird. Dadurch wird die Temperaturcharakteristik der Referenzspannungskurve RST an die berechnete ideale Referenzspannungskurve RS0 angepaßt, so daß beide Referenzspannungskurven anschließend den gleichen Verlauf aufweisen.3 illustrates the second adjustment step according to the invention AS2. Thereby the temperature characteristic error the reference voltage curve RST is eliminated by an adjustment the reference voltage to the specified value of the reference voltage performed at room or operating temperature TR becomes. This will make the temperature characteristic of the reference voltage curve RST to the calculated ideal reference voltage curve RS0 adjusted so that both reference voltage curves then have the same course.

Fig. 4 zeigt einen erfindungsgemäßen BGR-Schaltkreis, welcher zur Durchführung des erfindungsgemäßen Verfahrens geeignet und ausgelegt ist. Der invertierende Eingang eines Operationsverstärkers OP1 ist über einen Schalter S1 mit einem Knoten K1 eines ersten Schaltungszweigs einer äußeren Beschaltung des Operationsverstärkers OP1 verbunden. Der nicht-invertierende Eingang des Operationsverstärkers OP1 steht über einen Schalter S2 mit einem Knoten K2 eines zweiten Schaltungszweigs der äußeren Beschaltung des Operationsverstärkers OP1 in Verbindung. Die zwei Schaltungszweige erstrecken sich jeweils von einem gemeinsamen festen Potential, insbesondere einer Masse VSS, bis zu einem gemeinsamen Knoten K3. Von dort sind sie über einen Schalter S3 mit dem Ausgang des Operationsverstärkers OP1 verbunden.Fig. 4 shows a BGR circuit according to the invention, which suitable for carrying out the method according to the invention and is designed. The inverting input of an operational amplifier OP1 is via a switch S1 with a node K1 of a first circuit branch of an external circuit of the operational amplifier OP1 connected. The non-inverting Input of the operational amplifier OP1 is via a switch S2 with a node K2 of a second Circuit branch of the external circuitry of the operational amplifier OP1 in connection. The two circuit branches extend each have a common fixed potential, especially a mass VSS, up to a common node K3. From there they are connected to the output via a switch S3 of the operational amplifier OP1 connected.

Der erste Schaltungszweig weist zwischen dem Knoten K1 und dem gemeinsamen Knoten K3 einen Widerstand R1 auf. Im zweiten Schaltungszweig befindet sich zwischen den Knoten K2 und K3 ein Widerstand R2.The first circuit branch points between the nodes K1 and the common node K3 has a resistor R1. In the second Circuit branch is located between nodes K2 and K3 a resistor R2.

Des weiteren steht der Knoten K1 über einen einstellbaren Widerstand R0 mit dem Kollektoranschluß eines Bipolartransistors T1 des ersten Schaltungszweigs in Verbindung. Der Basisanschluß des Bipolartransistors T1 ist ebenfalls mit seinem Kollektoranschluß verbunden, während der Emitteranschluß auf der Masse VSS liegt. Der Knoten K2 ist mit dem Kollektorund dem Emitteranschluß eines Bipolartransistors T2 des zweiten Schaltungszweigs verbunden. Der Emitteranschluß des Bipolartransistors T2 liegt wieder auf der Masse VSS.Furthermore, the node K1 is above an adjustable resistor R0 with the collector terminal of a bipolar transistor T1 of the first circuit branch in connection. The basic connection of the bipolar transistor T1 is also with its Collector connection connected while the emitter connection lies on the ground VSS. The node K2 is with the collector and the emitter terminal of a bipolar transistor T2 of the second Circuit branch connected. The emitter connection of the bipolar transistor T2 is again on the ground VSS.

Der invertierende und der nicht-invertierende Eingang des Operationsverstärkers OP1 lassen sich über einen Schalter S4 kurzschließen. Die in Fig. 4 dargestellte Konstantspannungsquelle Vdc repräsentiert die Gleichtaktspannung, welche durch das Mittel der Betriebspannungspotentiale gegeben ist. Am Ausgang des Operationsverstärkers OP1 läßt sich eine Referenzspannung Vref abgreifen. An den Anschlüssen des Operationsverstärkers OP1 zum Offset-Abgleich liegt ein einstellbarer Widerstand Roffset an.The inverting and the non-inverting input of the Operational amplifiers OP1 can be switched via a switch S4 short. The constant voltage source shown in Fig. 4 Vdc represents the common mode voltage, which by the mean of the operating voltage potentials is given. At the A reference voltage can be output from the operational amplifier OP1 Tap Vref. At the connections of the operational amplifier OP1 for offset adjustment is an adjustable one Roffset resistance on.

Zum Offset-Abgleich des Operationsverstärkers OP1 befinden sich die Schalter S4 und S5 in der geschlossenen Schaltstellung und die Schalter S1, S2 und S3 sind geöffnet. Dadurch wird die äußere Beschaltung von dem Operationsverstärker OP1 abgetrennt. In dieser Konfiguration des Schaltkreises wird der Operationsverstärker OP1 als Komparator betrieben. Durch Einstellen des einstellbaren Widerstands Roffset wird der Operationsverstärker OP1 abgeglichen, wobei der optimale Offset-Abgleich durch den Kippunkt des Komparators gekennzeichnet ist. Dieser entspricht der Gleichtaktspannung, d.h. ist z.B. bei symmetrischen Betriebsspannungspotentialen 0 V oder weist bei Betriebsspannungspotentialen von z.B. 0 V und 2,4 V einen Wert von 1,2 V auf. Der Abgleich erfolgt bei einer vorgegebenen Raum- oder Einsatztemperatur TR. Aufgrund dieses Offset-Abgleichs weist die Referenzspannung Vref beim späteren Betrieb des BGR-Schaltkreises keinen von dem Operationsverstärker OP1 verursachten Offset-Fehler auf.For the offset adjustment of the operational amplifier OP1 switches S4 and S5 are in the closed switching position and switches S1, S2 and S3 are open. Thereby the external wiring of the operational amplifier OP1 separated. In this configuration the circuit will the operational amplifier OP1 operated as a comparator. By Setting the adjustable resistance Roffset is the Operational amplifier OP1 adjusted, the optimal Offset adjustment is characterized by the tipping point of the comparator is. This corresponds to the common mode voltage, i.e. is e.g. with symmetrical operating voltage potentials 0 V or has at operating voltage potentials of e.g. 0 V and 2.4 V has a value of 1.2 V. The comparison takes place at a specified room or operating temperature TR. by virtue of this offset adjustment has the reference voltage Vref later operation of the BGR circuit none of the operational amplifier OP1 caused an offset error.

Nach erfolgtem Offset-Abgleich des Operationsverstärkers OP1 werden die Schalter S4 und S5 geöffnet und die Schalter S1, S2 und S3 geschlossen. In dieser Schalterstellung kann der einstellbare Widerstand R0 bei der vorgegebenen Raum- oder Einsatztemperatur TR so eingestellt werden, daß die Referenzspannung Vref den Wert einer vorgegebenen Referenzspannung annimmt. Durch diese Maßnahme wird der Temperaturcharakteristik-Fehler eliminiert, so daß die Referenzspannung Vref über einen gewissen Temperaturbereich um die Raum- oder Einsatztemperatur TR herum einen konstanten Verlauf aufweist.After offset adjustment of the operational amplifier OP1 switches S4 and S5 are opened and switches S1, S2 and S3 closed. In this switch position the adjustable resistance R0 at the given room or Operating temperature TR can be set so that the reference voltage Vref the value of a given reference voltage accepts. This measure will make the temperature characteristic error eliminated so that the reference voltage Vref over a certain temperature range around the room or operating temperature TR has a constant course around.

Im folgenden wird die Funktionsweise des in Fig. 4 dargestellten BGR-Schaltkreises erläutert.The mode of operation of that shown in FIG. 4 is described below BGR circuit explained.

In dem Schaltbild treten folgende Ströme und Spannungen auf: Ic1 Kollektorstrom des Bipolartransistors T1 Ic2 Kollektorstrom des Bipolartransistors T2 Vbe1 Basis-Emitter-Spannung des Bipolartransistors T1 Vbe2 Basis-Emitter-Spannung des Bipolartransistors T2 VR0 An dem einstellbaren Widerstand R0 abfallende Spannung VR1 An dem Widerstand R1 abfallende Spannung VR2 An dem Widerstand R2 abfallende Spannung The following currents and voltages appear in the circuit diagram: Ic1 Collector current of the bipolar transistor T1 Ic2 Collector current of the bipolar transistor T2 Vbe1 Base-emitter voltage of the bipolar transistor T1 be2 Base-emitter voltage of the bipolar transistor T2 VR0 Voltage dropping at the adjustable resistor R0 VR1 Voltage drop across resistor R1 VR2 Voltage drop across resistor R2

Die am Ausgang der Operationsverstärkers OP1 anliegende Spannung Vref läßt sich durch die an dem Widerstand R2 abfallende Spannung VR2 und die Basis-Emitter-Spannung Vbe2 des Bipolartransistors T2 ausdrücken: Vref = VR2 + Vbe2 The voltage Vref present at the output of the operational amplifier OP1 can be expressed by the voltage VR2 dropping across the resistor R2 and the base-emitter voltage Vbe2 of the bipolar transistor T2: Vref = VR2 + Vbe2

Die an einem Bipolartransistor zwischen Basis und Emitter abfallende Spannung weist eine Temperaturabhängigkeit auf. Beispielsweise beträgt der Temperaturkoeffizient dieser Basis-Emitter-Spannung bei einer Temperatur von 300 K und einer anliegenden Spannung von 0,6 V etwa -2 mV/K. Um eine temperaturstabilisierte Referenzspannung Vref zu erhalten, muß zu der Basis-Emitter-Spannung eine Spannung mit betragsmäßig gleich großem Temperaturkoeffizienten, aber entgegengesetztem Vorzeichen addiert werden. Das bedeutet, daß die an dem Widerstand R2 abfallende Spannung VR2 bei einer Temperatur von 300 K einen Temperaturkoeffizienten von +2 mV/K aufweisen muß. Diese temperaturabhängige Spannung wird unter Zuhilfenahme des Bipolartransistors T1 erzeugt.The one falling at a bipolar transistor between the base and emitter Voltage has a temperature dependency. For example is the temperature coefficient of this base-emitter voltage at a temperature of 300 K and an adjacent Voltage of 0.6 V about -2 mV / K. To a temperature stabilized To get reference voltage Vref must the base-emitter voltage is a voltage with absolute value same temperature coefficient, but opposite Signs are added. That means that the resistance R2 falling voltage VR2 at a temperature of 300 K have a temperature coefficient of +2 mV / K got to. This temperature dependent voltage is with the help of the bipolar transistor T1 generated.

Um dieses ersichtlich zu machen, müssen noch verschiedene Maschengleichungen des in Fig. 4 dargestellten BGR-Schaltkreises aufgestellt werden. Es gelten des weiteren: Vref = VR1 + Vbe2 VR0 = Vbe2 - Vbe1 In order to make this clear, various mesh equations of the BGR circuit shown in FIG. 4 still have to be established. The following also apply: Vref = VR1 + Vbe2 VR0 = Vbe2 - Vbe1

Zur Aufstellung von Gleichung (3) für die an dem einstellbaren Widerstand R0 abfallende Spannung VR0 muß berücksichtigt werden, daß zwischen dem invertierenden und dem nicht-invertierenden Eingang eines idealen Operationsverstärkers keine Spannung abfällt. Ebenso fließen durch diese Eingänge eines idealen Operationsverstärkers keine Ströme. Daher wird der Widerstand R1 von dem gleichen Strom Ic1 wie der einstellbare Widerstand R0 durchflossen, und es gilt: VR1/R1 = VR0/R0 To establish equation (3) for the voltage VR0 dropping across the adjustable resistor R0, it must be taken into account that no voltage drops between the inverting and the non-inverting input of an ideal operational amplifier. Likewise, no currents flow through these inputs of an ideal operational amplifier. Therefore, the same current Ic1 flows through the resistor R1 as the adjustable resistor R0, and the following applies: VR1 / R1 = VR0 / R0

Setzt man Gleichungen (2) und (3) in Gleichung (4) ein, so erhält man: Vref = Vbe2 + (R1/R0) * (Vbe2 - Vbe1) Substituting equations (2) and (3) in equation (4), we get: Vref = Vbe2 + (R1 / R0) * (Vbe2 - Vbe1)

Aus dem Vergleich von Gleichung (5) mit Gleichung (1) wird ersichtlich, daß der zweite Summand der rechten Seite von Gleichung (5) die Spannung VR2 darstellt.The comparison of equation (5) with equation (1) becomes it can be seen that the second summand of the right side of Equation (5) represents the voltage VR2.

Die temperaturabhängigen Kollektorströme Ic1 und Ic2 der Bipolartransistoren T1 bzw. T2 hängen exponentiell von den Basis-Emitter-Spannungen Vbe1 bzw. Vbe2 sowie von einer sogenannten Temperaturspannung VT ab: Icx = Isx * (exp(Vbex/VT) - 1) mit x = 1, 2 The temperature-dependent collector currents Ic1 and Ic2 of the bipolar transistors T1 and T2 depend exponentially on the base-emitter voltages Vbe1 and Vbe2 and on a so-called temperature voltage VT: Icx = Isx * (exp (Vbex / VT) - 1) with x = 1, 2

Hierbei steht Isx für den Sperrstrom des jeweiligen Bipolartransistors T1 bzw. T2. Für die Temperaturspannung VT gilt folgende Abhängigkeit von der absoluten Temperatur T in Kelvin: VT = k * T/q, wobei k die Boltzmann-Konstante (1,38 * 10-23 J/K) und q die Elementarladung (1,6 * 10-19 C) bezeichnen. Umformen von Gleichung (6) liefert für Vbex » k * T/q: Vbex = VT * ln(Icx/Isx) Here Isx stands for the reverse current of the respective bipolar transistor T1 or T2. The following dependence on the absolute temperature T in Kelvin applies to the temperature voltage VT: VT = k * T / q, where k denotes the Boltzmann constant (1.38 * 10 -23 J / K) and q the elementary charge (1.6 * 10 -19 C). Transforming equation (6) yields for Vbex »k * T / q: Vbex = VT * ln (Icx / Isx)

Wendet man diese Gleichung auf den in Fig. 4 dargestellten BGR-Schaltkreis an und berücksichtigt, daß VR1 = VR2 gilt, so ergibt sich für Gleichung (3): VR0 = Vbe2 - Vbe1 = VT * ln(R1/R2) Applying this equation to the BGR circuit shown in Fig. 4, taking into account that VR1 = VR2 applies, the following results for equation (3): VR0 = Vbe2 - Vbe1 = VT * ln (R1 / R2)

Bei dieser Gleichung wurde vorausgesetzt, daß die beiden Bipolartransistoren T1 und T2 baugleich sind und demnach den gleichen Sperrstrom Isx aufweisen. Gleichung (10) kann nun in Gleichung (5) eingesetzt werden: Vref = Vbe2 + (R1/R0) * VT * ln(R1/R2) With this equation it was assumed that the two bipolar transistors T1 and T2 are identical and therefore have the same reverse current Isx. Equation (10) can now be used in equation (5): Vref = Vbe2 + (R1 / R0) * VT * ln (R1 / R2)

Wie oben schon beschrieben wurde, weist die Basis-Emitter-Spannung Vbe2 einen Temperaturkoeffizienten von -2 mV/K auf. Aus Gleichung (7) geht hervor, daß die Temperaturspannung VT einen Temperaturkoeffizienten von +0,086 mV/K besitzt. Durch geeignete Wahl der Widerstände R0, R1 und R2 kann der zweite Summand der rechten Seite von Gleichung (11) derart ausgelegt werden, daß er einen Temperaturkoeffizienten von +2 mV/K besitzt.As described above, the base-emitter voltage shows Vbe2 has a temperature coefficient of -2 mV / K. From equation (7) it follows that the temperature voltage VT has a temperature coefficient of +0.086 mV / K. By the second one can select suitable resistors R0, R1 and R2 Summand of the right side of equation (11) designed in this way that it has a temperature coefficient of +2 mV / K.

Zusammengefaßt werden durch den erfindungsgemäßen BGR-Schaltkreis zwei Spannungen erzeugt, die entgegengesetzte, aber betragsmäßig gleich große Temperaturkoeffizienten aufweisen. Durch die Addition dieser beiden Spannungen erhält man eine temperaturstabilisierte Referenzspannung. Aufgrund von Inhomogenitäten unter den gleichen Bauelementen, die für die verschiedenen BGR-Schaltkreise der gleichen Herstellungsreihe verwendet werden, kommt es zu Abweichungen vom idealen Wert der Referenzspannung und vom idealen Temperaturverhalten der Referenzspannung. Der erfindungsgemäße BGR-Schaltkreis erlaubt es, derartige Inhomogenitäten durch Spannungsabgleiche sowohl des verwendeten Operationsverstärkers als auch der eingebauten Widerstände zu kompensieren.To be summarized by the BGR circuit according to the invention creates two tensions, the opposite, but have equal magnitude temperature coefficients. By adding these two tensions one a temperature stabilized reference voltage. by virtue of of inhomogeneities among the same components that are used for the different BGR circuits from the same series are used, there are deviations from the ideal Value of the reference voltage and the ideal temperature behavior the reference voltage. The BGR circuit according to the invention allows such inhomogeneities by voltage balancing both the operational amplifier used and the to compensate for built-in resistances.

Claims (12)

  1. Method for adjusting a BGR circuit for generating a temperature-stabilized reference voltage (Vref) to a predetermined value of the reference voltage, the circuit comprising a voltage differential amplifier (OP1) and an external circuitry - assigned to the voltage differential amplifier (OP1) - having at least one component having a variable resistance (R0), having the steps of:
    (a) carrying out an offset adjustment of the voltage differential amplifier (OP1) at a predetermined temperature (TR); and subsequently
    (b) carrying out an adjustment of the reference voltage to the predetermined value of the reference voltage at the same predetermined temperature (TR) by setting the variable resistance (R0) of the at least one component.
  2. Method according to Claim 1,
    characterized in that step (a) has the substeps of:
    (a1) short-circuiting the inputs of the voltage differential amplifier (OP1); and
    (a2) regulating the output voltage of the voltage differential amplifier (OP1) to a predetermined voltage value.
  3. Method according to Claim 2,
    characterized
    in that the voltage differential amplifier (OP1) is operated as a comparator in step (a2).
  4. Method according to one of the preceding claims,
    characterized in that step (b) has the substeps of:
    (b1) measuring the reference voltage (Vref) of the circuit; and
    (b2) varying the variable resistance (R0) of the at least one component until the measured reference voltage (Vref) assumes the predetermined value of the reference voltage.
  5. BGR circuit for generating a temperature-stabilized reference voltage, which comprises
    a voltage differential amplifier (OP1) having an inverting and a noninverting input, which is assigned a means for offset correction (Roffset), and
    an external circuitry of the voltage differential amplifier (OP1), which is connected to the inverting and noninverting inputs and the output of the voltage differential amplifier (OP1), the external circuitry
    being constructed in such a way that the sum of at least two partial signals whose characteristics have different signs with regard to the temperature corresponds to the output voltage of the voltage differential amplifier (OP1),
    comprising at least one component having a variable resistance (R0), by means of which the temperature characteristic of at least one of the at least two partial signals can be influenced, and
    having a first switching means (S1, S2) for isolating the inputs of the voltage differential amplifier (OP1) from the external circuitry, and
    having a second switching means (S4) for short-circuiting the inputs of the voltage differential amplifier (OP1).
  6. Circuit according to Claim 5,
    characterized
    in that the external circuitry comprises two circuit branches which extend from a common fixed potential, in particular ground (VSS), to the output of the voltage differential amplifier (OP1),
    in that the inverting input of the voltage differential amplifier (OP1) is connected to a node K1 of the first circuit branch via a first switch (S1) of the first switching means (S1, S2), and
    in that the noninverting input of the voltage differential amplifier (OP1) is connected to a node K2 of the second circuit branch via a second switch (S2) of the first switching means (S1, S2).
  7. Circuit according to Claim 5 or 6,
    characterized
    in that each of the two circuit branches respectively comprises a transistor circuit (T1, T2).
  8. Circuit according to one of Claims 5 to 7,
    characterized
    in that the nodes K1 and K2 are respectively connected to the output of the voltage differential amplifier (OP1) via a resistor (R1, R2).
  9. Circuit according to one of Claims 5 to 8,
    characterized
    in that one of the two nodes K1 and K2 is connected via the at least one component having a variable resistance (R0) to the collector terminal of a first transistor (T1), whose base terminal is connected to its collector terminal and whose emitter terminal is at the common fixed potential, and
    in that the other of the two nodes K1 and K2 is connected to the collector terminal of a second transistor (T2), whose base terminal is connected to its collector terminal and whose emitter terminal is at the common fixed potential.
  10. Circuit according to one of Claims 5 to 9,
    characterized
    in that one of the two inputs of the voltage differential amplifier (OP1) can be connected to a constant voltage source (Vdc), and
    in that the circuit has third switching means (S5) for isolating this input of the voltage differential amplifier (OP1) from the constant voltage source (Vdc).
  11. Circuit according to one of Claims 5 to 10,
    characterized
    in that the voltage differential amplifier (OP1) is an operational amplifier.
  12. Circuit according to one of Claims 5 to 11,
    characterized
    in that the means for offset correction (Roffset) is an adjustable trimming resistor.
EP01997727A 2000-11-22 2001-11-08 Method for adjusting a bgr circuit Expired - Lifetime EP1336136B1 (en)

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DE10057844A DE10057844A1 (en) 2000-11-22 2000-11-22 Method of matching a BGR circuit and a BGR circuit
PCT/DE2001/004230 WO2002042856A1 (en) 2000-11-22 2001-11-08 Method for adjusting a bgr circuit

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Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7248102B2 (en) * 2005-01-20 2007-07-24 Infineon Technologies Ag Internal reference voltage generation for integrated circuit testing
JP4808069B2 (en) * 2006-05-01 2011-11-02 富士通セミコンダクター株式会社 Reference voltage generator
US7710190B2 (en) * 2006-08-10 2010-05-04 Texas Instruments Incorporated Apparatus and method for compensating change in a temperature associated with a host device
US20080106326A1 (en) * 2006-11-06 2008-05-08 Richard Gaggl Reference voltage circuit and method for providing a reference voltage
JP2009217809A (en) * 2008-02-12 2009-09-24 Seiko Epson Corp Reference voltage generating circuit, integrated circuit device and signal processing apparatus
JP2011130248A (en) * 2009-12-18 2011-06-30 Sanyo Electric Co Ltd Signal processing circuit
JP5808116B2 (en) 2011-02-23 2015-11-10 スパンション エルエルシー Reference voltage circuit and semiconductor integrated circuit
EP2560066B1 (en) 2011-08-16 2014-12-31 EM Microelectronic-Marin SA Method for adjusting a reference voltage according to a band-gap circuit
CN102393783A (en) * 2011-10-19 2012-03-28 四川和芯微电子股份有限公司 Current source circuit and system with high-order temperature compensation
US9362874B2 (en) * 2013-07-10 2016-06-07 Fairchild Semiconductor Corporation Differential measurements with a large common mode input voltage
US9444405B1 (en) 2015-09-24 2016-09-13 Freescale Semiconductor, Inc. Methods and structures for dynamically reducing DC offset
US10013013B1 (en) * 2017-09-26 2018-07-03 Nxp B.V. Bandgap voltage reference
CN110597345B (en) * 2019-09-27 2021-01-08 宜确半导体（苏州）有限公司 Bandgap reference circuit and method of operating the same
CN110992870B (en) 2019-12-24 2022-03-08 昆山国显光电有限公司 Drive chip and display device
US12111676B2 (en) * 2022-09-19 2024-10-08 Apple Inc. Bandgap circuit with low power consumption

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4902959A (en) 1989-06-08 1990-02-20 Analog Devices, Incorporated Band-gap voltage reference with independently trimmable TC and output
US5291122A (en) * 1992-06-11 1994-03-01 Analog Devices, Inc. Bandgap voltage reference circuit and method with low TCR resistor in parallel with high TCR and in series with low TCR portions of tail resistor
US5352973A (en) * 1993-01-13 1994-10-04 Analog Devices, Inc. Temperature compensation bandgap voltage reference and method
US5325045A (en) * 1993-02-17 1994-06-28 Exar Corporation Low voltage CMOS bandgap with new trimming and curvature correction methods
US5519354A (en) * 1995-06-05 1996-05-21 Analog Devices, Inc. Integrated circuit temperature sensor with a programmable offset
KR100400383B1 (en) * 1996-03-07 2003-12-31 마츠시타 덴끼 산교 가부시키가이샤 Reference voltage source circuit and voltage feedback circuit
DE69621020T2 (en) * 1996-11-04 2002-10-24 Stmicroelectronics S.R.L., Agrate Brianza Band distance reference voltage generator
DE19735381C1 (en) * 1997-08-14 1999-01-14 Siemens Ag Bandgap reference voltage source and method for operating the same
IT1301803B1 (en) * 1998-06-25 2000-07-07 St Microelectronics Srl BAND-GAP REGULATOR CIRCUIT TO PRODUCE A DENSITY REFERENCE WITH A TEMPERATURE COMPENSATION OF THE EFFECTS OF
US6150871A (en) * 1999-05-21 2000-11-21 Micrel Incorporated Low power voltage reference with improved line regulation
US6198266B1 (en) * 1999-10-13 2001-03-06 National Semiconductor Corporation Low dropout voltage reference
US6201379B1 (en) * 1999-10-13 2001-03-13 National Semiconductor Corporation CMOS voltage reference with a nulling amplifier

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CN1476553A (en) 2004-02-18
EP1336136A1 (en) 2003-08-20
WO2002042856A1 (en) 2002-05-30
DE10057844A1 (en) 2002-06-06
CN100464275C (en) 2009-02-25
DE50102636D1 (en) 2004-07-22
US6812684B1 (en) 2004-11-02
JP2004514230A (en) 2004-05-13

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