EP1273046A2 - Schottky-diode semiconductor device - Google Patents

Schottky-diode semiconductor device

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Publication number
EP1273046A2
EP1273046A2 EP01923789A EP01923789A EP1273046A2 EP 1273046 A2 EP1273046 A2 EP 1273046A2 EP 01923789 A EP01923789 A EP 01923789A EP 01923789 A EP01923789 A EP 01923789A EP 1273046 A2 EP1273046 A2 EP 1273046A2
Authority
EP
European Patent Office
Prior art keywords
islands
layer
type
schottky
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP01923789A
Other languages
German (de)
French (fr)
Inventor
Pierre Di Rossel
Frédéric MORANCHO
Nathalie Cezac
Henri Tranduc
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Centre National de la Recherche Scientifique CNRS
Original Assignee
Centre National de la Recherche Scientifique CNRS
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Filing date
Publication date
Application filed by Centre National de la Recherche Scientifique CNRS filed Critical Centre National de la Recherche Scientifique CNRS
Publication of EP1273046A2 publication Critical patent/EP1273046A2/en
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H01L29/0623—Buried supplementary region, e.g. buried guard ring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063—Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction

Definitions

  • the present invention relates to a semiconductor device and it relates more particularly to improvements made to diodes, of the Schottky type, or of the "J35 rectifier" type. Junction Bar ⁇ er Schottky rectifier; .
  • the Schottky dio ⁇ es feels basically made of a metal or a metal alloy placed on a semiconductor.
  • the diode consists of an active region of type N or of type?, Placed on a region of the same type, that is to say or?, But much more heavily doped.
  • the metal making the Schottky contact constitutes the anode, while the other face of the substrate which is metallized and which constitutes an ohmic contact, is called the cathode.
  • the sustained voltage withstand in reverse depends on the doping of the N-type or P-type zone, and the lower this is, the higher the voltage withstand.
  • the limit of the withstand voltage is around 100 volts.
  • the voltage drop in the on state is in fact the sum of the voltage drop in the semiconductor layer charge associated with the Schottky barrier, and the ohmic voltage drop in the semiconductor.
  • the voltage drop values commonly encountered for Schottky diodes operating in the on state are of the order of 0.5 volts.
  • Schottky diodes of the "JBS rectifier" type In order to improve the operating characteristics both in the blocked state and in the on state of the Schottky diodes, it has been necessary to design Schottky diodes of the "JBS rectifier" type. These second generation diodes are globally structurally identical to the preceding Schottky diodes, but are nevertheless distinguished by the fact that they comprise semiconductor mserts of a type contrary to the type of the semiconductor layer associated with the Schottky barrier.
  • This arrangement makes it possible to limit the reduction mechanism of the Schottky barrier under high applied voltage and to limit the reverse current of the diode.
  • the capacity withstand voltage of these devices can reach approximately 200 volts and the voltage drop, in the on state, is of the order of 0.25 volts.
  • the present invention therefore aims to overcome the drawbacks of the devices known from the prior art, by proposing improvements to these devices, which make it possible to obtain improved operating characteristics, both in blocked mode and in on mode.
  • a semiconductor device of the Schottky diode type comprising a substrate consisting of first and second semiconductor layers of the same type of conduction superimposed in said substrate, the second layer being more heavily doped. that the first, said substrate having first and second main surfaces in contact with first and second electrodes, a Schottky barrier being formed between said first electrode and said first layer, a plurality of islands of opposite conduction type to that of said first layer being arranged in beds spaces in the thickness of said layer.
  • FIG. 1 illustrates the structure of a Schottky diode
  • FIG. 2 illustrates the structure of a diode of the JBS type rectifier
  • FIG. 3 illustrates the distribution of the electric field in an example of a structure comprising a volume floating island
  • FIG. 4 shows the evolution of the order of magnitude of doping as a function of the number of islets contained in a semiconductor device ob and of the invention
  • FIG. 5 is a sectional view illustrating a semiconductor device of the Schottky diode type, according to the invention.
  • FIG. 8 is a sectional view illustrating a semiconductor device, of the JBS diode type.
  • the semiconductor device which is the subject of the invention (see FIGS. 1 and 5), it comprises a substrate i- conductor 1 having two main surfaces 4, 5 arranged in opposition to one another.
  • the semiconductor substrate 1 is composed of a first semiconductor region 2, 3 of a first type of conduction having a first layer 2 doped with N type (first type or donor) or doped with P type (second type or acceptor), and a second layer 3 doped with type N (first type or donor) or doped with type P (second type acceptor).
  • the first layer 2 of the first or second type is adjacent to the first main surface 4, while the second layer 3 of the first or second type is adjacent to the second main surface 5.
  • the semiconductor substrate comprises a first layer 2 and a second layer 3 which are of identical types, that is to say both of the first type, or of the second type.
  • the first main surface 4 is covered on the one hand with a peripheral film 7 based in particular on oxide and is arranged so as to be in ohmic contact with the first layer 2 at the level of a central electrode 8.
  • This central electrode 8 forms the anode of the device and is produced by means of a material forming a Schottky-type contact with the semiconductor.
  • This material is chosen from in particular molybdenum, tungsten platinum, palladium or equivalent, it may also be a metallic alloy (silicide, etc.).
  • This electrode 8 is arranged so as to be adjacent to the peripheral film 7 and forms a Schottky barrier with the first layer 2, at the level of the substantially central zone of the semiconductor substrate 1.
  • the second main surface 5 also cooperates with a second electrode 6 which is arranged so as to be in ohmic contact with the second layer 3.
  • This electrode 6 made of a metal constitutes the cathode of the semiconductor device which is the subject of the invention.
  • the second layer 3 of the first type or of the second type exhibits a greater doping, in terms of quantity of impurities introduced into the layer, compared to the first layer of the first or second type.
  • the impurities introduced into the first type layer will in particular be arsenic, phosphorus, while the impurities introduced into the second type layer will in particular be boron.
  • the semiconductor device which is the subject of the invention (see FIGS. 2 and 8), it comprises a semiconductor substrate 1 identical in its constitution to the semiconductor device 1 as described in the first preferred embodiment, and differs from it in that it comprises, in the first layer 2 of first type (N) or of second type (P), a plurality of semiconductor regions 10 of opposite type of conduction to those surrounding it, the plurality of regions 10 extending from the first main surface 4 and from the electrode 8 to the interior of the first layer 2.
  • N first type
  • P second type
  • the semiconductor device which is the subject of the invention, it comprises in a much more general manner a semiconductor substrate 1 comprising at least one layer 2 or 3 of first type or second type of conduction in which and according to an advantageous characteristic of the invention, there is incorporated or included within the layer 2 of the semiconductor substrate 1 of the first type or of the second type, a plurality of islands 9 of a type opposite to that of the semiconductor in which they are placed. So these islets 9 can be of the first type (N) or of the second type (P).
  • These islands 9 are arranged in space beds, in the thickness of at least layer 2 by localized epitaxy techniques, epitaxy by successive layers, by high energy ion implantation, by MBE (Beam Epitaxy Molecule) in association with pnotolithography procedures by masking or conventional procedures (oxidation, thermal diffusion, ion implantation with energy breakage).
  • MBE Beam Epitaxy Molecule
  • these islands 9 can take various profiles (square, rectangle, triangle, circle, hexagon, octagon, or more generally polygon ”) or be arranged in the form of bands of homogeneous patterns or plumes, possibly overlapping each other according to the layers or being positioned randomly, thus being able, depending on the shape of the patterns, to have overlapping zones in the thickness of the superimposed layers.
  • the islands 9 can be aligned or non-aligned, equid stants or non-equidistant, homogeneous or non-homogeneous, from the point of view of their characteristic directions (thickness, length and width).
  • the islands 9, of the first type or of the second type may have a uniform doping or a non-uniform doping: there may thus be a doping gradient or this doping may be distributed according to a Gaussian law or another distribution.
  • the islands 9 can have a geometric shape, when they have a polygonal section, which rounds in the corners.
  • FIG. 7 illustrates different configurations and distributions of islands 9.
  • the islands shown are hexagonal in a, in rhombus in b, squares in c and i, circular in d and g, octagonal in e and rectangular in f and triangular in h.
  • an island 9 may have in one of its characteristic directions, a dimension comprised for example in the range of 2 to 100 ⁇ m, and in the other of its characteristic directions, a dimension comprised for example in a range of 2 to 10 ⁇ , or practically in a ratio of 1 to 10 between the two characteristic directions.
  • each bed comprising between 1 and 500 islands 9, N varying from 1 to 50.
  • the inclusion of a plurality of 9-doped islands within a layer 2 of the first type or second type semiconductor substrate 1 makes it possible to create, in reverse operating mode (blocked state), a reduction in the global electric field by a distribution mechanism thereof at each of the islands.
  • the islands 9 are in the form of spaced networks (cf. FIG. 5).
  • FIG. 5 which illustrates a section of a Schottky diode according to the invention, the layer 3 of semiconductor of first or second type is shown in ohmic contact with the cathode, the other first or second type semiconductor layer 2, forming a Schottky barrier with the anode and in which the plurality of islands 9 are included.
  • These islands 9 are constituted in particular by semiconductor strips of the first type or of the second type; the choice of the type of islands 9 being however of the opposite type with respect to the type of the semiconductor layer in which they are included.
  • the inclusion of the islands 9 in the semiconductor substrate is therefore not continuous and therefore has mter-island spaces through which the current can flow between the anode and the cathode.
  • FIG. 6 shows the evolution of the value of the series resistance created in the layer within which the islands are incorporated, as a function of the reverse voltage withstand of the dipole; in this example, the dipole is a Schottky diode. From this FIG.
  • the operating mechanisms previously studied for a dipole, in particular of the Schottky diode type comprising a plurality of floating islands, are identical when these islands are included in a dipole structure of type, for example JBS diode, and the operating values, both in blocked mode and in passing mode, for such a dipole (cf. FIG. 8;, are identical to those found for equivalent devices of the prior art, but for a value of reverse voltage withstand which is of the order of 600 volts (100 to 200 volts approximately for the devices of the prior art), and which can go up to 1000 volts.
  • the main applications envisaged using this new semiconductor component substrate structure are in particular in the field of current rectification.
  • This component can find in particular developments in the field of lighting (electronic ballast).
  • This electronic component can also be used at the level of engine control, automotive electronics (rectifier component for alternator, or component integrated in integrated power circuits.

Abstract

The invention concerns a Schottky-diode semiconductor device, comprising a substrate consisting of first (2) and second (3) semiconductor layers having the same type of conduction tiered up in said substrate, the second layer (3) being more highly doped than the first (2), said substrate having first (4) and second (5) main surfaces in contact with first (8) and second (6) electrodes, a Schottky barrier being formed between the first electrode (8) and said first layer. The invention is characterised in that the plurality of islands (9) having a type of conduction opposite to that of the first layer (2) are arranged in beds spaced apart in the thickness of said layer (2).

Description

DISPOSITIF SEMI-CONDUCTEUR DU TYPE DIODE SCHOTTKYSEMICONDUCTOR DEVICE OF THE SCHOTTKY DIODE TYPE
La présente invention est relative à un dispositif semiconducteur et elle vise plus particulièrement des perfectionnements apportés à des diodes, du type Schottky, ou du type "J35 rectifier" Junction Barπer Schottky rectifier; .The present invention relates to a semiconductor device and it relates more particularly to improvements made to diodes, of the Schottky type, or of the "J35 rectifier" type. Junction Barπer Schottky rectifier; .
En effet, les dioαes Schottky sent basiqnement constituées d'un métal ou d'un alliage métallique placé sur un semiconducteur. Classiquement, la diode est constituée d'une région active de type N ou de type ?, placée sur une région de même type, c'est-à-dire ou ?, mais oeaucoup plus fortement dopée. Le métal réalisant le contact Schottky constitue l'anode, tandis que l'autre face du substrat qui est métallisée et qui constitue un contact ohmique, s'appelle la cathode.Indeed, the Schottky dioαes feels basically made of a metal or a metal alloy placed on a semiconductor. Conventionally, the diode consists of an active region of type N or of type?, Placed on a region of the same type, that is to say or?, But much more heavily doped. The metal making the Schottky contact constitutes the anode, while the other face of the substrate which is metallized and which constitutes an ohmic contact, is called the cathode.
On a l'habitude de définir pour les diodes, et notamment pour les diodes Schottky, deux types de fonctionnement, l'un en état bloqué, l'autre en état passant. Chacun de ces états est défini par ailleurs par une caractéristique de fonctionnement : la tenue en tension pour l'état bloqué et la chute de tension pour l'état passant.We are used to defining for the diodes, and in particular for the Schottky diodes, two types of operation, one in the blocked state, the other in the on state. Each of these states is further defined by an operating characteristic: the voltage withstand for the blocked state and the voltage drop for the on state.
Ainsi, la tenue en tension soutenue en inverse (état bloqué) dépend du dopage de la zone de type N ou de type P, et plus celui-ci est faible, plus la tenue en tension est élevée. Pour les diodes Schottky connues de l'art antérieur, fonctionnant en état bloqué, classiquement la limite de la tenue en tension se situe aux environs de 100 volts.Thus, the sustained voltage withstand in reverse (blocked state) depends on the doping of the N-type or P-type zone, and the lower this is, the higher the voltage withstand. For Schottky diodes known from the prior art, operating in an blocked state, conventionally the limit of the withstand voltage is around 100 volts.
La chute de tension à l'état passant est en fait la somme de la chute de tension dans la charge de couche de semiconducteur associée à la barrière Schottky, et de la chute de tension ohmique dans le semi-conducteur voiumique. Les valeurs de chute de tension communément rencontrées pour les diodes Schottky fonctionnant en état passant sont de l'ordre de 0,5 volt.The voltage drop in the on state is in fact the sum of the voltage drop in the semiconductor layer charge associated with the Schottky barrier, and the ohmic voltage drop in the semiconductor. The voltage drop values commonly encountered for Schottky diodes operating in the on state are of the order of 0.5 volts.
Afin d'améliorer les caractéristiques de fonctionnement tant dans l'état bloque que dans l'état passant des diodes Schottky, on a été amené à concevoir des diodes Schottky de type "JBS rectifier". Ces diodes de deuxième génération sont globalement structurellement identiques aux diodes Schottky précédentes, mais s'en distinguent néanmoins par le fait qu'elles comportent des mserts semi-conducteurs de type contraire au type de la couche de semi-conducteur associée à la barrière Schottky.In order to improve the operating characteristics both in the blocked state and in the on state of the Schottky diodes, it has been necessary to design Schottky diodes of the "JBS rectifier" type. These second generation diodes are globally structurally identical to the preceding Schottky diodes, but are nevertheless distinguished by the fact that they comprise semiconductor mserts of a type contrary to the type of the semiconductor layer associated with the Schottky barrier.
Cette disposition permet de limiter le mécanisme de réduction de la barrière Schottky sous haute tension appliquée et de limiter le courant inverse de la diode.This arrangement makes it possible to limit the reduction mechanism of the Schottky barrier under high applied voltage and to limit the reverse current of the diode.
Classiquement, la capacité en tenue en tension de ces dispositifs peut atteindre 200 volts environ et la chute de tension, à l'état passant, est de l'ordre de 0.25 volt.Conventionally, the capacity withstand voltage of these devices can reach approximately 200 volts and the voltage drop, in the on state, is of the order of 0.25 volts.
La présente invention vise donc à pallier les inconvénients des dispositifs connus de l'art antérieur, en proposant des perfectionnements apportés à ces dispositifs, qui permettent d'obtenir des caractéristiques de fonctionnement améliorées, tant en régime bloqué qu'en régime passant.The present invention therefore aims to overcome the drawbacks of the devices known from the prior art, by proposing improvements to these devices, which make it possible to obtain improved operating characteristics, both in blocked mode and in on mode.
On atteint ce but de l'invention avec un dispositif semi- conducteur du type diode Schottky, comprenant un substrat constitué de première et deuxième couches semi-conductrices d'un même type de conduction superposées dans ledit substrat, la deuxième couche étant plus fortement dopée que la première, ledit substrat présentant des première et deuxième surfaces principales en contact avec des première et deuxième électrodes, une barrière de Schottky étant formée entre ladite première électrode et ladite première couche, une pluralité d'îlots de type de conduction opposé a celui de ladite première couche étant disposes en lits espaces dans l'épaisseur de ladite couche.This object of the invention is achieved with a semiconductor device of the Schottky diode type, comprising a substrate consisting of first and second semiconductor layers of the same type of conduction superimposed in said substrate, the second layer being more heavily doped. that the first, said substrate having first and second main surfaces in contact with first and second electrodes, a Schottky barrier being formed between said first electrode and said first layer, a plurality of islands of opposite conduction type to that of said first layer being arranged in beds spaces in the thickness of said layer.
D'autres caractéristiques et avantages de la présente invention ressortiront de la descriptior faite ci-apres, en référence aux dessins annexes qui en illustrent un exemple de réalisation dépourvu de tout caractère limitatif. Sur les figures :Other characteristics and advantages of the present invention will emerge from the description made below, with reference to the accompanying drawings which illustrate an embodiment thereof devoid of any limiting character. In the figures:
- la figure 1 illustre la structure d'une diode Schottky ;- Figure 1 illustrates the structure of a Schottky diode;
- la figure 2 illustre la structure d'une diode du type JBS rectifier ;- Figure 2 illustrates the structure of a diode of the JBS type rectifier;
- la figure 3 illustre la répartition du champ électrique dans un exemple d'une structure comportant un îlot flottant volumique ;- Figure 3 illustrates the distribution of the electric field in an example of a structure comprising a volume floating island;
- la figure 4 montre l'évolution de l'ordre de grandeur du dopage en fonction du nombre d'îlots contenus dans un dispositif semi-conducteur ob et de l'invention ;- Figure 4 shows the evolution of the order of magnitude of doping as a function of the number of islets contained in a semiconductor device ob and of the invention;
- la figure 5 est une vue en coupe illustrant un dispositif semi-conducteur du type diode Schottky, selon l'invention ;- Figure 5 is a sectional view illustrating a semiconductor device of the Schottky diode type, according to the invention;
- la figure 6 illustre l'évolution de l'ordre de grandeur de la résistance série en fonction de la tenue en tension inverse pour différents nombres de lits d'îlots flottants ;- Figure 6 illustrates the evolution of the order of magnitude of the series resistance as a function of the reverse voltage withstand for different numbers of floating island beds;
- la figure 7 illustre quelques formes géométriques d'îlots flottants ;- Figure 7 illustrates some geometric shapes of floating islands;
- la figure 8 est une vue en coupe illustrant un dispositif semi-conducteur, du type diode JBS.- Figure 8 is a sectional view illustrating a semiconductor device, of the JBS diode type.
Selon un premier mode préfère de réalisation du dispositif semi-conducteur objet de l'invention (se reporter aux figures 1 et 5) , celui-ci comporte un substrat se i- conducteur 1 ayant deux surfaces principales 4, 5 disposées en opposition l'une par rapport à l'autre. Le substrat semi-conducteur 1 est composé d'une première région semi- conductrice 2, 3 d'un premier type de conduction ayant une première couche 2 dopée de type N (premier type ou donneur) ou dopée de type P (deuxième type ou accepteur) , et une seconde couche 3 dopée de type N (premier type ou donneur) ou dopée de type P (deuxième type accepteur) . La première couche 2 de premier type ou de second type, est adjacente à la première surface principale 4, tandis que la seconde couche 3, de premier ou de second type, est adjacente à la seconde surface principale 5.According to a first preferred embodiment of the semiconductor device which is the subject of the invention (see FIGS. 1 and 5), it comprises a substrate i- conductor 1 having two main surfaces 4, 5 arranged in opposition to one another. The semiconductor substrate 1 is composed of a first semiconductor region 2, 3 of a first type of conduction having a first layer 2 doped with N type (first type or donor) or doped with P type (second type or acceptor), and a second layer 3 doped with type N (first type or donor) or doped with type P (second type acceptor). The first layer 2 of the first or second type is adjacent to the first main surface 4, while the second layer 3 of the first or second type is adjacent to the second main surface 5.
Néanmoins, le substrat semi-conducteur comporte une première couche 2 et une seconde couche 3 qui sont de types identiques, c'est-à-dire toutes les deux de premier type, ou de second type.However, the semiconductor substrate comprises a first layer 2 and a second layer 3 which are of identical types, that is to say both of the first type, or of the second type.
La première surface principale 4 est recouverte d'une part avec un film périphérique 7 à base notamment d'oxyde et est agencée de manière à être en contact ohmique avec la première couche 2 au niveau d'une électrode centrale 8.The first main surface 4 is covered on the one hand with a peripheral film 7 based in particular on oxide and is arranged so as to be in ohmic contact with the first layer 2 at the level of a central electrode 8.
Cette électrode centrale 8 forme l'anode du dispositif et est réalisée au moyen d'un matériau formant un contact de type Schottky, avec le semi-conducteur.This central electrode 8 forms the anode of the device and is produced by means of a material forming a Schottky-type contact with the semiconductor.
Ce matériau est choisi parmi notamment le molybdène, le tungstène le platine, le palladium ou équivalent, il peut s'agir encore d'alliage métallique (siliciure .... ) .This material is chosen from in particular molybdenum, tungsten platinum, palladium or equivalent, it may also be a metallic alloy (silicide, etc.).
Cette électrode 8 est agencée de manière à être adjacente avec le film périphérique 7 et forme une barrière Schottky avec la première couche 2, au niveau de la zone sensiblement centrale du substrat semi-conducteur 1.This electrode 8 is arranged so as to be adjacent to the peripheral film 7 and forms a Schottky barrier with the first layer 2, at the level of the substantially central zone of the semiconductor substrate 1.
La seconde surface principale 5 coopère également avec une seconde électrode 6 qui est agencée de manière à être en contact ohmique avec la seconde couche 3. Cette électrode 6 réalisée dans un métal constitue la cathode du dispositif semi-conducteur objet de l'invention.The second main surface 5 also cooperates with a second electrode 6 which is arranged so as to be in ohmic contact with the second layer 3. This electrode 6 made of a metal constitutes the cathode of the semiconductor device which is the subject of the invention.
Selon une autre caractéristique la seconde couche 3 de premier type ou de second type présente un dopage plus important, en termes de quantité d'impuretés introduites dans la couche, par rapport a la première couche de premier ou de second type.According to another characteristic, the second layer 3 of the first type or of the second type exhibits a greater doping, in terms of quantity of impurities introduced into the layer, compared to the first layer of the first or second type.
On peut noter par exemple que les impuretés introduites dans la couche de premier type seront notamment de l'arsenic, du phosphore, tandis que les impuretés introduites dans la couche de second type seront notamment du bore .It may be noted, for example, that the impurities introduced into the first type layer will in particular be arsenic, phosphorus, while the impurities introduced into the second type layer will in particular be boron.
Selon un deuxième mode préfère de réalisation du dispositif semi-conducteur objet de l'invention (se reporter aux figures 2 et 8), celui-ci comporte un substrat semiconducteur 1 identique dans sa constitution au dispositif semi-conducteur 1 tel que décrit dans le premier mode préféré de réalisation, et diffère de celui-ci en ce qu'il comporte, dans la première couche 2 de premier type (N) ou de second type (P), une pluralité de régions semi- conductπces 10 de type contraire de conduction a celles qui l'entoure, la pluralité de régions 10 s 'étendant depuis la première surface principale 4 et depuis l'électrode 8 jusqu'à l'intérieur de la première couche 2.According to a second preferred embodiment of the semiconductor device which is the subject of the invention (see FIGS. 2 and 8), it comprises a semiconductor substrate 1 identical in its constitution to the semiconductor device 1 as described in the first preferred embodiment, and differs from it in that it comprises, in the first layer 2 of first type (N) or of second type (P), a plurality of semiconductor regions 10 of opposite type of conduction to those surrounding it, the plurality of regions 10 extending from the first main surface 4 and from the electrode 8 to the interior of the first layer 2.
Selon un troisième mode préféré de réalisation du dispositif semi-conducteur objet de l'invention, celui-ci comporte de manière beaucoup plus générale un substrat semi-conducteur 1 comprenant au moins une couche 2 ou 3 de premier type ou de second type de conduction dans laquelle et selon une caractéristique avantageuse de l'invention, on incorpore ou on inclut au sein de la couche 2 du substrat semi-conducteur 1 de premier type ou de second type, une pluralité d'îlots 9 de type contraire à celui du semiconducteur dans lequel ils sont places. Ainsi, ces îlots 9 peuvent être de premier type (N) ou de second type (P) . Ces îlots 9 sont disposes en lits espaces, dans l'épaisseur d'au moins la couche 2 par des techniques d'epitaxie localisée, d'epitaxie par couches successives, par implantation ionique a haute énergie, par MBE (Molécule Beam Epitaxy) en association avec des procèdes de pnotolithographie par masquage ou des procèdes classiques (oxydation, diffusion thermique, implantation ionique à casse énergie) .According to a third preferred embodiment of the semiconductor device which is the subject of the invention, it comprises in a much more general manner a semiconductor substrate 1 comprising at least one layer 2 or 3 of first type or second type of conduction in which and according to an advantageous characteristic of the invention, there is incorporated or included within the layer 2 of the semiconductor substrate 1 of the first type or of the second type, a plurality of islands 9 of a type opposite to that of the semiconductor in which they are placed. So these islets 9 can be of the first type (N) or of the second type (P). These islands 9 are arranged in space beds, in the thickness of at least layer 2 by localized epitaxy techniques, epitaxy by successive layers, by high energy ion implantation, by MBE (Beam Epitaxy Molecule) in association with pnotolithography procedures by masking or conventional procedures (oxidation, thermal diffusion, ion implantation with energy breakage).
Selon une autre caractéristique avantageuse de l'invention, ces îlots 9 peuvent prendre des profils varies (carre, rectangle, triangle, cercle, hexagone, octogone, ou plus généralement polygone...) ou être disposes sous forme de bandes de motifs homogènes ou panaches, se superposant éventuellement mutuellement suivant les couches ou étant positionnes de manière aléatoire, pouvant ainsi, suivant la forme des motifs, présenter des zones de recouvrement dans l'épaisseur des couches superposées.According to another advantageous characteristic of the invention, these islands 9 can take various profiles (square, rectangle, triangle, circle, hexagon, octagon, or more generally polygon ...) or be arranged in the form of bands of homogeneous patterns or plumes, possibly overlapping each other according to the layers or being positioned randomly, thus being able, depending on the shape of the patterns, to have overlapping zones in the thickness of the superimposed layers.
Les îlots 9 peuvent être alignes ou non alignes, equid stants ou non equidistants, homogènes ou non homogènes, du point de vue de leurs directions caractéristiques (épaisseur, longueur et largeur) .The islands 9 can be aligned or non-aligned, equid stants or non-equidistant, homogeneous or non-homogeneous, from the point of view of their characteristic directions (thickness, length and width).
Les îlots 9, de premier type ou de second type, peuvent présenter un dopage uniforme ou un dopage non uniforme : il peut exister ainsi un gradient de dopage ou ce dopage peut être réparti selon une loi gaussienne ou une autre distribution.The islands 9, of the first type or of the second type, may have a uniform doping or a non-uniform doping: there may thus be a doping gradient or this doping may be distributed according to a Gaussian law or another distribution.
Selon encore une autre caractéristique, les îlots 9 peuvent présenter une forme géométrique, lorsqu'ils possèdent une section polygonale, qui s'arrondit dans les coins.According to yet another characteristic, the islands 9 can have a geometric shape, when they have a polygonal section, which rounds in the corners.
A titre d'exemple, on pourra se reporter à la figure 7 qui illustre différentes configurations et distributions d'îlots 9. Les îlots représentes sont hexagonaux en a, en losange en b, carres en c et i, circulaire en d et g, octogonaux en e et rectangulaire en f et triangulaire en h.By way of example, reference may be made to FIG. 7 which illustrates different configurations and distributions of islands 9. The islands shown are hexagonal in a, in rhombus in b, squares in c and i, circular in d and g, octagonal in e and rectangular in f and triangular in h.
En outre, un îlot 9 peut présenter dans l'une de ses directions caractéristiques, une dimension comprise par exemple dans un intervalle de 2 a 100 μm, et dans l'autre de ses directions caractéristiques, une dimension comprise par exemple dans un intervalle de 2 a 10 μ , soit pratiquement dans un rapport de 1 a 10 entre les deux directions caractéristiques.In addition, an island 9 may have in one of its characteristic directions, a dimension comprised for example in the range of 2 to 100 μm, and in the other of its characteristic directions, a dimension comprised for example in a range of 2 to 10 μ, or practically in a ratio of 1 to 10 between the two characteristic directions.
Par ailleurs, on prévoit de disposer, par diode, N lits espacés d'îlots 9 dans la première couche 2, chaque lit comportant entre 1 et 500 îlots 9, N variant de 1 a 50.Furthermore, provision is made to have, by diode, N spaced beds of islands 9 in the first layer 2, each bed comprising between 1 and 500 islands 9, N varying from 1 to 50.
L'inclusion d'une pluralité d'îlots 9 dopes au sein d'une couche 2 du substrat semi-conducteur 1 de premier type ou de second type, permet de créer, en régime de fonctionnement inverse (état bloque) , une réduction du champ électrique global par un mécanisme de répartition de celui-ci au niveau de chacun des îlots.The inclusion of a plurality of 9-doped islands within a layer 2 of the first type or second type semiconductor substrate 1 makes it possible to create, in reverse operating mode (blocked state), a reduction in the global electric field by a distribution mechanism thereof at each of the islands.
Dans une telle structure (cf. figure 3), le champ électrique est divise par le nombre d'îlots et la tenue en tension inverse est donc accrue.In such a structure (see Figure 3), the electric field is divided by the number of islands and the reverse voltage withstand is therefore increased.
On démontre également que pour une tenue en tension fixée, le dopage de la couche dans laquelle sont incorporés les îlots est une fonction croissante du nombre d'îlots (cf. figure 4) .We also demonstrate that for a fixed voltage withstand, the doping of the layer in which the islands are incorporated is an increasing function of the number of islands (cf. FIG. 4).
En régime de fonctionnement direct (état passant) et afin de permettre le passage du courant entre l'anode et la cathode, les îlots 9 se présentent sous la forme de reseaux espacés (cf. figure 5) . Sur cette figure, qui illustre une coupe d'une diode Schottky selon l'invention, on a représenté la couche 3 de semi-conducteur de premier ou de second type en contact ohmique avec la cathode, l'autre couche de semi-conducteur 2 de premier ou de second type, formant une barrière Schottky avec l'anode et dans laquelle est incluse la pluralité d'îlots 9.In direct operating mode (on state) and in order to allow the passage of current between the anode and the cathode, the islands 9 are in the form of spaced networks (cf. FIG. 5). In this figure, which illustrates a section of a Schottky diode according to the invention, the layer 3 of semiconductor of first or second type is shown in ohmic contact with the cathode, the other first or second type semiconductor layer 2, forming a Schottky barrier with the anode and in which the plurality of islands 9 are included.
Ces îlots 9 sont constitues notamment par des bandes semi- conductπces de premier type ou de second type ; le choix du type des îlots 9 étant cependant du type contraire par rapport au type de la couche de semi-conducteur dans laquelle ils sont inclus.These islands 9 are constituted in particular by semiconductor strips of the first type or of the second type; the choice of the type of islands 9 being however of the opposite type with respect to the type of the semiconductor layer in which they are included.
L'inclusion des îlots 9 dans le substrat de semi-conducteur n'est donc pas continu et elle présente donc des espaces mter-îlots par lesquels le courant peut circuler entre l'anode et la cathode.The inclusion of the islands 9 in the semiconductor substrate is therefore not continuous and therefore has mter-island spaces through which the current can flow between the anode and the cathode.
Compte tenu que, globalement, le dopage de la zone de conduction est plus élevé que dans un dispositif standard, il en résulte une diminution de la resistivite et donc de la résistance, ce qui conduit a une chute de tension plus faible. A titre d'exemple, on pourra se reporter à la figure 6 qui montre l'évolution de la valeur de la résistance série créée dans la couche au sein de laquelle sont incorporés les îlots, en fonction de la tenue en tension inverse du dipôle ; dans cet exemple, le dipôle est une diode Schottky. A partir de cette figure 6, on peut en déduire que plus le nombre d'îlots est important, plus la résistance diminue, et par exemple, les dipôles selon l'invention (notamment les diodes Schottky) possédant des îlots 9 (N=20) , ayant une tenue en tension inverse de l'ordre de 600 volts, présentent des performances de résistance série et donc de chute de tension directe, identiques aux diodes Schottky de 100 volts de tenue en tension selon l'art antérieur.Given that, overall, the doping of the conduction zone is higher than in a standard device, this results in a decrease in resistivity and therefore in resistance, which leads to a lower voltage drop. By way of example, reference may be made to FIG. 6 which shows the evolution of the value of the series resistance created in the layer within which the islands are incorporated, as a function of the reverse voltage withstand of the dipole; in this example, the dipole is a Schottky diode. From this FIG. 6, it can be deduced that the greater the number of islands, the more the resistance decreases, and for example, the dipoles according to the invention (in particular the Schottky diodes) having islands 9 (N = 20 ), having a reverse voltage withstand on the order of 600 volts, have series resistance and therefore direct voltage drop performance, identical to the Schottky diodes with 100 volts withstand voltage according to the prior art.
Les mécanismes de fonctionnement précédemment étudiés pour un dipôle notamment du type diode Schottky comportant une pluralité d'îlots flottants, sont identiques lorsque ces îlots se trouvent inclus dans une structure de dipôle de type par exemple diode JBS, et les valeurs de fonctionnement, tant en régime bloque qu'en régime passant, pour un tel dipôle (cf. figure 8;, sont identiques a celles trouvées pour des dispositifs équivalents de l'art antérieur, mais pour une valeur de tenue en tension inverse qui est de l'ordre de 600 volts (100 a 200 volts environ pour les dispositifs de l'art antérieur), et qui peut aller jusqu'à 1000 volts.The operating mechanisms previously studied for a dipole, in particular of the Schottky diode type comprising a plurality of floating islands, are identical when these islands are included in a dipole structure of type, for example JBS diode, and the operating values, both in blocked mode and in passing mode, for such a dipole (cf. FIG. 8;, are identical to those found for equivalent devices of the prior art, but for a value of reverse voltage withstand which is of the order of 600 volts (100 to 200 volts approximately for the devices of the prior art), and which can go up to 1000 volts.
Les principales applications envisagées utilisant cette nouvelle structure de substrat de composant semi-conducteur sont notamment dans le domaine du redressement de courantThe main applications envisaged using this new semiconductor component substrate structure are in particular in the field of current rectification.
(alternatif/continu) , ou en tant que diode de roue libre en montage intègre ou en montage discret avec un autre composant qui assure une fonction d'interrupteur de puissance (commande des bobines ou bras de pont, hacheur, onduleur... ) .(alternating / continuous), or as a freewheeling diode in integral assembly or in discrete assembly with another component which performs a power switch function (control of the coils or bridge arms, chopper, inverter ...) .
Ce composant peut trouver notamment des développements dans le domaine de l'éclairage (ballast électronique) . On peut également utiliser ce composant électronique au niveau de la commande des moteurs, de l'électronique automobile (composant redresseur pour alternateur, ou composant intègre dans les circuits intègres de puissance.This component can find in particular developments in the field of lighting (electronic ballast). This electronic component can also be used at the level of engine control, automotive electronics (rectifier component for alternator, or component integrated in integrated power circuits.
Il demeure bien entendu que la présente invention n'est pas limitée aux exemples de réalisation décrits et représentes ci-dessus, mais qu'elle en englobe toutes les variantes. It remains to be understood that the present invention is not limited to the embodiments described and shown above, but that it encompasses all variants thereof.

Claims

RE VE N D I CAT I ON S RE VE NDI CAT I ON S
1. Dispositif semi-conducteur du type diode Schottky, comprenant un substrat constitué de première (2) et deuxième (3) couches semi-conductrices d'un même type de conduction superposées dans ledit substrat, la deuxième couche (3) étant plus fortement dopée que la première \ 2 ) , ledit substrat présentant des première (4) et deuxième (5) surfaces principales en contact avec des première ( Q et deuxième (6) électrodes, une barrière de Schottky étant formée entre ladite première électrode (8) et ladite première couche (2), caractérise en ce que la pluralité d'îlots (9) de type de conduction opposé à celui de ladite première couches (2) sont disposes en lits espacés oans l'épaisseur de ladite couche (2) .1. Semiconductor device of the Schottky diode type, comprising a substrate consisting of first (2) and second (3) semiconductor layers of the same conduction type superimposed in said substrate, the second layer (3) being more strongly doped as the first \ 2), said substrate having first (4) and second (5) main surfaces in contact with first (Q and second (6) electrodes, a Schottky barrier being formed between said first electrode (8) and said first layer (2), characterized in that the plurality of islands (9) of conduction type opposite to that of said first layers (2) are arranged in beds spaced apart within the thickness of said layer (2).
2. Dispositif selon la revendication 1, caractérisé en ce qu'il comporte, dans la première couche (2), une pluralité de régions semi-conductrices (10) de type de conduction contraire a celui des parties de la couche (2) qui les entoure, la pluralité de régions (10) s 'étendant depuis la surface principale (4) et depuis l'électrode (8) jusqu'à l'intérieur de la couche (2) .2. Device according to claim 1, characterized in that it comprises, in the first layer (2), a plurality of semiconductor regions (10) of conduction type opposite to that of the parts of the layer (2) which surrounds them, the plurality of regions (10) extending from the main surface (4) and from the electrode (8) to the interior of the layer (2).
3. Dispositif selon l'une quelconque des revendications 1 et 2 , caractérisé en ce que les îlots (9) sont de profils variés.3. Device according to any one of claims 1 and 2, characterized in that the islands (9) have varied profiles.
4. Dispositif selon l'une quelconque des revendications 1 à4. Device according to any one of claims 1 to
3, caractérisé en ce que les îlots (9) sont disposés sous forme de bandes de motifs homogènes ou panachés, se superposant éventuellement mutuellement suivant les couches ou étant positionnés de manière aléatoire, pouvant ainsi, suivant la forme des motifs, présenter des zones de recouvrement dans l'épaisseur des couches superposées.3, characterized in that the islands (9) are arranged in the form of strips of homogeneous or variegated patterns, possibly overlapping mutually according to the layers or being positioned randomly, thus being able, depending on the shape of the patterns, to present zones of overlap in the thickness of the superimposed layers.
5. Dispositif selon l'une quelconque des revendications 1 à5. Device according to any one of claims 1 to
4, caractérisé en ce que les îlots (9) sont alignés. o. Dispositif selon l'une quelconque des revendications 1 a 4, caractérise en ce que les îlots (9) sont non alignes.4, characterized in that the islands (9) are aligned. o. Device according to any one of claims 1 to 4, characterized in that the islands (9) are non-aligned.
7. Dispositif selon l'une quelconque des revendications 1 a 4, caractérise en ce que les îlots (9) sont equidistants.7. Device according to any one of claims 1 to 4, characterized in that the islands (9) are equidistant.
3. Dispositif selon l'une quelconque des revendications 1 a3. Device according to any one of claims 1 a
4, caractérise en ce que les îlots (9) sont non equidistants.4, characterized in that the islands (9) are not equidistant.
9. Dispositif selon l'une quelconque des revendications 1 a 4, caractérise en ce que les îlots (9) sont homogènes.9. Device according to any one of claims 1 to 4, characterized in that the islands (9) are homogeneous.
10. Dispositif selon l'une quelconque des revendications 1 a 4, caractérise en ce que les îlots (9) sont non homogènes .10. Device according to any one of claims 1 to 4, characterized in that the islands (9) are non-homogeneous.
11. Dispositif selon l'une quelconque des revendications 1 a 10, caractérise en ce que les îlots (9) présentent un dopage uniforme.11. Device according to any one of claims 1 to 10, characterized in that the islands (9) have uniform doping.
12. Dispositif selon l'une quelconque des revendications 1 a 10, caractérise en ce que les îlots (9) présentent un dopage non uniforme.12. Device according to any one of claims 1 to 10, characterized in that the islands (9) have non-uniform doping.
13. Dispositif selon l'une quelconque des revendications 1 a 12, caractérise en ce que les îlots (9) présentent une forme géométrique qui s'arrondit dans les coins.13. Device according to any one of claims 1 to 12, characterized in that the islands (9) have a geometric shape which rounds off in the corners.
14. Dispositif selon l'une quelconque des revendications 1 a 13, caractérise en ce que la première couche (2) comprend N lits espaces d'îlots (9) chaque lit comportant entre 1 et 500 îlots (9), N variant de 1 a 50.14. Device according to any one of claims 1 to 13, characterized in that the first layer (2) comprises N beds island spaces (9) each bed comprising between 1 and 500 islands (9), N varying from 1 at 50.
15. Dispositif selon l'une quelconque des revendications 1 a 14, caractérise en ce qu'il possède une tenue en tension inverse pouvant être comprise entre 103 et 1000 volts, de préférence 600 volts.15. Device according to any one of claims 1 to 14, characterized in that it has a voltage withstand reverse which can be between 103 and 1000 volts, preferably 600 volts.
16. Application du dispositif selon l'une quelconque des revendications 1 a 15, caractérisée en ce que le dispositif est utilise dans le domaine du redressement de courant.16. Application of the device according to any one of claims 1 to 15, characterized in that the device is used in the field of current rectification.
17. Application du dispositif selon l'une quelconque des revendications 1 a 15, caractérisée en ce que le dispositif est utilise en tant que diode de roue libre en montage intégre ou en montage discret avec le composant interrupteur de puissance.17. Application of the device according to any one of claims 1 to 15, characterized in that the device is used as a freewheeling diode in integrated assembly or in discrete assembly with the power switch component.
18. Application du dispositif selon l'une quelconque des revendications 1 a 15, caractérisée en ce que le dispositif est utilise dans le domaine de l'éclairage.18. Application of the device according to any one of claims 1 to 15, characterized in that the device is used in the field of lighting.
19. Application du dispositif selon l'une quelconque des revendications 1 a 15, caractérisée en ce que le dispositif est utilisé au niveau de la commande des moteurs, de l'électronique automobile. 19. Application of the device according to any one of claims 1 to 15, characterized in that the device is used in the control of motors and automotive electronics.
EP01923789A 2000-04-10 2001-04-10 Schottky-diode semiconductor device Withdrawn EP1273046A2 (en)

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Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002084745A2 (en) 2001-04-11 2002-10-24 Silicon Wireless Corporation Power semiconductor devices and methods of forming same
US7442629B2 (en) 2004-09-24 2008-10-28 President & Fellows Of Harvard College Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate
US7057256B2 (en) 2001-05-25 2006-06-06 President & Fellows Of Harvard College Silicon-based visible and near-infrared optoelectric devices
US7238976B1 (en) * 2004-06-15 2007-07-03 Qspeed Semiconductor Inc. Schottky barrier rectifier and method of manufacturing the same
US8004049B2 (en) 2004-08-31 2011-08-23 Freescale Semiconductor, Inc. Power semiconductor device
US7671439B2 (en) * 2005-02-11 2010-03-02 Alpha & Omega Semiconductor, Ltd. Junction barrier Schottky (JBS) with floating islands
US7737522B2 (en) * 2005-02-11 2010-06-15 Alpha & Omega Semiconductor, Ltd. Trench junction barrier controlled Schottky device with top and bottom doped regions for enhancing forward current in a vertical direction
DE102005046706B4 (en) 2005-09-29 2007-07-05 Siced Electronics Development Gmbh & Co. Kg JBS-SiC semiconductor device
JP5351519B2 (en) * 2005-12-27 2013-11-27 パワー・インテグレーションズ・インコーポレーテッド Apparatus and method for fast recovery rectifier structure
US7633135B2 (en) * 2007-07-22 2009-12-15 Alpha & Omega Semiconductor, Ltd. Bottom anode Schottky diode structure and method
US7560355B2 (en) * 2006-10-24 2009-07-14 Vishay General Semiconductor Llc Semiconductor wafer suitable for forming a semiconductor junction diode device and method of forming same
DE102007009227B4 (en) * 2007-02-26 2009-01-02 Infineon Technologies Ag Semiconductor device with rectifying transitions and manufacturing method for producing the same
US7750426B2 (en) * 2007-05-30 2010-07-06 Intersil Americas, Inc. Junction barrier Schottky diode with dual silicides
TW200847448A (en) * 2007-05-30 2008-12-01 Intersil Inc Junction barrier schottky diode
US8368166B2 (en) * 2007-05-30 2013-02-05 Intersil Americas Inc. Junction barrier Schottky diode
JP2007311822A (en) * 2007-07-23 2007-11-29 Toshiba Corp Schottky barrier diode
JP2009076866A (en) * 2007-08-31 2009-04-09 Sumitomo Electric Ind Ltd Schottky barrier diode
US9102962B2 (en) * 2007-10-16 2015-08-11 Shiu Nan Chen Production method for solid cultured active mushroom mycelium and fruit-body metabolites (AMFM) products thereof
US8212327B2 (en) * 2008-03-06 2012-07-03 Sionyx, Inc. High fill-factor laser-treated semiconductor device on bulk material with single side contact scheme
US7851881B1 (en) * 2008-03-21 2010-12-14 Microsemi Corporation Schottky barrier diode (SBD) and its off-shoot merged PN/Schottky diode or junction barrier Schottky (JBS) diode
US8106487B2 (en) * 2008-12-23 2012-01-31 Pratt & Whitney Rocketdyne, Inc. Semiconductor device having an inorganic coating layer applied over a junction termination extension
US9911781B2 (en) 2009-09-17 2018-03-06 Sionyx, Llc Photosensitive imaging devices and associated methods
US9673243B2 (en) 2009-09-17 2017-06-06 Sionyx, Llc Photosensitive imaging devices and associated methods
US8692198B2 (en) 2010-04-21 2014-04-08 Sionyx, Inc. Photosensitive imaging devices and associated methods
CN103081128B (en) 2010-06-18 2016-11-02 西奥尼克斯公司 High-speed light sensitive device and correlation technique
US9496308B2 (en) 2011-06-09 2016-11-15 Sionyx, Llc Process module for increasing the response of backside illuminated photosensitive imagers and associated methods
JP2014525091A (en) 2011-07-13 2014-09-25 サイオニクス、インク． Biological imaging apparatus and related method
US8362585B1 (en) 2011-07-15 2013-01-29 Alpha & Omega Semiconductor, Inc. Junction barrier Schottky diode with enforced upper contact structure and method for robust packaging
US9064764B2 (en) 2012-03-22 2015-06-23 Sionyx, Inc. Pixel isolation elements, devices, and associated methods
WO2014127376A2 (en) 2013-02-15 2014-08-21 Sionyx, Inc. High dynamic range cmos image sensor having anti-blooming properties and associated methods
US9939251B2 (en) 2013-03-15 2018-04-10 Sionyx, Llc Three dimensional imaging utilizing stacked imager devices and associated methods
JP2014236171A (en) * 2013-06-05 2014-12-15 ローム株式会社 Semiconductor device and method of manufacturing the same
WO2014209421A1 (en) 2013-06-29 2014-12-31 Sionyx, Inc. Shallow trench textured regions and associated methods
US9070790B2 (en) * 2013-08-29 2015-06-30 Infineon Technologies Ag Vertical semiconductor device and method of manufacturing thereof
US9704949B1 (en) * 2016-06-30 2017-07-11 General Electric Company Active area designs for charge-balanced diodes
CN116093164B (en) * 2023-04-07 2023-07-11 深圳市晶扬电子有限公司 High-voltage Schottky diode with floating island type protection ring

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4837227B1 (en) * 1968-12-20 1973-11-09
GB1558506A (en) * 1976-08-09 1980-01-03 Mullard Ltd Semiconductor devices having a rectifying metalto-semicondductor junction
JPH06275816A (en) * 1993-03-18 1994-09-30 Shindengen Electric Mfg Co Ltd Schottky barrier diode
JP3983285B2 (en) * 1994-12-20 2007-09-26 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴイ Circuit that operates the load by the supply voltage
US6037632A (en) * 1995-11-06 2000-03-14 Kabushiki Kaisha Toshiba Semiconductor device
JPH10117003A (en) * 1996-10-14 1998-05-06 Hitachi Ltd Fixed voltage diode and its manufacture
WO1999053550A1 (en) * 1998-04-08 1999-10-21 Siemens Aktiengesellschaft High-voltage edge termination for planar structures
DE19943143B4 (en) * 1999-09-09 2008-04-24 Infineon Technologies Ag Semiconductor device for high reverse voltages with low on-resistance and method for its production
DE10061528C1 (en) * 2000-12-11 2002-07-25 Infineon Technologies Ag Semiconductor component controllable by field effect

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO0178152A2 *

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AU2001250477A1 (en) 2001-10-23
US20040046224A1 (en) 2004-03-11
JP2003530700A (en) 2003-10-14
FR2807569B1 (en) 2004-08-27
FR2807569A1 (en) 2001-10-12
WO2001078152A3 (en) 2002-02-07
KR20030011820A (en) 2003-02-11

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