EP1222143A1

EP1222143A1 - Method for production of a semiconductor component and a semiconductor component produced by said method

Info

Publication number: EP1222143A1
Application number: EP01940181A
Authority: EP
Inventors: Hubert Benzel; Heribert Weber; Hans Artmann; Frank Schaefer
Original assignee: Robert Bosch GmbH
Current assignee: Robert Bosch GmbH
Priority date: 2000-07-05
Filing date: 2001-04-20
Publication date: 2002-07-17
Also published as: US7037438B2; KR20020060170A; JP2004502555A; US8123963B2; US20060014392A1; JP5100949B2; US20020170875A1; US20080286970A1; DE10032579A1; EP1810947A2; EP1810947A3; USRE44995E1; WO2002002458A1; US7479232B2; EP1810947B1; DE10032579B4; KR100859613B1

Abstract

The invention relates to a method for the production of a semiconductor component (100; ; 2200), in particular, a multi-layered semiconductor component, preferably a micromechanical component, such as, in particular, a pressure sensor, comprising a semiconductor substrate (101), in particular, made from silicon and a semiconductor component produced by said method. The invention particularly relates to the reduction of the production costs of such a semiconductor component by developing the method such that, in a first step, a first porous layer (104; 1001; 1301) is formed in the semiconductor component and, in a second step, a cavity or a cavern (201; 1101; 1201; 1401; 2101; 2201) is formed under, or from, the first porous layer (104; 1001; 1301) in the semiconductor component. Said cavity or cavern can be provided with an external entry opening.

Description

Method for producing a semiconductor component and a semiconductor component produced by the method

State of the art

The invention is based on a method for producing a semiconductor component, such as, in particular, a multilayer semiconductor component, and on a semiconductor component produced in accordance with the method according to the type of the relevant independent claim.

Semiconductor components, such as, in particular, micromechanical pressure sensors, are generally produced in so-called bulk or surface micromechanics. The production of bulk micromechanical components is relatively complex and therefore expensive. In known surface micromechanical components, the production of a cavern is complex. A common process sequence for producing a cavern in surface micromechanics consists in particular of depositing a sacrificial layer, depositing a membrane layer, which usually consists of polysilicon, creating openings in the membrane layer or opening a lateral etching channel, etching out the sacrificial layer and closing it of the openings, whereby the internal cavern pressure is defined when closing. Surface micromechanical pressure sensors produced in this way also have the disadvantage that a pressure acting on them can usually only be evaluated using a capacitive method. A piezoresistive evaluation of the pressure acting on them is difficult, since it is only possible to produce piezoresistive resistors from polycrystalline silicon using known surface micro-mechanical methods. Compared to piezoresistive resistors made of single-crystal silicon, these have the disadvantage of low long-term stability, and they also have a low piezoelectric effect.

Advantages of the invention

The method according to the invention with the characterizing features of the relevant independent claim has in contrast In particular, the advantage that a micromechanical component, such as, in particular, a pressure sensor with piezoresistive resistors made of single-crystal silicon, a capacitive pressure sensor, or a pressure sensor that has resistors whose resistance changes due to the deflection of a membrane of the pressure sensor when pressure is applied, is simple and inexpensive Surface micromechanics can be produced. The measures listed in the dependent claims enable advantageous further developments and improvements of the method and the semiconductor component according to the relevant independent claims.

An essential aspect of the invention consists in creating a cavern or a cavity in a semiconductor substrate, such as in particular in a silicon substrate, with an etching medium. For this purpose, the cover layer of the substrate is etched in the region of the subsequently produced cavern in such a way that openings or etching openings, such as, in particular, pores or cavities are formed in it. The etching medium or one or more further etching media reaches deeper regions of the substrate via the etching openings or pores open to the outside. The part of the semiconductor substrate decomposed in this area by the etching medium or by the further etching media is preferably removed via the openings or pores of the cover layer and / or via an external access opening to this area. The cover layer preferably has a thickness of approximately 2 to 10 μm, in particular 3 to 5 μm. In the case of an access opening, instead of a porous cover layer of approximately 2 to 10 μm, a porous cover layer is preferably formed, which preferably has a thickness of approximately 40 to 80 μm, in particular 50 to 60 μm. The greater thickness has the purpose that the cover layer can serve as an etching buffer layer when etching the access opening and thus enables a reliable etching stop in front of an epitaxial layer deposited on the cover layer. In the case of a pressure sensor, the epitaxial layer deposited on the cover layer forms the actual sensor membrane.

In a preferred embodiment of the invention, measures are taken during the etching process which ensure that the rate of expansion of the pores in the cover layer is lower, is preferably significantly lower than the rate of expansion of the pores or cavities in the region of the substrate which forms the later cavity or the cavern.

This is achieved according to an advantageous embodiment of the invention, in that the etching parameters and / or the etching media or the etching media in the cover layer and the etching parameters and / or the etching media or the etching media or the etching media in the area of the later Caverns are chosen differently.

This is particularly advantageous in that the porosity of the cover layer for the removal of the silicon to be decomposed for the manufacture of the cavern can preferably only be set to an appropriately large extent in a manner which is easy to control in terms of process technology. On the other hand, the cavern can be manufactured quickly and therefore inexpensively.

According to a preferred embodiment of the invention, it is provided to set the etching parameters in such a way and / or to select the etching medium or media during the etching of the cavern in such a way that the rate of expansion of the pores or cavities is so high that the pores or cavities very quickly " overlap ". This initially creates a single, largely flat exit cavity in the substrate, which expands in depth as time progresses and forms the cavern.

In a preferred embodiment of the invention, which is an alternative to the immediately preceding embodiment, it is provided that the etching parameters and / or the etching media or the etching media during etching of the cavern are selected such that the porosity of the region of the substrate which forms the later cavern is greater than the porosity the top layer is. The precursor of the later cavern preferably has a porosity of more than 80%. Preferably, the cavern is subsequently formed from the porous area of the substrate by executing one or more tempering steps, preferably above approximately 900 ° C.

In the case of heat treatment, preferably under a hydrogen, nitrogen or inert gas atmosphere, such as at temperatures above about 900 ° C., the pores arrange themselves in the area of the silicon that forms the the later cavern forms, with a porosity of approximately more than 80%, whereby a single large pore, i.e. a cavity or a cavern, is created under the slightly porous cover layer or starting layer for an epitaxial layer to be subsequently deposited. The pores on the top of the slightly porous layer or starting layer are largely closed in this high-temperature step, so that a largely monocrystalline silicon layer, which forms the actual sensor membrane, can be deposited on the starting layer.

According to a preferred embodiment of the invention, the etching medium and / or the etching media for producing the openings and / or pores in the cover layer and / or for producing the cavern are hydrofluoric acid (HF) or a liquid mixture or a chemical compound, which contains hydrofluoric acid.

In a preferred embodiment of the invention, the etching medium or the etching media is a volatile component, preferably an alcohol, such as. B. ethanol, and / or purified water to dilute the etching medium or the etching media.

Ethanol reduces the surface tension of an etching medium provided with it, which enables better wetting of the silicon surface and a better penetration of the etching medium into etched pores or openings or cavities. Furthermore, the bubbles formed during the etching process are smaller than without the addition of ethanol to the etching medium and the bubbles can thus escape better through the pores of the cover layer. Therefore, the pore size and / or the porosity of the cover layer can advantageously be kept smaller than without the addition of the alcohol.

In a further preferred embodiment of the invention, the openings and / or pores in the cover layer and / or in the area of the subsequent cavern are produced using an electrochemical process, preferably using the aforementioned etching medium or the aforementioned etching media.

Furthermore, in a preferred embodiment of the invention using an electrochemical etching process, preferably an etching process using hydrofluoric acid (HF), the To influence the rate of expansion of the pores or cavities formed during the etching process by the application of an electrical voltage and an electrical current caused thereby through the etching medium or the etching media. The rate of expansion of the pores or cavities depends in particular on the doping of the silicon substrate to be etched, the current density, possibly the HF concentration in the etching medium and the temperature. It goes without saying that these are merely examples of relevant process parameters of an etching process according to the invention.

According to a preferred embodiment of the invention, the etching medium, the HF concentration in the etching medium and / or the doping of the area to be etched and / or the temperature and optionally further process parameters of the etching process are selected such that the

Set the etching process or the pore or cavity formation in a suitable manner and / or can be switched off when the electrical voltage is switched off, preferably largely abruptly.

In an electrochemical etching method preferred according to the invention with a single etching medium and / or with two or more etching media, a first current density in the etching medium, which is not necessarily constant over time, is set in a first period during which the etching medium is in the region of the cover layer. During a second period in which the etching medium in question is located in the area of the cavern to be created, a second current density, which is not necessarily constant over time, is preferably set, which is higher or significantly higher than the current density set during the first period.

As a result, the cavern or a preliminary stage of the cavern is formed by pores or cavities whose rate of expansion during the etching process of the cavern is higher or significantly higher than the rate of expansion of the pores for producing the porous cover layer.

In a further preferred embodiment of the invention it is provided that the porous area of the top surface of the substrate is etched with a mask layer or To surround support layer, which allows or allow free access of the etching medium or the etching media to the porous area to be etched and which shields the non-porous areas of the top surface of the substrate against an etching attack.

According to a preferred embodiment of the invention, the support layer is such that it mechanically fixes the porous area or the porous layer of the cover surface and after the cavern is etched on the non-etched part of the substrate.

In a preferred embodiment of the invention, the support layer is created prior to the etching of the region to be etched porously or the layer to be etched, in that at least the region around the porous layer to be etched is provided with an n-doping on the top surface of a p-doped silicon substrate becomes. This largely prevents the substrate from being "undercut", particularly in the area in which the porous-etched layer is mechanically bonded to the silicon substrate.

Otherwise there would be the danger, in particular in the case of a preferably thin porous layer or starting layer, that this would become detached from the substrate. In addition, a silicon nitride layer can be used as a mask and, in particular, to protect against an etching attack from possibly underlying electronic circuits.

Alternatively or in addition, a metal layer or metal mask can be provided instead of the n-doping or an n-doped layer, which likewise largely prevents the substrate from being undercut. However, the use of a metal layer or metal mask will generally only be expedient if no circuits are to be provided in the substrate, since otherwise metal atoms remaining in the substrate even after removal of the metal layer or metal mask could impair the function of the circuits.

In a further preferred embodiment of the invention, it is provided to pretreat a porous-etched cover layer, such as in particular a silicon layer, before an epitaxial layer, preferably a largely monocrystalline layer, is applied to it Silicon layer, is applied or deposited. The pretreatment pursues the goal of completely or partially closing the pores in the porous-etched cover layer or starting layer in order to further improve the quality of the largely monocrystalline silicon layer, if necessary or expedient.

A pretreatment according to the invention can consist in tempering the porous-etched cover layer or starting layer, the tempering being carried out at a high temperature, for example at a temperature in the range from approximately 900 ° C. to approximately 1100 ° C. The heat treatment is preferably carried out under a hydrogen, nitrogen and / or a noble gas atmosphere.

As an alternative or in addition to the aforementioned pretreatment, a (slight) oxidation of the porous-etched silicon starting layer can be provided. The oxidation is preferably carried out with (slight) addition of oxygen into the atmosphere to which the starting layer in the reactor is exposed, the oxidation preferably taking place at a temperature in the range from about 400 ° C. to 600 ° C. Minor is to be understood as an oxidation which largely only partially or completely closes the pores of the starting layer and forms an approximately network-like oxide structure. According to the invention, the oxide structure should cover the surface of the porously etched starting layer as little as possible in order to ensure that a silicon layer which is as single-crystalline as possible can be deposited on the starting layer and forms the actual sensor membrane. If necessary, the oxidation is removed in a subsequent process step until this desired state occurs.

In a preferred embodiment of the invention, the thickness of the starting layer is significantly smaller than the thickness of the silicon layer deposited on it, so that the physical behavior of the sensor membrane is largely determined by the thickness of the silicon layer, which can be adjusted in terms of process technology.

According to a preferred embodiment of the invention, the slightly porous layer or starting layer for the deposition of an epitaxial layer, which for example forms the membrane of a pressure sensor, is etched with an etching medium which has a hydrofluoric acid concentration (HF concentration) in the range from approximately 20% to approximately 50%, preferably approximately 30% to approximately 40%, in particular approximately 33%.

In a further preferred embodiment of the invention, the porous layer, which forms a precursor of the later cavity or the cavern, is etched with an etching medium which has a hydrofluoric acid concentration (HF concentration) in the range from approximately 0% to approximately 40%, preferably about 5% to about 20%, in particular less than about 20. The remaining part of the etching medium, which is not formed by hydrofluoric acid, preferably consists largely of an alcohol, such as, in particular, ethanol.

In order to achieve a high rate of expansion of the pores or cavities in the layer to be decomposed during an etching step according to the invention for forming a cavity or a cavern, in which the pores or cavities "overlap" very quickly and thus a single "giant pore" form, an inventive etching medium is provided in an embodiment of the invention. The etching medium according to the invention has a hydrofluoric acid concentration (HF concentration) in the range from approx. 0% to approx. 5%, preferably approx. 1% to approx. 3%, in particular less than approx. 5% on. The remaining part of this etching medium, which is not formed by hydrofluoric acid, preferably consists largely of an alcohol, such as, in particular, ethanol, and / or of purified water.

drawings

The method according to the invention for producing a multilayer semiconductor component according to the invention is explained in more detail below using the example of pressure sensors using schematic drawings, which are not necessarily to scale, the same reference symbols denoting identical or equivalent layers or parts. 1 shows a first preferred variant of a preliminary stage of a pressure sensor according to the invention after the production of a silicon membrane with low porosity in a silicon substrate with one below the Silicon membrane lying porous silicon layer with high porosity - in cross section;

Fig. 2 shows the first preliminary stage shown in Fig. 1 after the one lying under the silicon membrane

Silicon layer with high porosity has become a cavity - in cross section;

Fig. 3 shows a first variant of another based on the preliminary stage shown in Fig. 2

Pre-stage of a pressure sensor after the porous silicon membrane has been pretreated and then provided with an epitaxial layer, which forms the actual membrane of the pressure sensor - in cross section;

Fig. 4 shows a second variant of a based on the in

FIG. 2 shows the preliminary stage of a further preliminary stage of a pressure sensor, after the porous silicon membrane has been provided with an epitaxial layer, which forms the actual membrane of the pressure sensor - in cross section;

Fig. 5 a manufactured on the basis of the preliminary stage shown in Figures 3 or 4

Absolute pressure sensor, which has been provided with monocrystalline, piezoresistive resistors and doped leads - in cross section;

FIG. 6 shows the absolute pressure sensor shown in FIG. 5, which has been provided with circuits integrated in the sensor - in cross section;

7 shows a first variant of a differential pressure sensor according to the invention with an access opening and a lateral channel to the cavity - in cross section;

8 shows the outline of the membrane area of the differential pressure sensor shown in FIG. 7 - in a top view; Fig. 9 shows a second variant of an inventive

Differential pressure sensor with an access opening to the cavity - in cross section; 10 shows a preliminary stage of a third variant of a differential pressure sensor according to the invention with a single thick porous layer - in cross section;

FIG. 11 shows the preliminary stage shown in FIG. 10 with a first access opening - in cross section;

FIG. 12 shows the preliminary stage shown in FIG. 10 with a second access opening - in cross section;

13 shows a preliminary stage of a fourth variant of a differential pressure sensor according to the invention with a porous layer which extends to the underside of the substrate - in cross section;

FIG. 14 shows the preliminary stage shown in FIG. 13 after the porous layer extending to the underside of the substrate has been removed - in cross section;

15 shows a preliminary stage of a capacitive absolute pressure sensor according to the invention - in cross section;

Fig. 16 shows the preliminary stage shown in Fig. 15 after the

Generation of a porous silicon membrane with a cavity lying under the silicon membrane - in cross section;

17 shows a first variant of a preliminary stage of a

Pressure sensor with resistors, the resistance of which changes due to the deflection of a membrane of the pressure sensor when pressurized

Cross-section;

18 shows a second variant of a preliminary stage of a

Pressure sensor with resistors, the resistance of which changes due to the deflection of a membrane Pressure sensor when pressurized changes in cross-section;

FIG. 19 shows the preliminary stage shown in FIG. 17 after the creation of a porous silicon membrane in the silicon epitaxial layer deposited on the silicon substrate with a cavity lying under the silicon membrane - in cross section;

FIG. 20 shows the further preliminary stage shown in FIG. 19 after the porous silicon membrane has been provided with a sealing layer - in cross section;

FIG. 21 shows a first variant of a differential pressure sensor which has been produced on the basis of the absolute pressure sensor shown in FIG. 20 - in cross section; and

22 shows a second variant of a differential pressure sensor which has been produced on the basis of the absolute pressure sensor shown in FIG. 20 - in cross section.

1 shows a preferred variant of a preliminary stage 100 of the absolute pressure sensor 500 shown in FIG. 5 - in cross section. In order to produce the absolute pressure sensor 500 shown in FIG. 5, a mask layer 102 is first produced on the upper side of a silicon substrate 101, an area 103 not covered by the mask layer 102 being created. The mask layer can be, for example, a nitride layer, an n-doped layer (in the case of p-doped silicon substrate) or another suitable layer which is largely unaffected by the etching medium used below.

The top of the silicon substrate 101 is electrochemically etched using a suitable etching medium such that the etching medium creates small openings or pores in the silicon substrate 101 immediately below the uncovered area 103. It a silicon layer 104 with low porosity is formed. Through these small openings or pores of the silicon layer 104, the etching medium reaches lower regions of the silicon substrate 101 and likewise forms pores in the silicon located there. This creates a porous silicon layer 105 below the porous silicon layer 104.

The etching medium for electrochemical etching, in particular wet etching, is preferably hydrofluoric acid (HF) or an etching medium which u. a. Contains hydrofluoric acid (HF). According to the invention, an electric field is preferably generated between the top and the bottom of the silicon substrate 101, the rate of expansion of the pores or openings or cavities being influenced by the set electric field strength or the set electric current density.

In a preferred electrochemical etching method according to the invention, precursors of the pressure sensors to be etched are placed in a trough-shaped vessel which is filled with the etching medium, and an electrical voltage is applied to opposite ends of the etching medium in such a way that the electric field arises.

In order to ensure that the porous silicon layer 104 arises in the area immediately below the area 103 which is recessed by the mask layer 102, a not necessarily constant electrical current density is set in a first step after the etching medium has been applied to the uncovered area 103. It is preferably selected such that openings or pores are formed in the silicon substrate 101 directly under the uncovered area 103.

Another important criterion for the not necessarily constant electrical current density set in the first step is to set such an electrical current density at which suitable openings or pores in the

Silicon substrate 101 arise directly under the uncovered area 103. Openings or pores are particularly suitable which subsequently permit a largely formed on the porous silicon layer 104 formed during the etching process to deposit monocrystalline silicon layer, which forms the actual sensor membrane. Therefore, the openings or pores may only have an adequate size or diameter. Preferred openings or pores have, for example, a diameter of approximately 10 to 100 nm, preferably approximately 10-30 nm.

It is understood that this is only an example of suitable openings or pores.

After the etching medium has penetrated the porous silicon layer 104, the current density is preferably increased in a second step in comparison to the current density during the first step, as a result of which the pore or cavity expansion speed is increased and larger pores in the silicon layer 105 compared to the pores in FIG of the porous silicon layer 104 arise.

The silicon decomposed by the etching medium is removed during the etching process and / or subsequently via the openings or pores in the porous silicon layer 104 and “fresh” etching medium is introduced.

In the preferred first variant of the method according to the invention for producing the preliminary stage of a pressure sensor or a cavity shown in FIG. 1, the etching process for producing the later cavity 201 (FIG. 2) is carried out by selecting suitable process parameters and / or one or more suitable ones Etching media set such that the porosity of the silicon layer 105, which forms the later cavity 201, is sufficiently large. "Sufficient" is preferably understood to mean a porosity that is greater than 80 percent and less than 100 percent. Annealing is carried out below. The tempering is preferably carried out under a hydrogen, nitrogen or noble gas atmosphere and / or at a temperature above about 900 ° C. Due to the high porosity of the silicon layer 105, the pores rearrange during the annealing in such a way that the pores are less porous

Silicon layer 104 creates a single large pore, that is, the cavity shown in FIG. 2 or the cavern 201 shown. The pores on the upper side of the slightly porous silicon layer 104 become largely in the tempering or high-temperature step sealed, so that the actual sensor membrane can be deposited as a largely monocrystalline silicon layer on this.

In a second variant according to the invention for producing the preliminary stage of a pressure sensor or a cavity 201, which is also not shown, the process parameters are set after the formation of the silicon layer 104 of low porosity such that the rate of expansion of the pores or cavities within a thin transition layer under the silicon layer 104 rises sharply, with the pores in this

Transition layer grow together or virtually "overlap" each other. In other words, the transition layer is an initially flat cavity, which grows in depth during the further etching process and ultimately forms the cavity or the cavern 201. That is, pores are not first etched and then enlarged, but rather the transition layer, a flat "giant pore" with an initially small thickness, grows slowly into the depth. According to the invention, the etching medium and / or the etching media is preferably provided with a slightly volatile component. An alcohol such as ethanol is preferably used.

If necessary or expedient, it is provided according to the invention to provide the porous area of the top surface of the substrate 101 with a mask layer and / or cladding layer which covers the porous layer of the top surface, i. H. the silicon layer 104, mechanically fixed (not shown) during and after the etching or during the creation of the cavity 201 at the connection points in the region of the non-etched top surface of the substrate.

Such a support layer can be created, for example, by providing at least the area around the porous silicon layer 104 of the top surface of the p-doped silicon substrate 101 with an n-doping. This can largely prevent the silicon substrate 101 from being “undercut” in the region of the connection points or interfaces between the silicon layer 104 and the silicon substrate 101. Furthermore, care can be taken to ensure that a preferably thin porous silicon layer 104, which forms the starting layer Silicon epitaxial layer 301 or 401 (Fig. 3 and 4) forms, is securely attached to the silicon substrate 101.

FIG. 3 shows a first variant of a further preliminary stage of the created on the basis of the preliminary stage shown in FIG

Absolute pressure sensor 500 in cross section, which is shown in FIG. 5, after the porous silicon membrane or silicon layer 104 has been pretreated and then provided with a largely monocrystalline silicon epitaxial layer 301. The pressure that prevails in the epitaxial process or in the deposition of the epitaxial layer 301 defines the pressure enclosed in the cavity 201.

A preferred pretreatment according to the invention consists of tempering the porous silicon layer 104. The tempering is preferably carried out at a high temperature, such as, for example, at a temperature in the range from approximately 900 ° C. to approximately 1100 ° C. and / or the tempering is carried out at Hydrogen, nitrogen and / or noble gas atmosphere made.

The pretreatment allows the pores in the porous etched, monocrystalline silicon layer 104 to be largely closed, so that a largely monocrystalline silicon epitaxial layer 301 can be deposited thereon. It goes without saying that such pretreatment, in particular for reasons of cost, can be dispensed with if the quality of the deposited

Silicon layer is satisfactory even without pretreatment.

4, on the other hand, shows a second variant of a further preliminary stage of the absolute pressure sensor 500 shown in FIG. 5, produced on the basis of the preliminary stage shown in FIG. 2, after the porous silicon membrane or silicon layer 104 has been pretreated with a likewise largely monocrystalline silicon Epitaxial layer 401 has been provided. This in turn forms the actual membrane of the pressure sensor. The pressure in the epitaxial process or in the deposition of the

Epitaxial layer 401, as in the case of the deposition of epitaxial layer 301, defines the pressure enclosed in cavity 201. In the epitaxial process with hydrogen as the carrier gas for producing the epitaxial layer 301 or 401, hydrogen is mainly used in the Cavity 201 included. If the epitaxy takes place approximately at atmospheric pressure and thus at higher growth rates compared to lower process pressures, the included hydrogen pressure is approximately 1 bar. In a high temperature step according to the invention, e.g. B. under a nitrogen atmosphere, the hydrogen diffuses due to its small molecular size and due to the gradient of the hydrogen concentration, in particular through the epitaxial layer 301 or 401, which is generally thinner in relation to the substrate. This almost creates a vacuum in the cavern 201. Such a method step according to the invention is particularly expedient in the production of an absolute pressure sensor. Its cavity generally has a reduced pressure compared to the atmosphere, such as in particular a vacuum. Furthermore, it may be appropriate to carry out the high-temperature step according to the invention under one

Execute hydrogen atmosphere, the pressure of the hydrogen atmosphere is preferably set to the pressure that is desired in the cavern or in the cavity of the absolute pressure sensor.

It goes without saying that the above procedure for producing an extensive vacuum in the cavern 201 can also be used in epitaxial processes with hydrogen as the carrier gas under higher or lower total pressures than about 1 bar.

In FIG. 5, an absolute pressure sensor 500 produced on the basis of the preliminary stage shown in FIGS. 3 or 4 is shown in cross section. In the case of the absolute pressure sensor 500, monocrystalline, piezoresistive resistors 501 and leads 502 made of doped silicon have been produced in a known manner on the largely monocrystalline silicon epitaxial layer 301 or 401. In FIG. 6, an absolute pressure sensor 600 produced on the basis of the absolute pressure sensor 500 shown in FIG. 5 is shown in cross section. The absolute pressure sensor 500 shown in FIG. 5 has been provided with integrated circuits 601, 602 and 603 in a known manner.

FIG. 7 shows a first variant of a differential pressure sensor 700 according to the invention - in cross section - with a Access opening 701 to the cavity or to the cavern 201 via a lateral channel 702. The first variant of the differential pressure sensor 700 according to the invention shown in FIG. 7 has been manufactured like the absolute pressure sensor 600 shown in FIG. 6.

For a differential pressure sensor, it is desirable to be able to supply pressure from the rear side of the membrane or the epitaxial layer 301 or 401. For this purpose, it is necessary to create an opening 703 from the back of the membrane or the substrate 101 by means of suitable etching techniques. An opening 703, which preferably has largely vertical walls, can be created, for example, by dry etching, such as plasma etching or trenching. Plasma cats or trench cats stop on oxide layers. According to the invention, it is now provided to provide the cavity 201 with an oxide layer. However, an oxidation of the cavity 201 before the deposition of the silicon epitaxial layer 301 or 401 is not possible, since an undesired polycrystalline epitaxial layer would then grow on the slightly porous silicon layer or start layer 104.

If the access opening 701 lies outside the membrane area, as in the exemplary embodiment according to FIGS. 7 and 8, the lateral channel 702 must be taken into account in the mask layer 102 and the lateral channel 702 must be created together with the cavity or with the cavern 201 in the manner described.

After the epitaxial layer 301 or 401 has been deposited, one or more holes or openings 701 are produced, for example by dry etching, from the top of the epitaxial layer to the cavity 201. This can be done (not shown) either directly in the membrane area (the area of the epitaxial layer 301 or 401 above the opening 703, see also FIG. 8) or outside the membrane, as shown in FIGS. 7 and 8.

After the cavity 201, the lateral channel 702 and the access opening 701 have been produced, the walls of the cavity or the cavern 201, the lateral channel 702 and the access opening 701 are oxidized in a known manner in an oxidation step. The oxidation step may already be necessary for the production of circuit elements and may not require any additional effort. With a suitable choice of the size of the access opening 701, this is already closed by the oxidation step. Otherwise, the access opening 701 can be closed by a special locking step or by taking advantage of further process steps necessary for the production of circuit elements, for example by the deposition of oxide, nitride, metal, etc.

In a subsequent method step, the opening 703 is formed from the underside of the substrate or wafer 101 by dry etching, such as, in particular, trench cats. This etching process stops on the oxide layer, which delimits the cavity from below. A subsequent etching step, such as a dry etching step or a wet chemical etching step, removes the thin oxide layer delimiting the cavity from below and an oxide mask which may be present on the back of the wafer, and opens the cavity or the cavity 201. Fig. 9 shows a second variant of an inventive

Differential pressure sensor 900 with an access opening 901 to the cavity 201 - in cross section. As described in connection with FIGS. 7 and 8, a lateral channel 702 is created. Instead of the access opening 701 in the first variant of a differential pressure sensor 700 according to the invention shown in FIGS. 7 and 8, in the differential pressure sensor 900 shown in FIG. 9, an oxide stop layer 902 is deposited on the epitaxial layer 301 or 401 at least above the lateral channel 702. Analogous to the manner described in connection with FIGS. 7 and 8, in a subsequent etching step an opening 901, such as in particular by trenching, is created below the oxide stop layer 902. The etching process stops in the area of the lateral channel 702 on the underside of the oxide stop layer 902, which is located above the epitaxial layer 301 or 401.

To increase the stability of the epitaxial layer 301 or 401, the oxide stop layer 902 can be reinforced by further layers. It is also conceivable not to use a lateral channel, but to provide the opening in the membrane area (not shown). 10 shows a preliminary stage 1000 of a third variant of a differential pressure sensor 1100 or 1200 according to the invention with a single thick porous layer 1001 - in cross section. The thick porous layer 1001 is made in a manner analogous to that in particular in FIG

In connection with Figures 1 to 4 explained. However, the porous layer 1001 is preferably significantly thicker than the slightly porous silicon layer 104. In contrast to the differential pressure sensors 700 and 900, the formation of a cavity or a cavern 201 is prior to the formation of an open on one side

Cavity 1101 or 1201 (see FIGS. 11 and 12) is not necessary. The areas denoted by 1002 are doped areas of the substrate 101, which limit an undercut at the edge of the membrane, which extends over the cavity open on one side (cf. FIGS. 11 to 14). This makes sense due to the high etching depth for producing the thick porous layer 1001, for example approximately 50 μm. This makes the membrane somewhat stiffer at the edge of the membrane.

Starting from the preliminary stage shown in FIG. 10 of a differential pressure sensor 1100 or 1200 according to the invention, isotropic or anisotropic etching techniques, preferably high-rate trenches, are used to produce the cavity 1101 or 1201, which is open on one side, from the back of the substrate or wafer 101.

Due to the pores present in the thick porous layer 1001, this can be selectively removed from the surrounding substrate material by etching solutions or etching gases. This removal can take place in the same process step as the etching of the access opening to the rear of the sensor membrane and to form the cavity 1101 or 1201, which is open on one side.

The width of the cavity 1101 open on one side is less than the width of the membrane region or as the width of the porous layer 1001, whereas the width of the cavity 1201 open on one side is greater than the width of the membrane region or as the width of the porous layer 1001.

13 shows a preliminary stage 1300 of a fourth variant of a differential pressure sensor 1400 according to the invention in cross section. In the 10, the porous layer 1301 extends, in contrast to the preliminary stage shown in FIG. 10, to the underside of the substrate 101. The porous layer 1301 can be selectively removed in the manner mentioned in connection with FIGS. 10 to 12 without an access opening must be etched. After the selective removal of the porous layer 1301, a cavity 1401 which is open on one side is located under the sensor membrane or the epitaxial layer 401. Standard semiconductor processes make the preliminary stage 1500, shown in cross section in FIG

Absolute pressure sensor 1600 (Fig. 16). In addition to integrated circuits 601 and 603 for evaluating the measurement signals output by the capacitive absolute pressure sensor 1600, there is a bottom electrode 1501 on the top side of the silicon substrate 101 in the silicon substrate 101, preferably produced by suitable doping of the silicon substrate 101, and on the top side of the silicon substrate 101 and the bottom electrode 1501 a silicon epitaxial layer 401, which is preferably monocrystalline, is provided. On the upper side of the silicon epitaxial layer 401, a cover electrode 1502, preferably produced by a suitable doping, is provided in the silicon epitaxial layer 401 at a high offset from the bottom electrode 1501. The upper side of the silicon epitaxial layer 401 is covered except in the area 103 of the cover electrode 1502 by a mask layer 102 for protection against an etching attack.

The area 103 not covered by the mask layer 102 is, as already described in detail, etched porously, preferably electrochemically, such as in particular using hydrofluoric acid (HF) or an etching medium which contains hydrofluoric acid. Starting from the lid electrode 1502, a porous lid electrode or membrane 1601 is created.

In one possible embodiment of the invention, the cover electrode 1502 is formed from a p-doped layer of the likewise p-doped epitaxial layer 401. A p-doped layer is etched porously by the etching medium. The bottom electrode 1501 can be formed by both a p-doped and an n-doped layer. In a preferred embodiment of the invention, both the bottom electrode 1501 and the cover electrode 1502 are formed by a sieve or mesh-like, n-doped layer in the p-doped epitaxial layer 401 or in the p-doped substrate 101. The n-doped regions of the sieve or mesh-like layer are preferably very narrow, flat and have a suitable spacing from one another so that they can be easily undercut by the etching medium to form the porous cover electrode 1502.

An n-doped layer is largely not attacked by the etching medium, and the etching medium penetrates the sieve-like or mesh-like layer of the cover electrode 1502 to form the later cavity 201. The cavity 201 can in particular be formed by one of those already in connection with FIGS 3 described methods are formed. A sieve or mesh-like, preferably also n-doped layer is preferably also provided for the bottom electrode 1501. This advantageously results in a largely homogeneous electric field during the electrochemical etching process.

An external pressure acting on the cover electrode 1502 of the absolute pressure sensor bends the cover electrode 1502 towards the bottom electrode 1501, as a result of which the capacitance of the capacitor formed by the two electrodes changes. The electronically evaluable capacity is a measure of the absolute pressure acting on the cover electrode.

In order to prevent under-etching of the epitaxial layer 401 in the contact area with the porous cover electrode 1502, the contact area around the porous cover electrode 1502 is preferably n-doped, as a result of which the n-doped areas designated 1503 are formed.

In a first embodiment of the invention, a sealing layer (not shown) is subsequently deposited on the porous cover electrode or membrane 1601, e.g. B. a nitride layer. The pressure prevailing during the deposition defines the pressure in the cavity or in the cavern 201 (cf. the explanations above on this point). When the pressure changes, the distance between the cover electrode and the bottom electrode changes, and thus the Capacity. The change in capacitance is evaluated by the integrated circuits 601 and 603.

In a second embodiment of the invention, the membrane 1601 by an oxidation step and / or a sealing layer (not shown), such as. B. an oxide layer, closed. A further layer (not shown), such as in particular a doped polysilicon layer or a metal layer, is deposited on the oxidized membrane 1601 or on the sealing layer, which (possibly after structuring) has the function of a

Cover electrode has. The cover electrode can also be provided, for example, in the form of a doped region in the further layer, such as in particular in an undoped poly-silicon layer.

Both in the first and in the second embodiment, further layers can be deposited and structured, for example in order to stiffen the membrane 1601, in particular in the central membrane area.

FIG. 17 shows a first variant of a preliminary stage 1700 of an absolute pressure sensor 2000 (cf. FIG. 20) with resistors, such as in particular polycrystalline piezoresistive resistors or metal thin film resistors - in cross section. The preliminary stage 1700 formed by standard semiconductor processes for the further preliminary stage 1900 shown in FIG. 19 has a silicon substrate 101, a silicon epitaxial layer 401 deposited on the silicon substrate 101 and a mask layer 102 applied on the upper side of the silicon epitaxial layer 401. The mask layer 102 is provided with an uncovered area 103. Furthermore, an integrated circuit 601 or 603 has been formed in each case in the top of the silicon epitaxial layer 401 and between the silicon substrate or wafer 101 and the epitaxial layer 401.

18 shows a second variant of a preliminary stage 1800 for forming the absolute pressure sensor 2000 (FIG. 20) in cross section. The alternative second preliminary stage 1800 differs from the preliminary stage 1700 shown in FIG. 17 in that instead of one Silicon substrate 101 and a silicon epitaxial layer 401 deposited on this, only a silicon substrate or wafer 101 serves as a preliminary stage for the formation of the absolute pressure sensor 2000 (cf. FIG. 20), which, however, in contrast to the embodiment shown in FIG. 20, does not have a silicon epitaxial layer 401.

With the above-described methods according to the invention, a porous silicon membrane 104 and an underlying cavity or cavern 201 in the region 103 are produced in the silicon epitaxial layer 401 of the preliminary stage 1700 or in the silicon substrate 101 of the preliminary stage 1800, as is shown in FIG. 19 for the prepress 1700 is shown.

After removal of the mask layer 102, the porous membrane 104 is deposited by the deposition of a closure layer 2001, such as. B. a nitride, an oxide, a poly-silicon layer or a monocrystalline silicon layer, or sealed by oxidation. The pressure prevailing during the deposition of the sealing layer 2001 or during the oxidation defines the pressure enclosed in the cavity or in the cavern 201 (cf. the above

Statements on this point). Resistors 2002, such as in particular polycrystalline piezoresistive resistors or metal thin-film resistors, are produced on the closure layer 2001 or on the oxidized membrane (not shown). The resistors 2002 can be produced, for example, by the deposition of polysilicon on the sealing layer 2001, a subsequent doping of the deposited polysilicon and a subsequent structuring of the deposited polysilicon layer (not shown). Furthermore, the resistors 2002 can be produced, for example, by the deposition of a polysilicon layer and a structured doping of the polysilicon layer (not shown). The use of strain gauges is also conceivable (not shown).

A change in pressure leads to a changed deflection in the membrane formed by the porous silicon layer 104 and the sealing layer 2001 over the cavity or the cavern 201. This goes with a change in resistance of the piezoresistive resistors in 2002 This is preferably evaluated by the integrated circuits 601 or 603 or by a separate circuit.

Due to the greater long-term stability of monocrystalline piezoresistive resistances against polycrystalline piezoresistive resistors, the resistors 2002 are produced in a sealing layer 2001, which is a monocrystalline silicon layer.

Alternatively, the pressure-dependent piezoresistive resistors 2002 in the absolute pressure sensor 2000 shown in FIG. 20 can be formed by n-doped resistors in the region of the epitaxial layer 401, which forms the later porous silicon layer 104 (not shown).

For a differential pressure sensor, it is desirable if the pressure can be supplied from the rear of the membrane of the differential pressure sensor. In order to produce a differential pressure sensor 2100 (see FIG. 21) or a differential pressure sensor 2200 (see FIG. 22) from the absolute pressure sensor 2000 shown in cross section in FIG. 20, an opening 2101 or an opening 2201 from the underside of the To create silicon substrate 101 to the cavity or to the cavern 201.

According to the invention, the opening 2101 or 2201 is preferably created by dry etching, such as in particular by trench cats or plasma etching (cf. the above explanations for creating openings by dry etching). Since such an etching process stops on oxide layers, the embodiment of a differential pressure sensor 2100 shown in FIG. 21 provides for the cavity or the cavern 201 to be provided with an oxide layer. This is achieved when the cavity or the cavern 201 is closed by oxidation of the porous silicon layer 104. A silicon layer is preferably deposited on the oxidized porous silicon layer or membrane 104, on or in which the piezoresistive resistors 2002, in particular by suitable ones

Doping of the silicon layer can be generated. A pressure supply in the form of the opening 2101 is subsequently produced in the membrane region from the rear side of the silicon substrate or wafer 101, preferably by means of a trench process. On such an etching process stops on the preferably thin oxide layer, which delimits the cavity or the cavern 201 from below. The oxide layer can optionally be removed from the back of the substrate or wafer 101 by a subsequent, suitable dry etching step or by a wet chemical etching step. In this step, the cavity or the cavern 201 is opened.

The etching step is preferably such that all the oxide is etched out of the cavity or from the cavern 201 and the oxidized, porous silicon layer 104 is thus removed. The advantage of this is that the membrane thickness of the differential pressure sensor 2100 is then only determined by the sealing layer 2001 deposited on the oxidized, porous silicon layer 104. The layer thickness of the sealing layer 2001 can advantageously be set very precisely and reproducibly, which means the production of

Differential pressure sensors with reproducible properties significantly easier.

FIG. 22 shows a second variant of a differential pressure sensor, which was produced on the basis of the absolute pressure sensor 2000 shown in FIG. 20, in cross section, with the difference between the upper side of the silicon epitaxial layer 401 and the one shown in FIG. 20 being different Closure layer 2001, an oxide layer 2202 is additionally provided. In an analogous manner as in FIG. 21, an opening 2201 is preferably made through

Trench cats, generated. The etching process stops on the oxide layer 2202 and the pressure supply to the cavity or to the cavern 201 is created.

In the event that the sealing layer 2001 is formed by an oxide layer, an additional oxide layer 2202 may be dispensed with. This applies in particular if the stability of the sealing layer 2001, which serves as the membrane of the differential pressure sensor, is sufficient.

Claims

claims

1. A method for producing a semiconductor component (100; ...; 2200), in particular a multilayer semiconductor component, preferably a micromechanical component, such as, in particular, a pressure sensor which has a semiconductor substrate (101), such as in particular made of silicon,

characterized,

that in a first step a first porous layer (104; 1001; 1301) is formed in the semiconductor component; and

that in a second step a cavity or a cavern (201; 1101; 1201; 1401; 2101; 2201) is formed under or from the first porous layer (104; 1001; 1301) in the semiconductor component, the cavity or the Cavern can be provided with an external access opening.

2. The method according to claim 1, characterized in that the second step has a first sub-step during which under the first porous layer (104) a second porous layer (105) with a porosity of more than about 70% and less than 100 %, preferably about 85 to 95%, is formed.

3. The method according to claim 2, characterized in that the cavity or the cavern (201) is formed by a tempering step from the second porous layer.

4. The method according to claim 1, characterized in that in a first sub-step of the second step, an access opening or a cavity open on one side (1101; 1201; 1401) in the direction of the first porous layer (1001; 1301) and / or onto a second porous layer, the first and / or second porous layer being completely or partially preferably removed via the access opening or the cavity open on one side.

5. The method according to claim 1, characterized in that the second step has a first sub-step, during which an initially areal cavity is formed under the first porous layer (104), and the initially areal cavity extends in depth and so from firstly, the hollow space or the cavern (201) is formed.

6. The method according to any one of claims 1 to 5, characterized in that the first and / or second porous layer (104, 105) is or are formed by one or more etching media, the etching medium and / or the etching media preferably

Hydrofluoric acid, HF acid, or consist of hydrofluoric acid.

7. The method according to claim 6, characterized in that the etching medium or the etching media with one or more

Additives are or are provided, such as additives to reduce blistering, to improve wetting and / or to improve drying, such as, in particular, an alcohol, such as ethanol, the volume concentration of the additive, such as in particular ethanol, preferably being approximately approx. 60% to approx. 100%.

8. The method according to any one of claims 1 to 7, characterized in that the first and / or second porous layer (104, 105) by applying an electrical field between the top and the bottom of the semiconductor component (100; ...; 2200) and the setting of an electric current is formed. Method according to one of claims 1 to 8, characterized in that the process parameters for forming the second porous layer (105) or for forming the initially flat-like cavity are selected such that the

The rate of expansion of the pores or cavities in the second porous layer is significantly higher than the rate of expansion of the pores or cavities to form the first porous layer (104).

10. The method according to one of Anspr che 5 to 9, characterized in that the process parameters for forming the initially flat cavity are selected such that the pores or cavities of the second porous layer (105) "overlap" each other in the lateral direction and so a single initially flat pore or a single initially flat cavity is formed.

11. The method according to any one of claims 6 to 10, characterized in that the doping of the semiconductor substrate to be etched (101), such as in particular a silicon substrate, the current density in the etching medium or in the etching media, the hydrofluoric acid concentration in the etching medium or m the etching media, one or more

Represent additions to the etching medium or to the etching media and the temperature.

12. The method according to any one of claims 1 to 11, characterized in that m the cavern or in the cavity (201) trapped hydrogen is largely or completely removed in a high temperature step from the cavern or the cavity.

13. The method according to any one of claims 1 to 12, characterized in that that an epitaxial layer (301; 401), such as a silicon layer, is deposited on the first porous layer (104), which is preferably monocrystalline.

14. Semiconductor component (100; ...; 2200), in particular a multilayer semiconductor component, preferably a micromechanical component, such as in particular a pressure sensor, with a semiconductor substrate (101), such as in particular made of silicon, and a cavity or a cavern (201; 1101; 1201; 1401; 2101; 2201), where the

The cavity or the cavern can be provided with an external access opening, characterized by a porous layer (104; 1001; 1301) above the cavity or the cavern.

15. Semiconductor component (100; ...; 2200), in particular a multi-layer semiconductor component, preferably a micromechanical component, such as in particular a pressure sensor, with a semiconductor substrate (101), such as in particular made of silicon, characterized in that it has a method according to a or more of claims 1 to 13.