EP1150433A3 - Flash type analog-to-digital converter - Google Patents

Flash type analog-to-digital converter Download PDF

Info

Publication number
EP1150433A3
EP1150433A3 EP01401117A EP01401117A EP1150433A3 EP 1150433 A3 EP1150433 A3 EP 1150433A3 EP 01401117 A EP01401117 A EP 01401117A EP 01401117 A EP01401117 A EP 01401117A EP 1150433 A3 EP1150433 A3 EP 1150433A3
Authority
EP
European Patent Office
Prior art keywords
bits
output
significant
encoder
generating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP01401117A
Other languages
German (de)
French (fr)
Other versions
EP1150433B1 (en
EP1150433A2 (en
Inventor
Yuji C/O Sony Corporation Gendai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of EP1150433A2 publication Critical patent/EP1150433A2/en
Publication of EP1150433A3 publication Critical patent/EP1150433A3/en
Application granted granted Critical
Publication of EP1150433B1 publication Critical patent/EP1150433B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/142—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit the reference generators for the steps being arranged in a common two-dimensional array
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
    • H03M1/362—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider
    • H03M1/365—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider the voltage divider being a single resistor string

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

An ADC (1) having a sparkle suppression capability equivalent to that of a full bit Gray encoding method and preventing criss-crossing of interconnections and an increase of the pipeline delay, wherein a resistor string (2) for generating reference voltages (Vref) to be compared with an analog input signal (Vin) is folded 2n times or a multiple thereof corresponding to the number n of most significant bits of the output bit ADB of the related ADC. It has a first encoder (3-8) for encoding the most significant n bits and outputting a Gray code, second encoders ((3-1 - 3-7) for encoding least significant bits and outputting the same, a first output circuit (4) for converting the Gray code output from the first encoder to a binary code and generating most significant n bits, and a second output circuit (5) for generating least significant bits by using the digital code generated by the first output circuit and the output of the second encoder.
EP01401117A 2000-04-27 2001-04-27 Flash type analog-to-digital converter Expired - Lifetime EP1150433B1 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2000132863 2000-04-27
JP2000132863 2000-04-27
JP2000168691 2000-06-06
JP2000168691A JP4360010B2 (en) 2000-04-27 2000-06-06 Parallel type analog-digital converter

Publications (3)

Publication Number Publication Date
EP1150433A2 EP1150433A2 (en) 2001-10-31
EP1150433A3 true EP1150433A3 (en) 2004-10-13
EP1150433B1 EP1150433B1 (en) 2006-11-29

Family

ID=26591379

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01401117A Expired - Lifetime EP1150433B1 (en) 2000-04-27 2001-04-27 Flash type analog-to-digital converter

Country Status (4)

Country Link
US (1) US6480135B2 (en)
EP (1) EP1150433B1 (en)
JP (1) JP4360010B2 (en)
DE (1) DE60124812T2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE518900C2 (en) * 2001-03-26 2002-12-03 Ericsson Telefon Ab L M Method and apparatus for calibrating bubble / A / D converters
JP2003273735A (en) * 2002-03-12 2003-09-26 Denso Corp Method and device for a/d conversion
US20050083223A1 (en) * 2003-10-20 2005-04-21 Devendorf Don C. Resolution enhanced folding amplifier
US20060109156A1 (en) * 2004-11-19 2006-05-25 Potentia Semiconductor Corporation Trimming resistance ladders in analog-digital converters
US7446690B2 (en) * 2006-11-06 2008-11-04 Atmel Corporation Apparatus and method for implementing an analog-to-digital converter in programmable logic devices
US7933354B2 (en) * 2006-11-22 2011-04-26 Semtech Corporation Encoding and decoding architecture and method for pipelining encoded data or pipelining with a look-ahead strategy
KR100851995B1 (en) * 2007-02-12 2008-08-13 주식회사 하이닉스반도체 Signal receiver circuit
US7623051B2 (en) * 2008-04-29 2009-11-24 Analog Devices, Inc. Metastability error reduction in signal converter systems
US9893737B1 (en) 2017-01-13 2018-02-13 Apple Inc. Multi-stage overload protection scheme for pipeline analog-to-digital converters
FR3113139B1 (en) 2020-07-30 2022-11-25 St Microelectronics Rousset Voltage comparator

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4599599A (en) * 1981-07-21 1986-07-08 Sony Corporation Analog-to-digital converter
US5187483A (en) * 1990-11-28 1993-02-16 Sharp Kabushiki Kaisha Serial-to-parallel type analog-digital converting apparatus and operating method thereof
EP0849883A1 (en) * 1992-10-01 1998-06-24 Matsushita Electric Industrial Co., Ltd. Analog-to-digital converter

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4276543A (en) 1979-03-19 1981-06-30 Trw Inc. Monolithic triple diffusion analog to digital converter
US4386339A (en) 1980-03-31 1983-05-31 Hewlett-Packard Company Direct flash analog-to-digital converter and method
US5623265A (en) * 1994-01-28 1997-04-22 Texas Instruments Incorporated Flash analog-to-digital converter and method of operation
US5644312A (en) * 1994-11-30 1997-07-01 Analog Devices, Inc. Rom encoder circuit for flash ADC'S with transistor sizing to prevent sparkle errors
US6222476B1 (en) * 1999-08-30 2001-04-24 Lsi Logic Corporation Architecture to reduce errors due to metastability in analog to digital converters

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4599599A (en) * 1981-07-21 1986-07-08 Sony Corporation Analog-to-digital converter
US5187483A (en) * 1990-11-28 1993-02-16 Sharp Kabushiki Kaisha Serial-to-parallel type analog-digital converting apparatus and operating method thereof
EP0849883A1 (en) * 1992-10-01 1998-06-24 Matsushita Electric Industrial Co., Ltd. Analog-to-digital converter

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
MATSUZAWA A ET AL: "A 6b 1GHz Dual-parallel A/D Converter", SOLID-STATE CIRCUITS CONFERENCE, 1991. DIGEST OF TECHNICAL PAPERS. 38TH ISSCC., 1991 IEEE INTERNATIONAL SAN FRANCISCO, CA, USA 13-15 FEB. 1991, NEW YORK, NY, USA,IEEE, US, 13 February 1991 (1991-02-13), pages 174 - 311, XP010039742, ISBN: 0-87942-644-6 *
ONO K ET AL: "Error suppressing encode logic of FCDL in 6-bit flash A/D converter", BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING, 1996., PROCEEDINGS OF THE 1996 MINNEAPOLIS, MN, USA 29 SEPT.-1 OCT. 1996, NEW YORK, NY, USA,IEEE, US, 29 September 1996 (1996-09-29), pages 200 - 203, XP010200262, ISBN: 0-7803-3516-3 *
PADOAN S ET AL: "A novel coding scheme for the ROM of parallel ADCs, featuring reduced conversion noise in the case of single bubbles in the thermometer code", ELECTRONICS, CIRCUITS AND SYSTEMS, 1998 IEEE INTERNATIONAL CONFERENCE ON LISBOA, PORTUGAL 7-10 SEPT. 1998, PISCATAWAY, NJ, USA,IEEE, US, 7 September 1998 (1998-09-07), pages 271 - 274, XP010366235, ISBN: 0-7803-5008-1 *
TSUKAMOTO S ET AL: "A CMOS 6b 400 M sample/s ADC with error correction", SOLID-STATE CIRCUITS CONFERENCE, 1998. DIGEST OF TECHNICAL PAPERS. 1998 IEEE INTERNATIONAL SAN FRANCISCO, CA, USA 5-7 FEB. 1998, NEW YORK, NY, USA,IEEE, US, 5 February 1998 (1998-02-05), pages 152 - 153, XP010278699, ISBN: 0-7803-4344-1 *
XIAO P ET AL: "A 4 b 8 GSample/s A/D converter in SiGe bipolar technology", SOLID-STATE CIRCUITS CONFERENCE, 1997. DIGEST OF TECHNICAL PAPERS. 43RD ISSCC., 1997 IEEE INTERNATIONAL SAN FRANCISCO, CA, USA 6-8 FEB. 1997, NEW YORK, NY, USA,IEEE, US, 6 February 1997 (1997-02-06), pages 124 - 125, XP010218946, ISBN: 0-7803-3721-2 *

Also Published As

Publication number Publication date
DE60124812T2 (en) 2007-10-11
EP1150433B1 (en) 2006-11-29
US20010040523A1 (en) 2001-11-15
US6480135B2 (en) 2002-11-12
JP2002016497A (en) 2002-01-18
JP4360010B2 (en) 2009-11-11
EP1150433A2 (en) 2001-10-31
DE60124812D1 (en) 2007-01-11

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