EP1135806A1 - Controllable semiconductor element with a gate series resistor - Google Patents

Controllable semiconductor element with a gate series resistor

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Publication number
EP1135806A1
EP1135806A1 EP98964378A EP98964378A EP1135806A1 EP 1135806 A1 EP1135806 A1 EP 1135806A1 EP 98964378 A EP98964378 A EP 98964378A EP 98964378 A EP98964378 A EP 98964378A EP 1135806 A1 EP1135806 A1 EP 1135806A1
Authority
EP
European Patent Office
Prior art keywords
resistance
component
gate electrode
branches
arrangement according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP98964378A
Other languages
German (de)
French (fr)
Inventor
Frank Pfirsch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
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Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of EP1135806A1 publication Critical patent/EP1135806A1/en
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0641—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
    • H01L27/0647—Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
    • H01L27/0652—Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H01L27/0711—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with bipolar transistors and diodes, or capacitors, or resistors
    • H01L27/0716—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with bipolar transistors and diodes, or capacitors, or resistors in combination with vertical bipolar transistors and diodes, or capacitors, or resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/04—Modifications for accelerating switching
    • H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
    • H03K17/0412—Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
    • H03K17/0812—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit
    • H03K17/08128—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit in composite switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H03K17/163—Soft switching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/74—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of diodes

Definitions

  • the present invention relates to controllable semiconductor components which are controlled by a gate electrode.
  • the invention relates to field effect transistors such as MOSFETs and IGBTs.
  • Semiconductor components are their behavior when switching on and off.
  • the aim in the development of circuits with controllable semiconductor components is to obtain components and circuits that are as optimized and robust as possible.
  • the current density that can be switched off should be as high as possible.
  • at least the current flowing at the maximum gate voltage in the event of a short circuit should be controlled.
  • a particularly critical case is when at the beginning of the shutdown process, for example an IGBT, there is only a low collector-emitter voltage compared to the blocking capability of the semiconductor component and then shutdown with a low gate series resistance to a high voltage with an inductive load.
  • a very high hole current flows for a short time, which can lead to the destruction of the semiconductor component.
  • the parasitic bipolar transistor or thyristor of the arrangement is switched on. This effect is called latch-up. This effect is particularly problematic with IGBTs, especially those with a trench-shaped gate electrode.
  • a first solution to this special problem is to make the semiconductor device itself insensitive to latch-up.
  • This happens e.g. B. in that Semiconductor component doping regions with a very high conductivity are provided, or the emitter efficiency of the component is minimized.
  • Such measures are described, for example, in T. Laska et al, "A Low Loss / Highly Rugged IGBT Generation - Based On A Seif Aligned Process ith Double Implanted N / N + -Em ⁇ tter", Proc. ISPSD 94, Davos, 1994, pages 171 to 175.
  • the conductivity of the p-body region below the n-source is set very high, or that the emitter efficiency of the n-source is minimized.
  • a further possibility for influencing the switch-on or switch-off process is to provide the semiconductor component with a gate series resistor.
  • Such gate series resistors are known, for example, from DE 195 12 799.
  • No. 5,525,925 also discloses a parallel connection of a resistor and a diode chain, which is connected in front of the gate electrode and enables the semiconductor component to be switched off in two phases with different time constants.
  • the problem with these solutions from the prior art is that either the switch-on losses increase sharply with the size of the gate series resistor or relatively complex circuits are required to optimize the switch-on and switch-off behavior.
  • the object of the present invention is therefore to provide the simplest possible arrangement with a controllable semiconductor component which enables the component to be switched on and off in an optimized manner. This object is achieved by the features of the present patent claim 1.
  • the semiconductor component consists of at least two doping regions embedded in a semiconductor substrate and at least one gate electrode for controlling the semiconductor component, which is separated from the doping regions by an insulation layer.
  • the gate electrode is now integrated with a resistance circuit, which has at least two resistance branches connected in parallel, part of the entire resistance branches having at least one resistance element and possibly further components, the remaining part of the resistance branches has at least one resistance element and a component with rectifying behavior has, but may also have other components.
  • the one resistance branch thus has at least one resistance element
  • the other resistance branch has at least one resistance element and additionally a component with rectifying behavior.
  • more than two resistance branches can also be provided.
  • Adaptation of the components with rectifying behavior in particular with regard to their own resistance, can be dispensed with completely in the remaining part of the resistance branches on a resistance element.
  • the rectifying components in part of the resistance branches can now be used to ensure that a current flows through only part of the resistance branches in the direction of the current flow through the resistance circuit.
  • the resistance circuit has one
  • the rectifying component is switched in the respective resistance branch in such a way that a charge is transported to the gate electrode hm in the forward direction of the component, whereas a charge is transported away from the gate electrode while the component is being is done.
  • the resistance branch is thus blocked for a charge transport away from the gate electrode.
  • the resistance for the charge transport away from the gate electrode is thus only determined by the remaining resistance branches without rectifying components.
  • the resistance is determined by all resistance branches and is the total resistance of the parallel connection of the Emzel resistors.
  • the resistance in the direction of the gate electrode hm is thus significantly lower than the resistance during charge transport away from the gate electrode.
  • the gate electrode is thus charged much faster than the gate electrode is discharged.
  • the switch-off process is thus significantly delayed compared to the switch-on process.
  • the current flow in the semiconductor component in particular the hole current component, can be considerably reduced and, in particular, a latch-up of the component can be prevented.
  • the resistance branches can be provided. Diodes are preferably used for such components. However, it can also be provided, for example, to provide a transistor arrangement such that it exhibits rectifying behavior. It is not absolutely necessary for the component to have the best possible rectifying behavior. For example, it is already sufficient for the component in the resistor branch to have a leakage current in the blocking direction that is less than 20% of the current in the forward direction that the component has in the resistor branch. It is only essential for the function of the arrangement that the total resistance of the resistance circuit during the switch-on process can be designed significantly different from the total resistance during the switch-off process. Ideally, the
  • Total resistance of the first part of the resistance branches i.e. those resistance branches without rectifiers, at least double the total resistance of the other resistance branches, that is to say those resistance branches with a rectifier.
  • the resistance circuit can be implemented in different ways. For example, it can be provided that the resistance circuit is formed by polysilicon layers that are separated from the semiconductor substrate by one or more insulation layers. In particular, it can be provided that the insulation layer is formed by the same layer that also separates the gate electrode from the semiconductor substrate. The same layer that is used to manufacture the gate electrode can be used as the polysilicon layer for forming the resistance circuit.
  • the resistance circuit is formed directly in the semiconductor substrate by generating corresponding diffusion regions.
  • the generally customary procedures are to be applied.
  • FIG. 1 Circuit diagram of the semiconductor device with resistance circuit
  • FIG. 2 Schematic representation of an IGBT with a trench-shaped gate electrode
  • FIG. 3 Schematic representation of an IGBT with a trench-shaped gate electrode and polysilicon resistor arrangement
  • FIG. 4 top view of the resistor arrangement according to FIG. 3
  • the circuit diagram according to FIG. 1 shows a controllable semiconductor component 1, the gate electrode of which is connected via a conductive lead 7 to a voltage source V Q J? connected is.
  • a resistance circuit 8 is also provided in the conductive feed 7, which consists of two resistance branches 9, 10 connected in parallel.
  • a resistor 11 with a resistance value R1 is provided in the first resistance branch 9.
  • the second resistance branch 10 has a resistor 12 with a resistance value R2 and a diode 13.
  • the diode 13 is connected such that a charge is transported to the gate electrode of the semiconductor component 1 in the forward direction of the diode 13.
  • the value of Rl should ideally be at least twice, for example about ten times the value of R2.
  • Rl For a semiconductor component 1 which is provided for a power circuit of 25 A, a value for Rl of approximately 50 ohms can be selected, for R2, on the other hand, a value of approximately 5 ohms.
  • R2 can also assume a much smaller value, conversely, R1 can also assume larger values.
  • the rectifier behavior of the diode 13 need not be particularly optimized. It is sufficient if the leakage current is in
  • the blocking direction of the diode 13 is not higher than 20% of the current in the forward direction, the current in the forward direction being determined by the resistance element 12 or by its value R2.
  • An n-channel trench IGBT ie an IGBT with a trench-shaped gate electrode, is provided as the semiconductor component 1 in the present example.
  • This has an n ⁇ substrate 2, in which a p-base region 3 and an n + source region 4 are embedded as doping regions. These adjoin a trench which is lined with an insulation layer ⁇ and filled with a polysilicon layer 5 that acts as a gate electrode.
  • the component On the opposite side of the semiconductor substrate, the component has a p + anode region as the drain region or collector region.
  • the source region 4 is also referred to as the emitter region.
  • FIG. 3 now shows another cross section through an IGBT 1 according to the invention and a branch of the
  • Resistor arrangement 8 which has a diode 13.
  • Polysilicon layer formed and can be generated simultaneously with the gate electrode 5, guided away from the gate electrode 5.
  • the polysilicon layer also forms the resistance element 12 of the resistor arrangement 8, which is designed as n-polysilicon.
  • a p-polysilicon layer adjoins this resistance element, as a result of which the pn junction of a diode 13 is formed.
  • the resistor arrangement 8 is also through the insulation layer 6 from the semiconductor substrate 2 or
  • the resistor arrangement can also be separated from the semiconductor substrate by means of other or further insulation layers.
  • the resistance arrangement 8 in turn borders on a contact area 14 for contacting the gate electrode, which is formed by a metallization.
  • a further metallization 15 ensures that the parallel resistance branches are connected to one another on the gate side to form a parallel connection.
  • the two gate electrodes 5 shown in FIG. 3 are preferably formed as part of a transistor cell, ie there are several trenches in which gate electrodes are located located, transistor cells limited.
  • the ditches cross and form closed cells. In principle, these can have any shape, such as rectangular, hexagonal or square.
  • the gate electrodes in the trench of a cell are conductively connected to one another or there is a continuous gate electrode structure through the trench of a cell.
  • the gate electrodes of individual cells can also be connected to one another.
  • Exactly one resistor arrangement 8 can now be provided for each of the transistor cells or for each arrangement of interconnected transistor cells. Basically, however, several such resistor arrangements 8 can be provided instead of just one.
  • Figure 4 shows the whole in a top view
  • Resistor arrangement 8 with the conductive feed 7 to the gate electrode and the adjacent contact area 14 for contacting the resistor arrangement 8 and the metallization 15 for connecting the resistance branches on the gate side.
  • the entire resistance circuit 8 itself consists of an n-polysilicon resistor 11 with a resistance value R1, which is conductively connected to the conductive supply 7 and to the contact area 14.
  • an n-polysilicon resistor 12 with a resistance value R2 is connected, which is connected to a p-
  • the pn junction 13 forms a diode which is connected in series with the resistor 12 and adjoins the contact area 14.
  • the specific configuration of the entire arrangement depends, among other things, on the requirements for the layout of the semiconductor chip.
  • the resistor arrangement 8 and the contacting surface 14 are provided in the interior of the chip or alternatively are provided on the edge of the chip.
  • the conductive supply 7 and the insulation layer 6 can also be modified.
  • the invention is also the same not only limited to semiconductor devices with trench-shaped gate electrodes.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

Disclosed is a device comprising a controllable semiconductor element (1) consisting of at least two doping areas (3,4) embedded in a semiconductor substrate (2) and at least one gate electrode (3,4) for the control of said semiconductor element, in addition to a conductive feeder (7) for the gate electrode (5). A resistance circuit, comprising at least two parallel connected resistance branches, is arranged inside the conductive feeder, whereby a first part of the resistance branches (9) consists of at least one resistance element (11) and the remaining part of the resistance branches (10) consists of at least one resistance element (12) and a rectified component (13).

Description

Beschreibungdescription
Steuerbares Halbleiterbauelement mit einem GatevorwiderstandControllable semiconductor component with a gate series resistor
Die vorliegende Erfindung betrifft steuerbare Halbleiterbauelemente, die durch eine Gate-Elektrode gesteuert werden. Insbesondere betrifft die Erfindung Feldeffekt-Transistoren wie MOSFETs und IGBTs .The present invention relates to controllable semiconductor components which are controlled by a gate electrode. In particular, the invention relates to field effect transistors such as MOSFETs and IGBTs.
Eine generelle Problematik bei steuerbarenA general problem with controllable
Halbleiterbauelementen ist deren Verhalten bei Ein- und Abschaltevorgangen. Ziel bei der Entwicklung von Schaltungen mit steuerbaren Halbleiterbauelementen ist es, möglichst optimierte und robuste Bauelemente und Schaltungen zu erhalten.Semiconductor components are their behavior when switching on and off. The aim in the development of circuits with controllable semiconductor components is to obtain components and circuits that are as optimized and robust as possible.
So soll beispielsweise die abschaltbare Stromdichte möglichst hoch sein. In diesem Fall soll mindestens der bei der maximalen Gatespannung im Kurzschlußfall, also ohne Begrenzung durch äußere Komponenten, fließende Strom beherrscht werden. Ein besonders kritischer Fall ist dabei, wenn zu Beginn des Abschaltvorganges, beispielsweise eines IGBT, nur eine im Vergleich zur Sperrfahigkeit des Halbleiterbauelementes niedrige Kollektor-Emitter-Spannung anliegt und dann mit einem geringen Gatevorwiderstand gegen eine hohe Spannung bei induktiver Last abgeschaltet wird. Dabei fließt kurzzeitig ein sehr hoher Locherstrom, der zur Zerstörung des Halbleiterbauelements fuhren kann. Es kommt zu einem Einschalten des parasitären Bipolartransistors bzw. Thyristors der Anordnung. Dieser Effekt wird als Latch-up bezeichnet. Besonders problematisch ist dieser Effekt bei IGBTs, insbesondere bei solchen mit einer grabenformigen Gate-Elektrode.For example, the current density that can be switched off should be as high as possible. In this case, at least the current flowing at the maximum gate voltage in the event of a short circuit, that is to say without limitation by external components, should be controlled. A particularly critical case is when at the beginning of the shutdown process, for example an IGBT, there is only a low collector-emitter voltage compared to the blocking capability of the semiconductor component and then shutdown with a low gate series resistance to a high voltage with an inductive load. A very high hole current flows for a short time, which can lead to the destruction of the semiconductor component. The parasitic bipolar transistor or thyristor of the arrangement is switched on. This effect is called latch-up. This effect is particularly problematic with IGBTs, especially those with a trench-shaped gate electrode.
Eine erste Losungsmoglichkeit für diese spezielle Problematik besteht darin, das Halbleiterbauelement selbst gegen Latch-up unempfindlich zu machen. Dies geschieht z. B. dadurch, daß im Halbleiterbauelement Dotierungsgebiete mit einer sehr hohen Leitfähigkeit vorgesehen werden, oder der Emitterwirkungsgrad des Bauelements minimiert wird. Solche Maßnahmen werden beispielsweise in T. Laska et al, "A Low Loss/Highly Rugged IGBT-Generation - Based On A Seif Aligned Process ith Double Implanted N/N+-Emιtter" , Proc. ISPSD 94, Davos, 1994, Seite 171 bis 175 beschrieben. Dort wird für den Fall eines IGBTs vorgesehen, daß die Leitfähigkeit des p-Bodygebietes unterhalb der n-Source sehr hoch eingestellt wird, oder der Emitterwirkungsgrad der n-Source minimiert wird.A first solution to this special problem is to make the semiconductor device itself insensitive to latch-up. This happens e.g. B. in that Semiconductor component doping regions with a very high conductivity are provided, or the emitter efficiency of the component is minimized. Such measures are described, for example, in T. Laska et al, "A Low Loss / Highly Rugged IGBT Generation - Based On A Seif Aligned Process ith Double Implanted N / N + -Emιtter", Proc. ISPSD 94, Davos, 1994, pages 171 to 175. In the case of an IGBT, it is provided that the conductivity of the p-body region below the n-source is set very high, or that the emitter efficiency of the n-source is minimized.
Eine weitere Möglichkeit zur Beeinflussung des Ein- oder Abschaltvorganges besteht darin, das Halbleiterbauelement mit einem Gatevorwiderstand zu versehen. Solche Gatevorwiderstande sind beispielsweise aus DE 195 12 799 bekannt. Außerdem offenbart US 5,525,925 eine Parallelschaltung eines Widerstandes und einer Diodenkette, die vor die Gate-Elektrode geschaltet wird und ein Abschalten des Halbleiterbauelementes in zwei Phasen mit unterschiedlichen Zeitkonstanten ermöglicht. Problematisch bei diesen Losungen aus dem Stand der Technik ist es, daß entweder die Einschaltverluste stark mit der Große des Gatevorwiderstandes zunehmen oder relativ aufwendige Schaltungen zur Optimierung des Ein- bzw. Ausschalte- Verhaltens notwendig werden.A further possibility for influencing the switch-on or switch-off process is to provide the semiconductor component with a gate series resistor. Such gate series resistors are known, for example, from DE 195 12 799. No. 5,525,925 also discloses a parallel connection of a resistor and a diode chain, which is connected in front of the gate electrode and enables the semiconductor component to be switched off in two phases with different time constants. The problem with these solutions from the prior art is that either the switch-on losses increase sharply with the size of the gate series resistor or relatively complex circuits are required to optimize the switch-on and switch-off behavior.
Aufgabe der vorliegenden Erfindung ist es daher, eine möglichst einfache Anordnung mit einem steuerbaren Halbleiterbauelement bereitzustellen, die ein optimiertes Einschalten und Abschalten des Bauelements ermöglicht. Diese Aufgabe wird gelost durch die Merkmale des vorliegenden Patentanspruchs 1.The object of the present invention is therefore to provide the simplest possible arrangement with a controllable semiconductor component which enables the component to be switched on and off in an optimized manner. This object is achieved by the features of the present patent claim 1.
Das Halöleiterbauelement besteht dabei aus mindestens zwei in ein Halbleitersubstrat eingebetteten Dotierungsgebieten sowie mindestens einer Gate-Elektrode zur Steuerung des Halbleiter- bauelerrents, die durch eine Isolationsschicht von den Dotie- rungsgecieten getrennt ist. In die leitende Zufuhrung zur Gate-Elektrode wird nun eine Widerstandsschaltung integriert, die mindestens zwei parallel geschaltete Widerstandszweige aufweist, wobei ein Teil der gesamten Widerstandszweige mindestens ein Widerstandselement sowie ggf. noch weitere Bau- elemente aufweist, der übrige Teil der Widerstandszweige mindestens ein Widerstandselement sowie ein Bauelement mit gleichrichtendem Verhalten aufweist, jedoch ggf. noch weitere Bauelemente aufweisen kann. Für den Fall, daß genau zwei Widerstandszweige vorgesehen werden, weist somit der eine Widerstandszweig zumindest ein Widerstandselement auf, wogegen der andere Widerstandszweig zumindest ein Widerstandselement und zusätzlich ein Bauelement mit gleichrichtendem Verhalten aufweist. Prinzipiell können jedoch auch mehr als zwei Widerstandszweige vorgesehen werden. Bei entsprechender Auslegung und eventuellerThe semiconductor component consists of at least two doping regions embedded in a semiconductor substrate and at least one gate electrode for controlling the semiconductor component, which is separated from the doping regions by an insulation layer. In the lead supply to The gate electrode is now integrated with a resistance circuit, which has at least two resistance branches connected in parallel, part of the entire resistance branches having at least one resistance element and possibly further components, the remaining part of the resistance branches has at least one resistance element and a component with rectifying behavior has, but may also have other components. In the event that exactly two resistance branches are provided, the one resistance branch thus has at least one resistance element, whereas the other resistance branch has at least one resistance element and additionally a component with rectifying behavior. In principle, however, more than two resistance branches can also be provided. With appropriate design and possible
Anpassung der Bauelemente mit gleichrichtendem Verhalten insbesondere bezüglich ihres eigenen Widerstandes kann auch in dem übrigen Teil der Widerstandszweige auf ein Widerstandselement komplett verzichtet werden.Adaptation of the components with rectifying behavior, in particular with regard to their own resistance, can be dispensed with completely in the remaining part of the resistance branches on a resistance element.
Durch die gleichrichtenden Bauelemente in einem Teil der Widerstandszweige kann nunmehr erreicht werden, daß e nach Richtung des Stromflusses durch die Widerstandsschaltung nur ein Teil der Widerstandszweige von einem Strom durchflössen wird. Die Widerstandsschaltung besitzt in der einenThe rectifying components in part of the resistance branches can now be used to ensure that a current flows through only part of the resistance branches in the direction of the current flow through the resistance circuit. The resistance circuit has one
Durchflußrichtung einen anderen Widerstandswert als in der anderen Durchflußrichtung. Dies ermöglicht somit auf einfache Weise eine getrennte Optimierung des Einschalteverhaltens und des Abschalteverhaltens durch eine Anpassung der entsprechenden Vorwiderstande für den Ladungstransport zu der Gate-Elektrode hm bzw. von der Gate-Elektrode weg.Flow direction a different resistance value than in the other flow direction. This therefore enables a simple optimization of the switch-on behavior and the switch-off behavior separately by adapting the corresponding series resistors for the charge transport to the gate electrode hm or away from the gate electrode.
Bevorzugt wird dabei vorgesehen, daß das gleichrichtende Bauelement im jeweiligen Widerstandszweig so geschaltet wird, daß ein Ladungstransport zur Gate-Elektrode hm in Durchlaßrichtung des Bauelements erfolgt, ein Ladungstransport von der Gate-Elektrode weg dagegen m Sperπchtung des Bauele- ments erfolgt. Der Widerstandszweig ist somit für einen Ladungstransport von der Gate-Elektrode weg gesperrt. Damit wird der Widerstand für den Ladungstransport von der Gate- Elektrode weg lediglich durch die übrigen Widerstandszweige ohne gleichrichtende Bauelemente bestimmt. Für den Ladungstransport zur Gate-Elektrode hin wird dagegen der Widerstand durch alle Widerstandszweige bestimmt und ergibt sich als Gesamtwiderstand der Parallelschaltung der Emzelwider- stande. Der Widerstand in Richtung zur Gate-Elektrode hm ist somit wesentlich geringer als der Widerstand beim Ladungstransport von der Gate-Elektrode weg. Somit erfolgt ein Aufladen der Gate-Elektrode wesentlich schneller als das Entladen der Gate-Elektrode. Der Ausschaltvorgang wird damit im Vergleich zum Einschaltvorgang wesentlich verzögert. Durch diese Verzögerung des Abschaltvorgangs kann der Stromfluß im Halbleiterbauelement , insbesondere der Locherstromanteil, erheblich verringert werden und somit insbesondere ein Latch-up des Bauelements verhindert werden.It is preferably provided that the rectifying component is switched in the respective resistance branch in such a way that a charge is transported to the gate electrode hm in the forward direction of the component, whereas a charge is transported away from the gate electrode while the component is being is done. The resistance branch is thus blocked for a charge transport away from the gate electrode. The resistance for the charge transport away from the gate electrode is thus only determined by the remaining resistance branches without rectifying components. For the transport of charge to the gate electrode, however, the resistance is determined by all resistance branches and is the total resistance of the parallel connection of the Emzel resistors. The resistance in the direction of the gate electrode hm is thus significantly lower than the resistance during charge transport away from the gate electrode. The gate electrode is thus charged much faster than the gate electrode is discharged. The switch-off process is thus significantly delayed compared to the switch-on process. Through this delay in the switch-off process, the current flow in the semiconductor component, in particular the hole current component, can be considerably reduced and, in particular, a latch-up of the component can be prevented.
In den Widerstandszweigen können grundsatzlich alle Arten von Bauelementen mit gleichrichtendem Verhalten vorgesehen werden. Bevorzugt werden für solche Bauelemente Dioden verwendet. Es kann jedoch auch beispielsweise vorgesehen werden, eine Transistorenanordnung derart vorzusehen, daß sie ein gleichrichtendes Verhalten aufweist. Es ist dabei nicht unbedingt notwendig, daß das Bauelement ein möglichst optimales gleichrichtendes Verhalten aufweist. Es ist beispielsweise bereits ausreichend, daß das Bauelement im Widerstandszweig einen Leckstrom in Sperπchtung aufweist, der kleiner als 20% des Stromes in Durchlaßrichtung ist, den das Bauelement im Widerstandszweig aufweist. Wesentlich für die Funktion der Anordnung ist nur, daß der Gesamtwiderstand der Widerstandsschaltung beim Einschaltvorgang deutlich unterschiedlich vom Gesamtwiderstand beim Ausschaltvorgang gestaltet werden kann. Idealerweise sollte dabei derIn principle, all types of components with rectifying behavior can be provided in the resistance branches. Diodes are preferably used for such components. However, it can also be provided, for example, to provide a transistor arrangement such that it exhibits rectifying behavior. It is not absolutely necessary for the component to have the best possible rectifying behavior. For example, it is already sufficient for the component in the resistor branch to have a leakage current in the blocking direction that is less than 20% of the current in the forward direction that the component has in the resistor branch. It is only essential for the function of the arrangement that the total resistance of the resistance circuit during the switch-on process can be designed significantly different from the total resistance during the switch-off process. Ideally, the
Gesamtwiderstand des ersten Teils der Widerstandszweige, also derjenigen Widerstandszweige ohne Gleichrichter, mindestens das Doppelte des Gesamtwiderstandes der übrigen Wi- derstandszweige, also derjenigen Widerstandszweige mit Gleichrichter, betragen.Total resistance of the first part of the resistance branches, i.e. those resistance branches without rectifiers, at least double the total resistance of the other resistance branches, that is to say those resistance branches with a rectifier.
Die Widerstandsschaltung kann dabei auf unterschiedliche Weise realisiert werden. So kann beispielsweise vorgesehen werden, daß die Widerstandsschaltung durch Polysilizium- schichten gebildet wird, die durch eine oder mehrere Isolationsschichten vom Halbleitersubstrat getrennt sind. Insbeson- dere kann dabei vorgesehen werden, daß die Isolationsschicht durch dieselbe Schicht gebildet wird, die auch die Gate-Elektrode vom Halbleitersubstrat trennt. Als Polysiliziumschicht zur Bildung der Widerstandsschaltung kann dieselbe Schicht verwendet werden, die zur Herstellung der Gate-Elektrode be- nutzt wird.The resistance circuit can be implemented in different ways. For example, it can be provided that the resistance circuit is formed by polysilicon layers that are separated from the semiconductor substrate by one or more insulation layers. In particular, it can be provided that the insulation layer is formed by the same layer that also separates the gate electrode from the semiconductor substrate. The same layer that is used to manufacture the gate electrode can be used as the polysilicon layer for forming the resistance circuit.
Alternativ kann jedoch auch vorgesehen werden, daß die Widerstandsschaltung durch die Erzeugung entsprechender Diffusionsgebiete direkt im Halbleitersubstrat gebildet wird. Hierzu sind die allgemein üblichen Verfahren anzuwenden.Alternatively, however, it can also be provided that the resistance circuit is formed directly in the semiconductor substrate by generating corresponding diffusion regions. For this, the generally customary procedures are to be applied.
Ein spezielles Ausführungsbeispiel der vorliegenden Erfindung wird anhand der Figuren 1 bis 4 sowie der nachfolgenden Beschreibung erläutert.A special embodiment of the present invention is explained with reference to Figures 1 to 4 and the following description.
Es zeigen:Show it:
Figur 1: Schaltungsskizze des Halbleiterbauelements mit WiderstandsschaltungFigure 1: Circuit diagram of the semiconductor device with resistance circuit
Figur 2: Schematische Darstellung eines IGBT mit grabenformi- ger Gate-ElektrodeFigure 2: Schematic representation of an IGBT with a trench-shaped gate electrode
Figur 3: Schematische Darstellung eines IGBT mit grabenformi- ger Gate-Elektrode und Polysilizium-Widerstandsan- ordnung Figur 4: Draufsicht auf die Widerstandsanordnung gemäß Figur 3Figure 3: Schematic representation of an IGBT with a trench-shaped gate electrode and polysilicon resistor arrangement FIG. 4: top view of the resistor arrangement according to FIG. 3
Die Schaltungsskizze nach Figur 1 zeigt ein steuerbares Halb- leiterbauelement 1, dessen Gate-Elektrode über eine leitende Zuführung 7 mit einer Spannungsquelle VQJ? verbunden ist. In der leitenden Zuführung 7 ist dabei noch eine Widerstandsschaltung 8 vorgesehen, die aus zwei parallel geschalteten Widerstandszweigen 9, 10 besteht. Im ersten Widerstandszweig 9 ist dabei ein Widerstand 11 mit einem Widerstandswert Rl vorgesehen. Der zweite Widerstandszweig 10 weist einen Widerstand 12 mit einem Widerstandswert R2 und eine Diode 13 auf. Die Diode 13 ist dabei so geschaltet, daß ein Ladungstransport zur Gate-Elektrode des Halbleiterbauelements 1 hin in Durchlaßrichtung der Diode 13 erfolgt. Der Wert von Rl sollte idealerweise mindestens das doppelte, beispielsweise etwa das lOfache des Wertes von R2 betragen. So kann beispielsweise für ein Halbleiterbauelement 1, das für einen Leistungsstromkreis von 25 A vorgesehen ist, ein Wert für Rl von etwa 50 Ohm gewählt werden, für R2 dagegen ein Wert von etwa 5 Ohm. R2 kann aber auch einen wesentlich kleineren Wert annehmen, umgekehrt kann auch Rl größere Werte annehmen.The circuit diagram according to FIG. 1 shows a controllable semiconductor component 1, the gate electrode of which is connected via a conductive lead 7 to a voltage source V Q J? connected is. A resistance circuit 8 is also provided in the conductive feed 7, which consists of two resistance branches 9, 10 connected in parallel. A resistor 11 with a resistance value R1 is provided in the first resistance branch 9. The second resistance branch 10 has a resistor 12 with a resistance value R2 and a diode 13. The diode 13 is connected such that a charge is transported to the gate electrode of the semiconductor component 1 in the forward direction of the diode 13. The value of Rl should ideally be at least twice, for example about ten times the value of R2. For example, for a semiconductor component 1 which is provided for a power circuit of 25 A, a value for Rl of approximately 50 ohms can be selected, for R2, on the other hand, a value of approximately 5 ohms. However, R2 can also assume a much smaller value, conversely, R1 can also assume larger values.
Das Gleichrichterverhalten der Diode 13 muß nicht sonderlich optimiert sein. Es ist ausreichend, wenn der Leckstrom inThe rectifier behavior of the diode 13 need not be particularly optimized. It is sufficient if the leakage current is in
Sperrichtung der Diode 13 nicht höher ist als 20% des Stromes in Durchlaßrichtung, wobei der Strom in Durchlaßrichtung durch das Widerstandselement 12, bzw. durch seinen Wert R2 bestimmt wird.The blocking direction of the diode 13 is not higher than 20% of the current in the forward direction, the current in the forward direction being determined by the resistance element 12 or by its value R2.
Als Halbleiterbauelement 1 ist im vorliegenden Beispiel ein n-Kanal-Trench-IGBT, d. h. ein IGBT mit einer grabenförmigen Gate-Elektrode vorgesehen. Dieser weist ein n~-Substrat 2 auf, in das eine p-Basisregion 3, sowie eine n+-Sourceregion 4 als Dotierungsgebiete eingebettet sind. Diese grenzen an einen Graben an, der mit einer Isolationsschicht β ausgekleidet ist und mit einer Polysiliziumschicht 5 gefüllt ist, die als Gate-Elektrode wirkt. Auf der gegenüberliegenden Seite des Halbleitersubstrats weist das Bauelement eine p+- Anodenregion als Drainregion bzw. Kollektorregion auf. Die Sourceregion 4 wird auch als Emitterregion bezeichnet.An n-channel trench IGBT, ie an IGBT with a trench-shaped gate electrode, is provided as the semiconductor component 1 in the present example. This has an n ~ substrate 2, in which a p-base region 3 and an n + source region 4 are embedded as doping regions. These adjoin a trench which is lined with an insulation layer β and filled with a polysilicon layer 5 that acts as a gate electrode. On the opposite side of the semiconductor substrate, the component has a p + anode region as the drain region or collector region. The source region 4 is also referred to as the emitter region.
Figur 3 zeigt nun einen anderen Querschnitt durch einen erfindungsgemäßen IGBT 1 und einen Zweig derFIG. 3 now shows another cross section through an IGBT 1 according to the invention and a branch of the
Widerstandsanordnung 8, der eine Diode 13 aufweist. Isoliert vom Halbleitersubstrat 2 bzw. den Dotierungsgebieten 3, 4 wird nun die leitende Zuführung 7, die alsResistor arrangement 8, which has a diode 13. The conductive lead 7, which is shown as., Is now isolated from the semiconductor substrate 2 or the doping regions 3, 4
Polysiliziumschicht ausgebildet und gleichzeitig mit der Gate-Elektrode 5 erzeugt werden kann, von der Gate-Elektrode 5 weggeführt. Die Polysiliziumschicht bildet dabei auch das Widerstandselement 12 der Widerstandsanordnung 8, das als n- Polysilizium ausgebildet ist. An dieses Widerstandselement grenzut eine p-Polysliliziumschicht an, wodurch der pn- Übergang einer Diode 13 gebildet wird.Polysilicon layer formed and can be generated simultaneously with the gate electrode 5, guided away from the gate electrode 5. The polysilicon layer also forms the resistance element 12 of the resistor arrangement 8, which is designed as n-polysilicon. A p-polysilicon layer adjoins this resistance element, as a result of which the pn junction of a diode 13 is formed.
Die Widerstandsanordnung 8 ist ebenfalls durch die Isolationsschicht 6 vom Halbleitersubstrat 2 bzw. denThe resistor arrangement 8 is also through the insulation layer 6 from the semiconductor substrate 2 or
Dotierungsgebieten 3 getrennt. Es können jedoch zur Erzeugung der Widerstandsanordnung 8 auch andere Schichten verwendet werden, die ein entsprechendes Widerstandsverhalten aufweisen. Ebenso kann auch die Trennung der Widerstandsanordnung vom Halbleitersubstrat durch andere oder weitere Isolationsschichten erfolgen.Doping areas 3 separately. However, other layers can also be used to produce the resistor arrangement 8, which have a corresponding resistance behavior. Likewise, the resistor arrangement can also be separated from the semiconductor substrate by means of other or further insulation layers.
Die Widerstandsanordnung 8 grenzt wiederum an einen Kon- taktierungsbereich 14 zur Kontaktierung der Gate-Elektrode, der durch eine Metallisierung gebildet wird. Eine weitere Metallisierung 15 sorgt dafür, daß die parallel liegenden Widerstandszweige gateseitig miteinander zu einer Parallelschaltung verbunden werden.The resistance arrangement 8 in turn borders on a contact area 14 for contacting the gate electrode, which is formed by a metallization. A further metallization 15 ensures that the parallel resistance branches are connected to one another on the gate side to form a parallel connection.
Die in Figur 3 gezeigten beiden Gate-Elektroden 5 sind bevorzugt als Teil einer Transistorzelle ausgebildet, d.h. es werden durch mehrere Gräben, in denen sich Gate-Elektroden befinden, Transistorzellen begrenzt. Die Graben kreuzen sich und bilden so geschlossene Zellen. Diese können prinzipiell beliebige Formen besitzen wie rechteckig, sechseckig oder quadratisch. Die Gate-Elektroden in den Graben einer Zelle sind dabei leitend miteinander verbunden bzw. es besteht eine durchgehende Gate-Elektrodenstruktur durch die Graben einer Zelle. Die Gate-Elektroden einzelner Zellen können ebenfalls untereinander verbunden sein. Es kann nun für ede der Transistorzellen bzw. für jede Anordnung untereinander verbundener Transistorzellen genau eine Widerstandsanordnung 8 vorgesehen werden. Grundsätzlich können jedoch statt nur einer auch mehrere solche Widerstandsanordnungen 8 vorgesehen werden .The two gate electrodes 5 shown in FIG. 3 are preferably formed as part of a transistor cell, ie there are several trenches in which gate electrodes are located located, transistor cells limited. The ditches cross and form closed cells. In principle, these can have any shape, such as rectangular, hexagonal or square. The gate electrodes in the trench of a cell are conductively connected to one another or there is a continuous gate electrode structure through the trench of a cell. The gate electrodes of individual cells can also be connected to one another. Exactly one resistor arrangement 8 can now be provided for each of the transistor cells or for each arrangement of interconnected transistor cells. Basically, however, several such resistor arrangements 8 can be provided instead of just one.
Figur 4 zeigt in einer Draufsicht die gesamteFigure 4 shows the whole in a top view
Widerstandsanordnung 8 mit der leitenden Zufuhrung 7 zur Gate-Elektrode sowie der angrenzenden Kontaktierungsflache 14 zur Kontaktierung der Widerstandsanordnung 8 und der Metallisierung 15 zur gateseitigen Verbindung der Widerstandszweige. Die gesamte Widerstandsschaltung 8 selbst besteht dabei aus einem n-Polysiliziumwiderstand 11 mit einem Widerstandswert Rl, der leitend mit der leitenden Zufuhrung 7 sowie mit der Kontaktierungsflache 14 verbunden ist. Parallel zu diesem Widerstand 11 ist ein n-Polysiliziumwiderstand 12 mit einem Widerstandswert R2 geschaltet, der an ein p-Resistor arrangement 8 with the conductive feed 7 to the gate electrode and the adjacent contact area 14 for contacting the resistor arrangement 8 and the metallization 15 for connecting the resistance branches on the gate side. The entire resistance circuit 8 itself consists of an n-polysilicon resistor 11 with a resistance value R1, which is conductively connected to the conductive supply 7 and to the contact area 14. In parallel with this resistor 11, an n-polysilicon resistor 12 with a resistance value R2 is connected, which is connected to a p-
Polysiliziumgebiet angrenzt. Dabei bildet der pn-Ubergang 13 eine Diode, die mit dem Widerstand 12 in Reihe geschaltet ist und an die Kontaktierungsflache 14 angrenzt.Polysilicon area adjacent. The pn junction 13 forms a diode which is connected in series with the resistor 12 and adjoins the contact area 14.
Die konkrete Ausgestaltung der gesamten Anordnung richtet sich dabei unter anderem nach den Erfordernissen beim Layout des Halbleiterchips . So kann beispielsweise vorgesehen werden, daß die Widerstandsanordnung 8 und die Kontaktierungs- flache 14 im Innenbereich des Chips vorgesehen werden oder alternativ am Chiprand vorgesehen werden. Entsprechend kann auch eine Abwandlung der leitenden Zufuhrung 7 sowie der Isolationsschicht 6 erfolgen. Ebenso ist auch die Erfindung nicht allein auf Halbleiterbauelemente mit grabenformigen Gate-Elektroden beschrankt. The specific configuration of the entire arrangement depends, among other things, on the requirements for the layout of the semiconductor chip. For example, it can be provided that the resistor arrangement 8 and the contacting surface 14 are provided in the interior of the chip or alternatively are provided on the edge of the chip. Correspondingly, the conductive supply 7 and the insulation layer 6 can also be modified. The invention is also the same not only limited to semiconductor devices with trench-shaped gate electrodes.

Claims

Patentansprüche claims
1. Anordnung mit einem steuerbaren Halbleiterbauelement (1)1. Arrangement with a controllable semiconductor component (1)
- mindestens zwei in ein Halbleitersubstrat (2) eingebetteten Dotierungsgebieten (3, 4) und- At least two doping regions (3, 4) and embedded in a semiconductor substrate (2)
- mindestens einer Gate-Elektrode (5) zur Steuerung des Halbleiterbauelements, wobei die Gate-Elektrode (5) durch eine Isolationsschicht (6) von den Dotierungsgebieten (3, 4) ge- trennt ist,at least one gate electrode (5) for controlling the semiconductor component, the gate electrode (5) being separated from the doping regions (3, 4) by an insulation layer (6),
- einer leitenden Zufuhrung (7) zur Gate-Elektrode (5), dadurch gekennzeichnet, daß m der leitenden Zufuhrung (7) eine Widerstandsschaltung (8) mit mindestens zwei parallelgeschalteten Widerstandszwei- gen (9, 10) vorgesehen ist, wobei ein erster Teil der Widerstandszweige (9) zumindest ein Widerstandselement (11) aufweist, der restliche Teil der Widerstandszweige (10) zumindest ein Widerstandselement (12) sowie ein Bauelement (13) mit gleichrichtendem Verhalten aufweist.- A conductive feed (7) to the gate electrode (5), characterized in that m the conductive feed (7) is a resistance circuit (8) with at least two parallel-connected resistance branches (9, 10) is provided, a first part the resistance branches (9) has at least one resistance element (11), the remaining part of the resistance branches (10) has at least one resistance element (12) and a component (13) with rectifying behavior.
2. Anordnung nach Anspruch 1, dadurch gekennzeichnet, daß das Bauelement (13) im restlichen Teil der Widerstands- zweige (10) so geschaltet ist, daß ein Ladungstransport zur Gate-Elektrode (5) hm in Durchlaßrichtung des Bauelements (13) und ein Ladungstransport von der Gate-Elektrode (5) weg Spemchtung des Bauelements (13) erfolgt.2. Arrangement according to claim 1, characterized in that the component (13) in the remaining part of the resistance branches (10) is switched so that a charge transport to the gate electrode (5) hm in the forward direction of the component (13) and a Charge is transported away from the gate electrode (5) and the component (13) is cleaned.
3. Anordnung nach einem der Ansprüche 1 bis 2, dadurch gekennzeichnet, daß das Bauelement (13) als Diode ausgebildet ist.3. Arrangement according to one of claims 1 to 2, characterized in that the component (13) is designed as a diode.
4. Anordnung nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß das Bauelement (13) im Widerstandszweig (10) einen Leckstrom Spemchtung aufweist, der kleiner als 20 % des Stromes in Durchlaßrichtung des Bauelements (13) im Widerstandszweig (10) ist.4. Arrangement according to one of claims 1 to 3, characterized in that the component (13) in the resistance branch (10) has a leakage current that is less than 20% of Current in the forward direction of the component (13) in the resistance branch (10).
5. Anordnung nach einem der Ansprüche 1 bis 4, dadurch gekennzeichnet, daß die Widerstandsschaltung (8) durch Polysiliziumschichten gebildet wird, die durch eine Isolationsschicht (6) vom Halbleitersubstrat (2) getrennt sind.5. Arrangement according to one of claims 1 to 4, characterized in that the resistance circuit (8) is formed by polysilicon layers which are separated by an insulation layer (6) from the semiconductor substrate (2).
6. Anordnung nach einem der Ansprüche 1 bis 4, dadurch gekennzeichnet, daß die Widerstandsschaltung (8) durch Diffusionsgebiete im Halbleitersubstrat (2) gebildet wird.6. Arrangement according to one of claims 1 to 4, characterized in that the resistance circuit (8) is formed by diffusion regions in the semiconductor substrate (2).
7. Anordnung nach einem der Ansprüche 1 bis 6, dadurch gekennzeichnet, daß der Widerstand im ersten Teil der Widerstandszweige (9) mindestens das Doppelte des Widerstandes im restlichen Teil der Widerstandszweige (10) beträgt.7. Arrangement according to one of claims 1 to 6, characterized in that the resistance in the first part of the resistance branches (9) is at least twice the resistance in the remaining part of the resistance branches (10).
8. Anordnung nach einem der Ansprüche 1 bis 7, dadurch gekennzeichnet, daß das steuerbare Halbleiterbauelement (1) als Insulated Gate Bipolartransistor IGBT ausgebildet ist. 8. Arrangement according to one of claims 1 to 7, characterized in that the controllable semiconductor component (1) is designed as an insulated gate bipolar transistor IGBT.
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