Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/50—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication
  • H04L12/52—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q11/00—Selecting arrangements for multiplex systems
  • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/1302—Relay switches
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/1304—Coordinate switches, crossbar, 4/2 with relays, coupling field
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/1305—Software aspects
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/13174—Data transmission, file transfer
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/13216—Code signals, frame structure
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/13292—Time division multiplexing, TDM
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/13299—Bus

Definitions

• the present invention refers to methods and an arrangement for establishing communication channels in a DTM network.
• circuit switched networks which have the inherent property of providing each host with a guaranteed bandwidth, has been found to provide may advantage- ous features in this context.
• DTM Dynamic synchronous Transfer Mode
• an object of the invention is to provide a solution which decreases the demand for control signaling within circuit switched networks of the kind mentioned in the introduction, especially within a DTM network.
• a method for establishing communication channels in a DTM network comprising the steps of: establishing a DTM channel from a first node to a second node via one or more intermediate nodes; and establishing a set of one or more DTM channels within said a DTM channel.
• an arrangement for establishing communication channels in a DTM network comprising: a first node; a second node; means for establishing a DTM channel from said first node to said second node, wherein said DTM channel is established via one or more intermediate nodes; and means for establishing a set of one or more DTM channels within said a DTM channel.
• the invention is thus based upon the idea of treating a plurality of DTM channels, herein occasionally referred to as DTM subchannels, as constituents of single DTM channel, herein occasionally referred to as a DTM main channel or a DTM "tunnel".
• the invention thereby makes it possible to manage, alter, modify, etc., the distribution of time slots among DTM subchannels without necessarily having to affect the management of the DTM main channel, the size of the DTM main channel, or the allocation of time slots to the DTM main channel.
• the intermediate nodes when the DTM main channel, and consequently the DTM subchannels, extends from a sending node to a receiving node via one or more intermediate nodes, the intermediate nodes merely needs to participate in the management of and the allocation of time slots to the DTM main channel, whereas the definition of DTM subchannels may be managed end to end, or rather without intermediate nodes participating in any control signaling.
• DTM subchannel resolution merely needs to be provided at the sending and receiving node, and/or at the end points of the DTM mainchannel, without involving the intermediate nodes.
• the possibility of not having to involve intermediate nodes in the management of a plurality of DTM subchannels all extending over the same network path provides a great advantage in significantly reducing the signaling requirements, especially when the number of intermediate nodes is large.
• said DTM subchannels comprise one or more control channels.
• a node will typically have access to a control slot, which makes it possible for the node to send control messages to other nodes situated on the same link (such as a bus or a ring) .
• any control signaling to nodes on another link is impossible without the participation of an intermediate node that has access to a control channel on said another link and therefore can handle the control signaling necessary on that link. Consequently, when managing a channel that is not confined to one link, but instead reaches over a plurality of links, a plurality of intermediate nodes will typically have to take part in the exchange of control messages on a hop by hop basis.
• said DTM control channel will provide a direct signaling path to node situated on other links. Consequently, said DTM main channel may be regarded as a virtual link connecting all nodes that uses said main channel to send and/or receive control messages or payload data.
• any intermediate node that merely provides mapping of said DTM main channel without participating in the actual sending/receiving of data in said channel or in DTM subchannels thereof will not be involved in the management of channels within said main channel, i.e. the management of channels on said virtual link.
• the invention significantly reduces the amount of signaling needed within a DTM network.
• channels received from one or more input bitstreams are mapped into respective DTM subchannels of said DTM main channel, at an "input end" of said DTM main channel.
• the respective DTM subchannels of said DTM main channel are then mapped into respective output channels of one or more output bitstreams at an "output end" of said DTM main channel.
• the invention thus provides means for multiplexing channels into larger channels on over large parts of a network.
• the division of DTM channels into DTM subchannels according to the invention may be used recursive.
• a plurality of DTM subchannels are transferred within a DTM main channel, which in turn is trans- ferred together with other DTM channels as part of a supra DTM main channel, and so on.
• the creation of "virtual link" in the form of DTM main channels according to the invention may thus be performed over a plurality of hierarchical link levels.
• data transferred within said DTM main channel is encrypted as a whole, i.e. not subchannel by subchannel. As a result, it becomes more difficult for an unauthorized user to decrypt a DTM subchannel, and network security and integrity is therefore enhanced.
• a DTM main channel of the above mentio- ned kind as a separate, virtual interface, and by operating the node accordingly, use of the invention is easily implemented without having to design complicated separate software processes and/or memory functions dedicated for the management and resolution of DTM subchannels. Since virtual interfaces according to the invention may be used recursively, an increased depth of the subchannel division (i.e. the division of DTM subchannels into DTM subchannels into subchannels, and so on) handled in a preferable manner using one and the same software function, as described further below with reference to Fig. 4.
• said one or more DTM subchannels are divided into DTM control channels and DTM data channels, wherein control signaling for managing said DTM data channels on said virtual link are performed using said one or more DTM control channels.
• This provides a mechanism for transmitting control messages between nodes located on separate links transparent to intermediate nodes, as has been discussed above.
• the term "intended receivers" refers to those units (nodes) that are set to transmit or receive data (whether control signaling or payload data) using said DTM main channel or DTM subchannels thereof.
• a node that merely provides mapping of a DTM main channel (and consequently of the DTM subchannels within said main channel) from one bitstream to another without actually being set to listen to or transmit data within said main channel, and not being concerned with any existing subchannel resolution, is not considered as an "intended receiver".
• a unicast DTM main channel i.e. a point- to-point "tunnel" wherein one single node acts as entry point and one single other node acts as exit node
• the virtual link formed by said DTM main channel will be a unicast link.
• a multi-access DTM main channel i.e. a DTM main channel that is accessed and used by a plurality of nodes, will be equally advantageous.
• said virtual link formed by said multi-access DTM main channel consequently may be regarded as a multi-access link.
• a node having access to the multi-access DTM tunnel may be provided to read data from, and/or to transmit data into, one or more of the DTM subchannels thereof, for example acting in similar to the function of an add-drop multiplexor in relation to the DTM subchannels of said DTM main channel.
• the virtual link formed by the DTM main channel may be configured and viewed as forming, for example, a virtual single ring or bus link topology on top of the actual DTM topology.
• a "DTM network” is a circuit switched time division multiplexed network of the kind wherein information is transferred between nodes of the network on bitstreams.
• Each bit- stream is divided into regularly recurrent, essentially fixed size frames, so called “DTM frames", each comprising a number of fixed size time slots, said time slots being separated into control slots and data slots.
• DTM frames each comprising a number of fixed size time slots, said time slots being separated into control slots and data slots.
• a time slot position of a DTM frame defines either a control slot or a data slot.
• Control slots are used for control signaling between nodes of the network
• data slots are used for the transfer of user data (sometimes often referred to as payload data) .
• payload data sometimes often referred to as payload data
• write access to the time slots of a DTM frame is distributed among nodes being attached to the bitstream carrying said DTM frame, each node typically having write access to a respective at least one control slot and a respective dynamically adjustable set of data slots within each recurrent frame.
• having write access to a time slot position in a frame means having write access to said time slot position within each recurrent frame.
• a node will use the data slots it has write access to for establishing so called "DTM channels" by allocating one or more of said data slots to each respective DTM channel.
• a DTM channel is defined by one or more time slots occupying the same time slot position within each DTM recurring frame of the bitstream upon which said DTM channel is carried.
• the channel may of course be defined by a different set of time slot positions on the two bit- streams.
• a DTM channel may be either a control channel or a data channel, depending on whether control or data slots that is allocated to said channel.
• a DTM channel may be unicast (point-to-point) , multicast (point-to-multipoint), or broadcast.
• an advantageous and preferred emboidment of the invention is when a network operator wants to allocate a certain amount of capacity to a customer connected to the network or for example to another network operator who is interested in offering network services over the first operators network, and in doing so wants to let the customer/operator have control over DTM channel establishment within the so allocated capacity only.
• This task can be solved using the invention by establishing a main subchannel to be used by the client/- operator, and then providing the client/operator with authority and access to configure DTM subchannels within the DTM main channel only.
• FIG. 1 schematically shows a DTM network that is operated in accordance with an embodiment of the invention
• Figs. 2a-2c schematically show allocation of time slots to DTM channels on a bitstream according to prior art
• Figs. 2d-2e schematically show allocation of time slots to DTM channels on a bitstream according to an embodiment of the invention
• Fig. 3 is a block diagram schematically illustrating a node of the network in Fig. 1;
• Fig. 4 schematically shows a simplified view of the DTM network in Fig. 1.
• a DTM network NW comprises a plurality of nodes Nl-Nll connected via four unidirectional bitstreams B1-B4.
• each one of said bit- streams B1-B4 will be used together with a respective bitstream (not shown) propagating in the opposite direction, thereby together forming a bidirectional link connecting all nodes attached thereto.
• Nodes N1-N4 are attached to bitstream Bl, nodes N4-N7 are attached to bitstream B2, nodes N6, N8, and N9 are attached to bit- stream B3, and nodes N9-N11 are attached to bitstream B4.
• the nodes in Fig. 1 typically provide end users (not shown) with access to the network.
• the network also comprises nodes not providing end user with network access, for example by merely providing switching of data between different links of the network, such as the switch nodes N4, N6, and N9.
• one or more of said nodes may interconnect the DTM network NW with an external network (not shown) separate from the DTM network NW shown in Fig. 1, such as, for example, an Ethernet network.
• bitstream B2 is divided into recurrent, essentially fixed sized frames, wherein the start of each frame is defined by a frame synchronization time slot F.
• each frame will have a nominal duration of 125 ⁇ s .
• each frame is divided into a number of fixed sized, typically 64 bit, time slots. If using said frame length of 125 ⁇ s, a time slot size of 64 bits, and a bit rate of 2 Gbps, the total number of time slots within each frame will be approximately 3900.
• the time slots are generally divided into control slots C4-C7 and data slots D4-D7.
• the control slots are used for signaling between the nodes of the network, whereas the data slots are used for the transfer of payload data.
• each node connected to bitstream B2 is typically allocated at least one control slot.
• the data slots are divided among the nodes connected to the bitstream. Consequently, as illustrated in Fig.
• node N4 at network start-up, node N4 will have access to a control slot C4 and a set of data slots D4 within each frame of the bitstream, node N5 will have access to a control slot C5 and a set of data slots D5 within each frame of the bitstream, and so on.
• the set of slots allocated to a node as control slot(s) and/or data slot(s) occupy the same slot position within each frame of the bitstream.
• the control slot C4 belonging to node N4 occupies the second time slot within each frame of the bitstream.
• each node may increase or decrease its access to slots, thereby re-distributing the access to data and/or control slots among the nodes. For example, a node having a low transfer capacity demand may give away its access to time slots to a node having a higher transfer capacity demand.
• the slots allocated to a node need not be consecutive slots, but may reside anywhere within the frame.
• each frame begins with said frame synchronization time slot, defining the frame rate on the bitstream, and ends with one or more guard band time slots G.
• node N4 may establish DTM channels on the bitstream B2 by allocating a subset of said plurality of data slots to the said DTM channels, using the control slot C4 for sending control messages referring to the management of said DTM channels .
• Fig. 2c illustrates the prior art situation wherein node N4, having access to its control slot C4 and its range of data slots D4 on bitstream B2, has established four channels CHI, CH2, CH3, and CH4.
• channel CH4 is a DTM channel from node N4 to node N7, node N4 having allocated seven of its data slots within each frame on bitstream B2 thereto and having informed the receiving node N7, using the control slot C4, about the existence of channel CH4. Also, by allocating time slots within each frame on bitstream B2 and by requesting switch node N6 to allocate a corresponding set of time slots on bitstream B3, node N4 has set-up a DTM channel CHI to node N9, comprising four slots within each frame on bitstream B2.
• node N4 has established DTM channels CH2 and CH3 on bitstream B2, said channel CH2 forming part of a multi-hop channel from node Nl to node Nil and said channel CH3 forming part of multi-hop channel from node N2 to node NlO.
• time slots for channels CHI, CH2, and CH3 are correspondingly allocated on bitstream B2, B3, and B4.
• the transfer capacity of channel CH4 is larger than the transfer capacity of channel CHI, since the number of time slots allocated to channel CH4 is larger than the number of time slots allocated to channel CHI.
• the time slots allocated to a DTM channel occupy the same time slot positions within each recurrent frame of the bitstream.
• Fig. 2d illustrates the situation wherein node N4, having recognized the many channels established to/via node N7, has established, in addition to the previous mentioned channel CH4 to node N7, a DTM main channel CH10 from node N4 to node N7 via node N6. Hence, all traffic in time slots within the channel CH10 on bitstream B2 will be mapped by node N6 into a corresponding channel portion on bitstream B3 to reach node N9.
• each DTM subchannel is defined to comprise a respective set of slots within each bitstream frame.
• node N4 has turned one time slot within the channel (the first time slot of the channel within each frame) into a control slot C4v, using said control slot to transmit control messages to node N9.
• node N4 now has access to one control slot C4 that is received by all nodes on link L3 and to one control slot C4 that is transferred within the main channel CH20 and is received by node N9.
• node N4 when managing the allocation of time slots to channels within the main channel CH10, node N4 need no longer exchange control messages via control slot C4, using node N6 as an intermediary negotiator to reach node N9. Instead, node N4 is now able to transmit control messages to node N9 directly using the control slot C4v defined within said main channel CH10. Consequently, the main channel CH10 may be regarded as a virtual link providing a virtual direct connection between nodes N4 and N9. Similarly, the access, at node N4, to the slots defining said main channel CH 10 on bitstream B2 may be regarded as forming a virtual interface that provides access to said virtual link.
• Fig. 2e shows the situation wherein the definition of DTM subchannels within the DTM main channel has been altered due to changes in capacity demands.
• channel CH11 has been terminated
• channel CH12 is unchanged
• the invention is used as a means for the network operator to hand over control of a portion of the network capacity to a customer, such as and end user or another network operator who wants to offer services over the network
• management of DTM subchannels, such as CH11, CH12, and CH13, within the DTM maincannel CH10 is handed over to the customer.
• the design of a node of the network in Fig. 1, using node N4 as an example, will now be described with reference to Fig. 3.
• the node 100 in Fig. 3, which in this example is assumed to be the node N4 in Fig. 1, comprises four 2- ports physical ingoing/outgoing interfaces 10, 20, 30, and 40, wherein the first and third interface 10 and 30 provides read/write access to the bitstreams Bl and B2, respectively, and the second and fourth interface 20 and 40 provides read/write access to respective unidirectio- nal bitstreams (not shown in Fig. 1) propagating in opposite directions in relation to said bitstreams Bl and B2.
• the interfaces are all connected to a shared memory 50 that is used to provide time and space switching of data among the links connected to the node on a slot by slot basis.
• the shared memory 50 comprises frame buffers for each received bitstream.
• the bitstream frames received by, e.g., interface 10 is sequentially written into the shared memory 50 for temporary storage therein.
• the bitstream frames received by interface 20 are sequentially written into another portion of the shared memory 50 for temporary storage therein, and so on.
• each physical interface 10, 20, 30, and 40 comprises a respective slot mapping table 11, 21, 31, and 41 used when transmitting data into the respective bitstream.
• Each slot mapping table comprises one entry for each outgoing time slot of the respective outgoing bitstream frame to be transmitted, and each entry provides pointers stating from which position in the shared memory 50 to read data from for the respective outgoing time slot.
• the content of the slot mapping tables is indirectly controlled by a node controller 60.
• the node controller 60 is arranged to read data from one or more positions of the shared memory 50, said position corresponding to control slots of other node's control channels, in order to receive control messages from other nodes.
• the node controller 60 is arranged to write data into one or more positions of the shared memory 50, said position corresponding to control slots of the node's own control channels to other nodes, in order to transmit control messages to other nodes.
• the node controller may access a routing table 70 providing, among others, information as to which receivers that may be reached via each interface, said interface either being an actual interface (i.e. an interface 11, 21,...) or a virtual interface (as discus- sed above) . Based upon such information, the node controller will set up a channel by providing an entry in a channel table 80 and by transmitting a channel announcement message to other nodes (by writing said channel announcement message into positions of the shared memory 50 corresponding to an outgoing control channel) .
• the channel table 80 provides a list of entries, one for each channel handled by the node N4. For each channel entry of the channel table 80, information is provided stating from which interface (actual or virtual) , and corresponding time slot positions, data is to be received for the respective channel and which interface (actual or virtual), and corresponding time slot positions, that is to be used when transmitting data within said channel.
• the channel table 80 is connected to an interface mapping unit 90 that provides mapping between virtual channels/slots and actual channels/slots.
• the interface mapping unit will contain a table (not shown) stating, for example, that slots 2-20 of (virtual) interface 1 (vitual interfaces are of course not shown in fig. 3 as they are virtual) correspond to slots 12-30 of (actual) interface 10.
• the interface mapping table used by the interface mapping unit 90 will be provided with recursive mapping instructions, for example by having one entry stating, that slots 2-4 of (virtual) interface 2 correspond to slots 6-8 of (vir- tual) interface 1, and another entry stating that slots 6-8 of (virtual) interface 1 correspond to slots 100-102 of (actual) interface 10. If the establishment of a channel implies establishment of a virtual interface/link, as discussed above, the node controller will make sure that the channel table 80 and the interface mapping unit 90 are updated accor- dingly.
• the interface mapping unit 90 will translate the channel list of channel table 80 and, based thereupon, see to that the necessary pointers of the slot mapping tables 11, 21, 31, and 41 are provided. Thus, the slot mapping tables will always be updated with correct mapping instructions.
• Fig. 4 schematically shows a simplified view of the DTM network in Fig. 1.
• node N4 in similar to what has been described above has established a main channel CH30 to node N9 via node N6, said main channel comprising time slots 1, 2, 4, 5, 6, 9, 10, 11, and 12 within each frame of bitstream B2 and time slots 5, 6, 7, 8, 9, 10, 12, 13, and 14 within each frame of bitstream B3.
• Table I and II show an example of the content of the channel table and interface mapping table provided in node N4 at the situation described with reference to Fig. 4.
• node N4 now considers the channel formed by slots 1, 2, 4, 5, 6, 9, 10, 11, and 12 of interface 30 (the actual interface (outgoing) to bitstream B2 ) as forming an interface 3 (in this case a virtual interface) offering slots 1-9 on that interface.
• channel CH31 is defined to comprise slots 1 and 2 of the (virtual) interface 3, which may be translated, using table I, into slots 1 and 2 of the actual interface 30.
• channel CH32 is defined to comprise slots 3 and 4 of the (virtual) interface 3, which may be translated, using table I, into slots 4 and 5 of the actual interface 30.
• Table III and IV show an example of the content of the channel table and interface mapping tables provided in node N6 at the same situation as described above.
• channel CH30 is defined to comprise slots 1, 2, 4, 5, 6, 9, 10, 11, and 12 of the node's N6 incoming interface 10 (the actual, physical interface to bitstream B2) and slots 5, 6, 7, 8, 9, 10, 12, 13, and 14 of its outgoing interface 40 (the actual, physical interface to bitstream B3) .
• node N6 is at this point unaware of the existence of subchannels within channel CH30.

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• Engineering & Computer Science (AREA)
• Computer Networks & Wireless Communication (AREA)
• Signal Processing (AREA)
• Time-Division Multiplex Systems (AREA)
• Data Exchanges In Wide-Area Networks (AREA)
• Small-Scale Networks (AREA)

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• 1998
  • 1998-10-02 SE SE9803351A patent/SE513508C2/sv not_active IP Right Cessation
• 1999
  • 1999-10-01 JP JP2000575266A patent/JP2002527944A/ja not_active Withdrawn
  • 1999-10-01 CA CA002345771A patent/CA2345771A1/en not_active Abandoned
  • 1999-10-01 KR KR1020017004210A patent/KR20010090741A/ko not_active Application Discontinuation
  • 1999-10-01 WO PCT/SE1999/001749 patent/WO2000021251A2/en not_active Application Discontinuation
  • 1999-10-01 EP EP99970231A patent/EP1118187A2/en not_active Withdrawn
  • 1999-10-01 AU AU11950/00A patent/AU1195000A/en not_active Abandoned

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