EP1109088A1 - Voltage regulator with ballast-transistor and current limiting - Google Patents

Voltage regulator with ballast-transistor and current limiting Download PDF

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Publication number
EP1109088A1
EP1109088A1 EP00403489A EP00403489A EP1109088A1 EP 1109088 A1 EP1109088 A1 EP 1109088A1 EP 00403489 A EP00403489 A EP 00403489A EP 00403489 A EP00403489 A EP 00403489A EP 1109088 A1 EP1109088 A1 EP 1109088A1
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EP
European Patent Office
Prior art keywords
voltage
transistor
output
ballast
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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EP00403489A
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German (de)
French (fr)
Inventor
Claude Renous
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STMicroelectronics SA
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STMicroelectronics SA
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/569—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
    • G05F1/573—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overcurrent detector
    • G05F1/5735—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overcurrent detector with foldback current limiting
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S323/00—Electricity: power supply or regulation systems
    • Y10S323/908—Inrush current limiters

Definitions

  • the present invention relates to a voltage regulator with ballast transistor and current limiter. It applies in particular to integrated regulators and in particular those designed according to HCMOS technology.
  • a transistor voltage regulator ballast includes a transistor (called passage or ballast) arranged in series between the inlet and the outlet of the regulator.
  • a transistor called passage or ballast
  • Such a regulator operates in using for example a voltage reference to potential barrier.
  • the output voltage is regulated by feedback.
  • Such a voltage regulator is well known in the prior art, especially for build integrated regulators.
  • a short circuit occurs between the regulator output terminals, the input voltage of the regulator is found at the terminals of the ballast transistor which can be destroyed due to the excessive current crossing it.
  • a current limiting circuit including a low value resistor (e.g. 1 ⁇ ) in series with the ballast transistor.
  • HCMOS technology was developed for increase the integration density of circuits integrated.
  • An integrated regulator made using the same technology must provide a regulated voltage of 3.3 V for an input voltage of 5 V.
  • the ballast transistor supports between its terminals a maximum voltage of 5 V. In the event of a short circuit in output of the regulator, the ballast transistor must be able to be protected very quickly and particularly effective.
  • the present invention has been designed for provide rapid and effective protection ballast transistor of such a power supply.
  • the reaction circuits of the parties voltage regulator and current limiter can each include a resistor voltage divider.
  • the regulator can include a differential amplifier including one input of a determined sign receives said voltage from reference, a first entry of sign opposite to the determined sign input receiving said voltage of reaction corresponding to the regulatory part of voltage, the output voltage of the amplifier differential controlling the ballast transistor, the reaction voltage corresponding to the limiter part of current being supplied to a second sign input opposite to the specified sign input of the amplifier differential including a fraction of the output voltage is taken to supply a control voltage to the control means of the current limiting transistor.
  • the control means may include a comparator one of whose inputs receives a reference voltage, a second input receiving said control voltage, the comparator output controlling the transistor arranged in series of the part current limiter. The output voltage fraction can be taken by a transistor dimensioned in consequence compared to the ballast transistor.
  • This regulator can be realized according to the HCMOS technology.
  • Figure 1 is an electrical diagram of a voltage regulator with current limiter according to the invention.
  • This regulator is intended to regulate a input voltage Ve, which can vary between 4 V and 5.5 V, and to supply an output voltage Vs of 3.3 V to a load RL. It uses transistors produced according to the HCMOS 6 technology supporting a limit voltage of 3.6 V.
  • the regulator circuit includes a part forming a voltage regulator comprising the T1 ballast transistor and a differential amplifier A.
  • the ballast transistor T1 is a PMOS transistor whose the source is connected to the substrate. Leaving the part forming voltage regulator delivers a voltage VS1 to a voltage divider bridge formed by resistors R1 and R2. The common point between resistors R1 and R2 is connected to an input not reversing of the differential amplifier A of which the inverting input is connected to the voltage of reference Vref.
  • the differential amplifier A is supplied between the input voltage Ve and the circuit earth. he includes two parallel branches connected to a current generator Ipol which polarizes the amplifier.
  • a first branch includes T2 and T3 transistors arranged in series.
  • a second branch includes a transistor T4 arranged in series with transistors T5 and T6 arranged in parallel.
  • the transistors T2 and T4 are PMOS transistors forming a current mirror, their grid being connected and each having its source connected to substrate.
  • the transistors T3, T5 and T6 are NMOS transistors with common substrate and whose sources are connected to the Ipol current generator. Grid of transistor T3 constitutes the inverting input of differential amplifier A while the gates transistors T5 and T6 constitute two inputs not inverters for this differential amplifier. The common point between resistors R1 and R2 is connected to the gate of transistor T6.
  • the current limiter part includes a transistor T7 connected in series between the transistor ballast and regulator output.
  • This transistor T7 is a PMOS transistor whose source is connected to the substrate.
  • the drain of transistor T1 is therefore located connected to the source of transistor T7.
  • the drain of transistor T7 constitutes the regulator output.
  • a voltage divider bridge formed resistors R3 and R4 is connected between the output regulator and ground.
  • the common point between resistors R3 and R4 is connected to the other input no inverter of the differential amplifier A, that is to say to the gate of transistor T5.
  • the output of a comparator C is connected to the gate of the transistor T7.
  • the minus input of this comparator is connected to the voltage Vref while its plus input is connected to the point Ll.
  • the point L1 is common to the drain of the transistor PMOS T8 and Ilim power source.
  • the source of transistor T8, which is connected to the substrate, is also connected to the input voltage Ve.
  • the exit of the differential amplifier A is connected to the grids of transistors T1 and T8.
  • the output of comparator C is at zero volts.
  • the transistor T7 is conductor and works in a linear zone.
  • the difference VS1 - Vs must be less than 200 mV so that the voltage regulation is carried out by the resistive bridge R3 - R4.
  • the voltage at point L1 becomes greater than Vref and the voltage VC at the output of comparator C becomes equal to VS1.
  • the transistor T7 is then regulated according to the load RL so as to regulate the current so that the voltage at point L1 becomes equal to Vref.
  • the voltage Vs drops from 3.3 V to zero according to the limitation characteristic.
  • the voltage regulation VS1 is then carried out by the ratio R1, R2 because the voltage VS falls below 3.3 V.
  • the invention therefore allows regulation on the load in normal mode and, in the limitation mode of current regulation on voltage VS1.
  • the differential transistors T5 and T6 perform the switching continuously between the two modes.
  • FIG. 2 represents a diagram of which the ordinate axis represents the voltage in volts and the x-axis time in milliseconds.
  • the diagram shows the effectiveness of regulator according to the invention. We see that when the VS voltage drops suddenly, the VC voltage at the output of comparator C suddenly shows. The return to normal situation happens just as quickly.

Abstract

The circuit has a regulator zone with a feedback circuit controlling a series ballast transistor (T1) by comparison of output voltage with a reference voltage (Vref). The circuit also has a current limiter zone, with a series transistor (T7) between ballast transistor and power output. A detector circuit causes the transistor (T7) to operate in blocking mode if output voltage falls too far.

Description

Domaine TechniqueTechnical area

La présente invention concerne un régulateur de tension à transistor ballast et à limiteur de courant. Elle s'applique en particulier aux régulateurs intégrés et notamment à ceux conçus selon la technologie HCMOS.The present invention relates to a voltage regulator with ballast transistor and current limiter. It applies in particular to integrated regulators and in particular those designed according to HCMOS technology.

Etat de la technique antérieureState of the art

Un régulateur de tension à transistor ballast comprend un transistor (dit de passage ou ballast) disposé en série entre l'entrée et la sortie du régulateur. Un tel régulateur fonctionne en utilisant par exemple une référence de tension à barrière de potentiel. La tension de sortie est régulée par contre-réaction. Un tel régulateur de tension est bien connu dans l'art antérieur, en particulier pour réaliser des régulateurs intégrés.A transistor voltage regulator ballast includes a transistor (called passage or ballast) arranged in series between the inlet and the outlet of the regulator. Such a regulator operates in using for example a voltage reference to potential barrier. The output voltage is regulated by feedback. Such a voltage regulator is well known in the prior art, especially for build integrated regulators.

Si un court-circuit se produit entre les bornes de sortie du régulateur, la tension d'entrée du régulateur se retrouve aux bornes du transistor ballast qui peut être détruit à cause du courant trop important le traversant. Afin de limiter ce courant, il a été proposé d'ajouter un circuit limiteur de courant comprenant une résistance de faible valeur (par exemple 1 Ω) en série avec le transistor ballast.If a short circuit occurs between the regulator output terminals, the input voltage of the regulator is found at the terminals of the ballast transistor which can be destroyed due to the excessive current crossing it. In order to limit this current, it was proposed to add a current limiting circuit including a low value resistor (e.g. 1 Ω) in series with the ballast transistor.

La technologie HCMOS a été développée pour augmenter la densité d'intégration des circuits intégrés. Un régulateur intégré réalisé en utilisant la même technologie doit fournir une tension régulée de 3,3 V pour une tension d'entrée de 5 V. Dans ce cas, le transistor ballast supporte entre ses bornes une tension maximale de 5 V. En cas de court-circuit en sortie du régulateur, le transistor ballast doit pouvoir être protégé très rapidement et de manière particulièrement efficace.HCMOS technology was developed for increase the integration density of circuits integrated. An integrated regulator made using the same technology must provide a regulated voltage of 3.3 V for an input voltage of 5 V. In this case, the ballast transistor supports between its terminals a maximum voltage of 5 V. In the event of a short circuit in output of the regulator, the ballast transistor must be able to be protected very quickly and particularly effective.

Exposé de l'inventionStatement of the invention

La présente invention a été conçue pour conférer une protection rapide et efficace au transistor ballast d'une telle alimentation.The present invention has been designed for provide rapid and effective protection ballast transistor of such a power supply.

L'invention a donc pour objet un régulateur de tension à limiteur de courant destiné à réguler une tension d'entrée et à délivrer une tension de sortie, comprenant :

  • une partie régulatrice de tension constituée d'un circuit amplificateur et d'un circuit de réaction, le circuit amplificateur comprenant un transistor ballast, le circuit de réaction fournissant une tension de réaction, représentative de la tension régulée par le transistor ballast, au circuit amplificateur qui fonctionne par comparaison avec une tension de référence,
  • une partie limiteur de courant comprenant un transistor disposé en série entre le transistor ballast et la sortie du régulateur, un circuit de réaction fournissant une tension de réaction représentative de la tension de sortie à des moyens de commande du transistor limiteur de courant, les moyens de commande faisant fonctionner le transistor limiteur de courant entre un régime de saturation et un régime de blocage selon que la tension de réaction représentative de la sortie est au-dessus ou au-dessous d'une tension de seuil prédéterminée.
The subject of the invention is therefore a voltage regulator with current limiter intended to regulate an input voltage and to deliver an output voltage, comprising:
  • a voltage regulating part consisting of an amplifier circuit and a reaction circuit, the amplifier circuit comprising a ballast transistor, the reaction circuit supplying a reaction voltage, representative of the voltage regulated by the ballast transistor, to the amplifier circuit which works by comparison with a reference voltage,
  • a current limiting part comprising a transistor arranged in series between the ballast transistor and the output of the regulator, a reaction circuit supplying a reaction voltage representative of the output voltage to means for controlling the current limiting transistor, the means for control operating the current limiting transistor between a saturation regime and a blocking regime depending on whether the reaction voltage representative of the output is above or below a predetermined threshold voltage.

Les circuits de réaction des parties régulatrice de tension et limiteur de courant peuvent chacun comprendre un diviseur de tension à résistances.The reaction circuits of the parties voltage regulator and current limiter can each include a resistor voltage divider.

Avantageusement, le régulateur peut comprendre un amplificateur différentiel dont une entrée d'un signe déterminé reçoit ladite tension de référence, une première entrée de signe opposé à l'entrée de signe déterminée recevant ladite tension de réaction correspondant à la partie régulatrice de tension, la tension de sortie de l'amplificateur différentiel commandant le transistor ballast, la tension de réaction correspondant à la partie limiteur de courant étant fournie à une deuxième entrée de signe opposé à l'entrée de signe déterminé de l'amplificateur différentiel dont une fraction de la tension de sortie est prélevée pour fournir une tension de commande aux moyens de commande du transistor limiteur de courant. Dans ce cas, les moyens de commande peuvent comprendre un comparateur dont l'une des entrées reçoit une tension de référence, une deuxième entrée recevant ladite tension de commande, la sortie du comparateur commandant le transistor disposé en série de la partie limiteur de courant. La fraction de tension de sortie peut être prélevée par un transistor dimensionné en conséquence par rapport au transistor ballast.Advantageously, the regulator can include a differential amplifier including one input of a determined sign receives said voltage from reference, a first entry of sign opposite to the determined sign input receiving said voltage of reaction corresponding to the regulatory part of voltage, the output voltage of the amplifier differential controlling the ballast transistor, the reaction voltage corresponding to the limiter part of current being supplied to a second sign input opposite to the specified sign input of the amplifier differential including a fraction of the output voltage is taken to supply a control voltage to the control means of the current limiting transistor. In this case, the control means may include a comparator one of whose inputs receives a reference voltage, a second input receiving said control voltage, the comparator output controlling the transistor arranged in series of the part current limiter. The output voltage fraction can be taken by a transistor dimensioned in consequence compared to the ballast transistor.

Ce régulateur peut être réalisé selon la technologie HCMOS.This regulator can be realized according to the HCMOS technology.

Brève description des dessinsBrief description of the drawings

L'invention sera mieux comprise et d'autres avantages et particularités apparaítront à la lecture de la description qui va suivre, donnée à titre d'exemple non limitatif, accompagnée des dessins annexés parmi lesquels :

  • la figure 1 est un schéma électrique d'un régulateur de tension à transistor ballast et à limiteur de courant selon la présente invention,
  • la figure 2 est un diagramme expliquant le fonctionnement du régulateur selon l'invention.
The invention will be better understood and other advantages and features will appear on reading the description which follows, given by way of nonlimiting example, accompanied by the appended drawings among which:
  • FIG. 1 is an electrical diagram of a voltage regulator with a ballast transistor and a current limiter according to the present invention,
  • Figure 2 is a diagram explaining the operation of the regulator according to the invention.

Description détaillée d'un mode de réalisation de l'inventionDetailed description of an embodiment of the invention

La figure 1 est un schéma électrique d'un régulateur de tension à limiteur de courant selon l'invention. Ce régulateur est destiné à réguler une tension d'entrée Ve, pouvant varier entre 4 V et 5,5 V, et à fournir une tension de sortie Vs de 3,3 V à une charge RL. Il utilise des transistors réalisés selon la technologie HCMOS 6 supportant une tension limite de 3,6 V.Figure 1 is an electrical diagram of a voltage regulator with current limiter according to the invention. This regulator is intended to regulate a input voltage Ve, which can vary between 4 V and 5.5 V, and to supply an output voltage Vs of 3.3 V to a load RL. It uses transistors produced according to the HCMOS 6 technology supporting a limit voltage of 3.6 V.

Le circuit du régulateur comprend une partie formant régulateur de tension comprenant le transistor ballast T1 et un amplificateur différentiel A. Le transistor ballast T1 est un transistor PMOS dont la source est reliée au substrat. La sortie de la partie formant régulateur de tension délivre une tension VS1 à un pont diviseur de tension formé des résistances R1 et R2. Le point commun entre les résistances R1 et R2 est connecté à une entrée non inverseuse de l'amplificateur différentiel A dont l'entrée inverseuse est reliée à la tension de référence Vref.The regulator circuit includes a part forming a voltage regulator comprising the T1 ballast transistor and a differential amplifier A. The ballast transistor T1 is a PMOS transistor whose the source is connected to the substrate. Leaving the part forming voltage regulator delivers a voltage VS1 to a voltage divider bridge formed by resistors R1 and R2. The common point between resistors R1 and R2 is connected to an input not reversing of the differential amplifier A of which the inverting input is connected to the voltage of reference Vref.

L'amplificateur différentiel A est alimenté entre la tension d'entrée Ve et la masse du circuit. Il comprend deux branches parallèles reliées à un générateur de courant Ipol qui polarise l'amplificateur. Une première branche comprend des transistors T2 et T3 disposés en série. Une deuxième branche comprend un transistor T4 disposé en série avec les transistors T5 et T6 disposés en parallèle.The differential amplifier A is supplied between the input voltage Ve and the circuit earth. he includes two parallel branches connected to a current generator Ipol which polarizes the amplifier. A first branch includes T2 and T3 transistors arranged in series. A second branch includes a transistor T4 arranged in series with transistors T5 and T6 arranged in parallel.

Les transistors T2 et T4 sont des transistors PMOS formant miroir de courant, leur grille étant reliée et chacun ayant sa source reliée au substrat.The transistors T2 and T4 are PMOS transistors forming a current mirror, their grid being connected and each having its source connected to substrate.

Les transistors T3, T5 et T6 sont des transistors NMOS à substrat commun et dont les sources sont reliées au générateur de courant Ipol. La grille du transistor T3 constitue l'entrée inverseuse de l'amplificateur différentiel A tandis que les grilles des transistors T5 et T6 constituent deux entrées non inverseuses pour cet amplificateur différentiel. Le point commun entre les résistances R1 et R2 est connecté à la grille du transistor T6.The transistors T3, T5 and T6 are NMOS transistors with common substrate and whose sources are connected to the Ipol current generator. Grid of transistor T3 constitutes the inverting input of differential amplifier A while the gates transistors T5 and T6 constitute two inputs not inverters for this differential amplifier. The common point between resistors R1 and R2 is connected to the gate of transistor T6.

La partie limiteur de courant comprend un transistor T7 monté en série entre le transistor ballast et la sortie du régulateur. Ce transistor T7 est un transistor PMOS dont la source est reliée au substrat. Le drain du transistor T1 se trouve donc relié à la source du transistor T7.The current limiter part includes a transistor T7 connected in series between the transistor ballast and regulator output. This transistor T7 is a PMOS transistor whose source is connected to the substrate. The drain of transistor T1 is therefore located connected to the source of transistor T7.

Le drain du transistor T7 constitue la sortie du régulateur. Un pont diviseur de tension formé des résistances R3 et R4 est connecté entre la sortie du régulateur et la masse. Le point commun entre les résistances R3 et R4 est connecté à l'autre entrée non inverseuse de l'amplificateur différentiel A, c'est-à-dire à la grille du transistor T5.The drain of transistor T7 constitutes the regulator output. A voltage divider bridge formed resistors R3 and R4 is connected between the output regulator and ground. The common point between resistors R3 and R4 is connected to the other input no inverter of the differential amplifier A, that is to say to the gate of transistor T5.

La sortie d'un comparateur C, alimenté sous la tension VS1, est reliée à la grille du transistor T7. L'entrée moins de ce comparateur est connectée à la tension Vref tandis que son entrée plus est reliée au point Ll. Le point L1 est commun au drain du transistor PMOS T8 et à la source de courant Ilim. La source du transistor T8, qui est reliée au substrat, est également reliée à la tension d'entrée Ve. La sortie de l'amplificateur différentiel A est reliée aux grilles des transistors T1 et T8.The output of a comparator C, supplied with the voltage VS1, is connected to the gate of the transistor T7. The minus input of this comparator is connected to the voltage Vref while its plus input is connected to the point Ll. The point L1 is common to the drain of the transistor PMOS T8 and Ilim power source. The source of transistor T8, which is connected to the substrate, is also connected to the input voltage Ve. The exit of the differential amplifier A is connected to the grids of transistors T1 and T8.

En fonctionnement normal, la tension à la sortie du transistor ballast T1 vaut : VS1 = Vref × R1 + R2 R2    lorsque les grilles des transistors T3, T5 et T6 sont au même potentiel. Les résistances R1 et R2 sont choisies pour avoir VS1 = 3,5 V.In normal operation, the voltage at the output of the ballast transistor T1 is: VS1 = Vref × R 1 + R 2 R 2 when the gates of the transistors T3, T5 and T6 are at the same potential. Resistors R1 and R2 are chosen to have VS1 = 3.5 V.

Les transistors T1 et T8 sont dimensionnés de la façon suivante :

  • Ww/Lw pour T1
  • Ww/Lw/1000 pour T8.
    • The transistors T1 and T8 are dimensioned as follows:
  • Ww / Lw for T1
  • Ww / Lw / 1000 for T8.

    • Tant que le courant dans le transistor T8 reste inférieur à la source de courant Ilim, la sortie du comparateur C est à zéro volt. Le transistor T7 est conducteur et travaille en zone linéaire. La différence VS1 - Vs doit être inférieure à 200 mV de façon que la régulation de tension s'effectue par le pont résistif R3 - R4.As long as the current in transistor T8 remains lower than the Ilim current source, the output of comparator C is at zero volts. The transistor T7 is conductor and works in a linear zone. The difference VS1 - Vs must be less than 200 mV so that the voltage regulation is carried out by the resistive bridge R3 - R4.

    Lorsque le courant dans le transistor T8 est supérieur au courant Ilim, la tension au point L1 devient supérieure à Vref et la tension VC à la sortie du comparateur C devient égale à VS1. Le transistor T7 se régule alors en fonction de la charge RL de façon à réguler le courant pour que la tension au point L1 devienne égale à Vref. La tension Vs tombe de 3,3 V à zéro suivant la caractéristique de limitation. La régulation de la tension VS1 s'effectue alors par le rapport R1, R2 car la tension VS tombe en dessous de 3,3 V.When the current in transistor T8 is greater than the current Ilim, the voltage at point L1 becomes greater than Vref and the voltage VC at the output of comparator C becomes equal to VS1. The transistor T7 is then regulated according to the load RL so as to regulate the current so that the voltage at point L1 becomes equal to Vref. The voltage Vs drops from 3.3 V to zero according to the limitation characteristic. The voltage regulation VS1 is then carried out by the ratio R1, R2 because the voltage VS falls below 3.3 V.

    L'invention permet donc une régulation sur la charge en mode normal et, dans le mode limitation de courant une régulation sur la tension VS1. Les transistors du différentiel T5 et T6 effectuent la commutation de façon continue entre les deux modes.The invention therefore allows regulation on the load in normal mode and, in the limitation mode of current regulation on voltage VS1. The differential transistors T5 and T6 perform the switching continuously between the two modes.

    La figure 2 représente un diagramme dont l'axe des ordonnées représente la tension en volts et l'axe des abscisses le temps en millisecondes. On a représenté la tension d'entrée Ve, la tension de sortie Vs, la tension VS1 à la sortie du transistor ballast T1 et la tension VC à la sortie du comparateur C.FIG. 2 represents a diagram of which the ordinate axis represents the voltage in volts and the x-axis time in milliseconds. We have represented the input voltage Ve, the output voltage Vs, the voltage VS1 at the output of the ballast transistor T1 and the voltage VC at the output of comparator C.

    Le diagramme montre l'efficacité du régulateur selon l'invention. On voit que lorsque la tension VS chute brutalement, la tension VC à la sortie du comparateur C montre brusquement. Le retour à la situation normale s'effectue tout aussi rapidement.The diagram shows the effectiveness of regulator according to the invention. We see that when the VS voltage drops suddenly, the VC voltage at the output of comparator C suddenly shows. The return to normal situation happens just as quickly.

    Claims (7)

    Régulateur de tension à limiteur de courant destiné à réguler une tension d'entrée (Ve) et à délivrer une tension de sortie (Vs), comprenant : une partie régulatrice de tension constituée d'un circuit amplificateur et d'un circuit de réaction, le circuit amplificateur comprenant un transistor ballast (T1), le circuit de réaction fournissant une tension de réaction, représentative de la tension régulée par le transistor ballast (T1), au circuit amplificateur qui fonctionne par comparaison avec une tension de référence (Vref), une partie limiteur de courant comprenant un transistor (T7) disposé en série entre le transistor ballast (T1) et la sortie du régulateur, un circuit de réaction fournissant une tension de réaction représentative de la tension de sortie à des moyens de commande du transistor limiteur de courant (T7), les moyens de commande faisant fonctionner le transistor limiteur de courant (T7) entre un régime de saturation et un régime de blocage selon que la tension de réaction représentative de la sortie est au-dessus ou au-dessous d'une tension de seuil prédéterminée. Voltage regulator with current limiter intended to regulate an input voltage (Ve) and to deliver an output voltage (Vs), comprising: a voltage regulating part consisting of an amplifier circuit and a reaction circuit, the amplifier circuit comprising a ballast transistor (T1), the reaction circuit supplying a reaction voltage, representative of the voltage regulated by the ballast transistor ( T1), to the amplifier circuit which operates by comparison with a reference voltage (Vref), a current limiting part comprising a transistor (T7) arranged in series between the ballast transistor (T1) and the output of the regulator, a feedback circuit supplying a feedback voltage representative of the output voltage to means for controlling the limiting transistor current (T7), the control means operating the current limiting transistor (T7) between a saturation regime and a blocking regime depending on whether the reaction voltage representative of the output is above or below a predetermined threshold voltage. Régulateur selon la revendication 1, caractérisé en ce que le circuit de réaction de la partie régulatrice de tension comprend un diviseur de tension à résistances (R1, R2).Regulator according to claim 1, characterized in that the reaction circuit of the voltage regulating part includes a divider resistance voltage (R1, R2). Régulateur selon l'une des revendications 1 ou 2, caractérisé en ce que le circuit de réaction de la partie limiteur de courant comprend un diviseur de tension à résistances (R3, R4).Regulator according to one of claims 1 or 2, characterized in that the circuit of the current limiting part includes a voltage divider with resistors (R3, R4). Régulateur selon l'une quelconque des revendications 1 à 3, caractérisé en ce qu'il comprend un amplificateur différentiel (A) dont une entrée d'un signe déterminé reçoit ladite tension de référence, une première entrée de signe opposé à l'entrée de signe déterminé recevant ladite tension de réaction correspondant à la partie régulatrice de tension, la tension de sortie de l'amplificateur différentiel (A) commandant le transistor ballast (T1), la tension de réaction correspondant à la partie limiteur de courant étant fournie à une deuxième entrée de signe opposé à l'entrée de signe déterminé de l'amplificateur différentiel (A) dont une fraction de la tension de sortie est prélevée pour fournir une tension de commande aux moyens de commande du transistor limiteur de courant (T7).Regulator according to any one of Claims 1 to 3, characterized in that it comprises a differential amplifier (A) including an input of a determined sign receives said reference voltage, a first sign entry opposite to sign entry determined receiving said reaction voltage corresponding to the voltage regulating part, the differential amplifier output voltage (A) controlling the ballast transistor (T1), the voltage of reaction corresponding to the current limiter part being supplied to a second input of sign opposite to the determined sign input of the amplifier differential (A) of which a fraction of the voltage of output is taken to provide a voltage of control to the control means of the limiting transistor current (T7). Régulateur selon la revendication 4, caractérisé en ce que les moyens de commande comprennent un comparateur (C) dont l'une des entrées reçoit une tension de référence (Vref), une deuxième entrée recevant ladite tension de commande, la sortie du comparateur (C) commandant le transistor (T7) disposé en série de la partie limiteur de courant.Regulator according to claim 4, characterized in that the control means include a comparator (C), one of the inputs receives a reference voltage (Vref), a second input receiving said control voltage, output of the comparator (C) controlling the transistor (T7) arranged in series with the current limiting part. Régulateur selon l'une des revendications 4 ou 5, caractérisé en ce que ladite fraction de tension de sortie est prélevée par un transistor (T8) dimensionné en conséquence par rapport au transistor ballast (T1).Regulator according to one of claims 4 or 5, characterized in that said output voltage fraction is drawn by a transistor (T8) dimensioned accordingly with respect to to the ballast transistor (T1). Régulateur selon l'une quelconque des revendications précédentes, caractérisé en ce qu'il est réalisé selon la technologie HCMOS.Regulator according to any one of previous claims, characterized in that it is produced using HCMOS technology.
    EP00403489A 1999-12-13 2000-12-12 Voltage regulator with ballast-transistor and current limiting Withdrawn EP1109088A1 (en)

    Applications Claiming Priority (2)

    Application Number Priority Date Filing Date Title
    FR9915668 1999-12-13
    FR9915668A FR2802315B1 (en) 1999-12-13 1999-12-13 VOLTAGE REGULATOR WITH BALLAST TRANSISTOR AND CURRENT LIMITER

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    EP1109088A1 true EP1109088A1 (en) 2001-06-20

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    EP (1) EP1109088A1 (en)
    FR (1) FR2802315B1 (en)

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    Also Published As

    Publication number Publication date
    FR2802315B1 (en) 2002-03-01
    US6346799B2 (en) 2002-02-12
    US20010005129A1 (en) 2001-06-28
    FR2802315A1 (en) 2001-06-15

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