EP1104584A1 - Conductor frame, printed circuit board with a conductor frame and a method for producing a conductor frame - Google Patents

Conductor frame, printed circuit board with a conductor frame and a method for producing a conductor frame

Info

Publication number
EP1104584A1
EP1104584A1 EP99945911A EP99945911A EP1104584A1 EP 1104584 A1 EP1104584 A1 EP 1104584A1 EP 99945911 A EP99945911 A EP 99945911A EP 99945911 A EP99945911 A EP 99945911A EP 1104584 A1 EP1104584 A1 EP 1104584A1
Authority
EP
European Patent Office
Prior art keywords
frame
integrated electronic
electronic circuit
signal line
conductor track
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP99945911A
Other languages
German (de)
French (fr)
Inventor
Jens Pohl
Simon Muff
Eckehard Miersch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Publication of EP1104584A1 publication Critical patent/EP1104584A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H10W40/226—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area
    • H10W40/228—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area the projecting parts being wire-shaped or pin-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/479—Leadframes on or in insulating or insulated package substrates, interposers, or redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment

Definitions

  • the invention relates to a conductor track frame, a circuit board with at least one conductor track frame and a method for producing a conductor track frame.
  • fast memory modules high performance DRAMs
  • fast memory modules have particularly high requirements for the dissipation of thermal power loss, the guarantee of electrical function and high numbers of connections (pins, IOs).
  • parasitic inductances, capacitances and resistances must be minimized.
  • the object of the invention is to integrate integrated electronic circuits, in particular with memory cell arrangements, into a conductor structure with the least possible design effort.
  • this object is achieved by a conductor * track frame with at least one integrated electronic circuit, wherein the integrated electronic circuit in the region of a main surface of the conductor frame is, with at least one signal line, wherein between the integrated electronic circuit and the signal line at least in sections at least an electrically insulating plate and an electrically conductive, grounded plate.
  • the signal lines connect functional elements of the integrated electronic circuit to one or more suitable connections.
  • Parasitic electrical parameters such as inductance, capacitance and resistance of the geometrical structure are minimized by the structure of the conductor track frame according to the invention. Very good electrical and signaling reliability is achieved even with integrated electronic circuits with high switching speeds, in particular with fast memory chips (high performance DRAMs) with particularly high requirements for ensuring the electrical function.
  • a particularly good use of space can be achieved if the signal line runs at least in sections within the conductor track frame.
  • a further improvement in space utilization is achieved in that at least one integrated electronic circuit is located on each of the two main surfaces of the conductor track frame.
  • the electrical reliability is further increased in that the signal line runs parallel to the integrated electronic circuit, at least in sections.
  • the conductor track frame In order to avoid thermal stress on the integrated electronic circuit, it is expedient for the conductor track frame to be provided with at least one heat distributor.
  • the conductor track frame is used as a cooling vane for the integrated electronic circuits.
  • the heat distributor is in thermal contact with a heat conductor which at least partially penetrates the conductor track frame.
  • the invention further provides for a circuit board which is equipped with integrated electronic circuits to be designed in such a way that it contains at least one interconnect frame according to the invention.
  • a particularly good use of space can be achieved in that it has a main circuit board and that the conductor track frame is arranged essentially perpendicular to the main circuit board.
  • the main circuit board contains a multiplicity of conductor track frames and that the conductor track frames are arranged essentially parallel and / or coplanar to one another.
  • the invention further relates to a method for producing a conductor track frame provided with at least one integrated electronic circuit, the conductor track frame being provided with at least one signal line and the integrated electronic circuit being applied such that there is between the integrated electronic circuit and the signal line at least in sections at least one electrically insulating plate and an electrically conductive, grounded plate.
  • the so-called crosstalk can be avoided by the signal lines being electrically shielded by two adjacent earth lines.
  • FIG. 1 shows a cross section through a conductor track frame perpendicular to the plane in which the integrated electronic circuits are located
  • FIG. 2 shows a cross section through the conductor track frame shown in FIG. 1,
  • FIG. 3 shows a cross section through the conductor track frame shown in FIGS. 1 and 2 through the sectional plane III-III,
  • Fig. 4 shows a cross section through an expedient arrangement of conductor tracks in a further conductor track frame according to the invention.
  • the integrated electronic circuits 4, 5 have thermal vias 6, only one of which is shown enlarged in the figure as an example.
  • the thermal vias 6 are contact holes that are connected to are filled with a thermally conductive material. They are produced in the same way as electrically conductive contact points 8, but are not electrically connected, but only serve to conduct heat.
  • the integrated electronic circuits are connected via the electrically conductive contact points 8 to signal lines 9, which end in a connecting element 7 of the conductor track frame 1.
  • connection element 7 In its edge region, the conductor track frame 1 opens into the connection element 7, which can be inserted into a circuit board arrangement or into another suitable slot.
  • connection of the signal lines 9 from the integrated electronic circuits 4, 5 to the connection element 7 takes place via the electrically conductive contact points 8, which are embedded in the insulation layers 2, 2 ⁇ , 3, 3 ⁇ .
  • interposer I Such an arrangement of insulation layers 2, 2 ⁇ , 3, 3 and signal lines 9 embedded in them is referred to as interposer I.
  • a connection via insulation layers 2, 2 ⁇ , 3, 3 ⁇ is particularly useful if the integrated electronic circuits 4, 5 are in the form of configured chips (existing packages).
  • a connection via a further, preferably branched, conductor strip frame, which is preferably attached to a further insulating plate, is particularly suitable for non-configured electronic circuits.
  • the signal lines 9 are laid, for example, in accordance with the embodiment shown in FIG. 2.
  • the signal lines 9 each extend from a signal connection S in the area of the connection element 7 to a contact point 8.
  • the signal connections S are each located between two basic potential connections G. All signal lines 9 preferably have the same length and are connected by suitable wiring (interposer routing). connected several times to the integrated electronic circuits 4, 5, so that a wide bus system is formed.
  • Heat distributors 12, 13 penetrate the entire area of the conductor track frame 1.
  • FIG. 3 shows a cross section through the conductor track frame shown in FIGS. 1 and 2 through the section plane III-III in the area of the signal connections S.
  • the signal connections S which open into the signal lines 9 at a higher level, not shown, are through two basic potential connections G and electrically shielded by the two electrically conductive, grounded base plates 14, 14.
  • the signal lines 9 are ⁇ by the base plates 14, 14 and two adjacent ground lines which are arranged in extension of the basic potential terminals G, electrically shields off.
  • the ground lines, which are arranged in the extension of the basic potential connections G preferably have the same lengths as the signal lines, so that the electrical shielding of the signal lines 9 is further improved.
  • FIG. 4 shows a cross section through an alternative, equally expedient, arrangement of conductor tracks in a further conductor track frame according to the invention.
  • signal lines 16, 18, 22, 24 starting from signal connections S are each connected by two adjacent earth lines 15, 17, 19, starting from a basic potential connection G. 23 electrically shielded.
  • the signal lines 16, 18, 22,, 24 open into contact points 26, 28, 32, 34.
  • the earth lines 15, 17, 19, 23 can laterally form a vertical line formed from the contact points 26, 28, 32, 34 in a common - Unite the line, preferably the earth line 15.
  • the four contact points 26, 28, 32, 34 form a contact matrix with corresponding further contact points, a contact matrix with 4 x 4 contact points being shown in the present case.
  • Thermal vias 40, 41, 42 enable good heat dissipation.
  • the arrangement of the conductor tracks shown is particularly advantageous because it combines good electrical shielding of the signal lines 16, 18, 22, 24 with high heat dissipation.
  • other arrangements of the signal lines, the ground lines, the contact points or the thermal vias are also used to design other embodiments of the interconnect frames according to the invention.

Landscapes

  • Structure Of Printed Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

The invention relates to a conductor frame (1) comprising at least one integrated electronic circuit (4, 5), whereby the integrated electronic circuit (4, 5) is situated in the area of a main surface of the conductor frame (1). The inventive conductor frame (1) also comprises at least one signal line (9), whereby at least one electrically insulating plate (2, 2', 3, 3') and one electrically conductive earthed plate (14, 14') are arranged at least in sections between the integrated electronic circuit (4, 5) and the signal line (9). The invention also relates to a method for producing the inventive conductor frame (1).

Description

Beschreibung * Description *

Leiterbahnrahmen, Platine mit Leiterbahnrahmen und Verfahren zur Herstellung eines LeiterbahnrahmensTrack frame, circuit board with track frame and method for manufacturing a track frame

Die Erfindung betrifft einen Leiterbahnrahmen, eine Platine mit wenigstens einem Leiterbahnrahmen sowie ein Verfahren zur Herstellung eines Leiterbahnrahmens.The invention relates to a conductor track frame, a circuit board with at least one conductor track frame and a method for producing a conductor track frame.

Im Stand der Technik sind vielfältige Einbauarten bekannt, bei denen integrierte elektronische Schaltungen in geeignete Gehäuse eingebaut werden. Während bei Logikbausteinen häufig aufwendig herzustellende Keramikgehäuse zum Einsatz kommen, besteht bei für die Massenfertigung bestimmten Speicherbau- steinen ein Bedarf an möglichst einfach herstellbaren Gehäusen. Es ist deshalb üblich, Speicherbausteine mit einfach herstellbaren Plastikgehäusen zu umgeben. Die Gehäuse haben die Aufgabe, die Speicherbausteine einerseits von Umwelteinflüssen - insbesondere Feuchtigkeit - hermetisch abzuriegeln, den elektrischen Kontakt nach außen herzustellen und die entstehende Wärme effektiv abzuführen.Various types of installation are known in the prior art, in which integrated electronic circuits are installed in suitable housings. While ceramic housings are often used to manufacture complex logic devices, there is a need for housings intended for mass production for housings that are as simple to manufacture as possible. It is therefore common to surround memory modules with plastic housings that are easy to manufacture. The purpose of the housings is to hermetically seal off the memory modules from environmental influences - especially moisture - on the one hand, to establish electrical contact with the outside and to effectively dissipate the heat generated.

Während bei konventionellen Speicherbausteinen die bekannten Gehäuse im wesentlichen allen im Praxiseinsatz auftretenden Anforderungen genügen, bestehen bei schnellen Speicherbausteinen (High Performance DRAMs) besonders hohe Anforderungen an die Abführung von thermischer Verlustleistung, die Gewährleistung der elektrischen Funktion sowie an hohe Anschlußzahlen (Pins, IOs) . Insbesondere müssen parasitäre Induktivitä- ten, Kapazitäten und Widerstände minimiert werden.While the known housings of conventional memory modules essentially meet all requirements that occur in practice, fast memory modules (high performance DRAMs) have particularly high requirements for the dissipation of thermal power loss, the guarantee of electrical function and high numbers of connections (pins, IOs). In particular, parasitic inductances, capacitances and resistances must be minimized.

Der Erfindung liegt die Aufgabe zugrunde, integrierte elektronische Schaltungen, insbesondere mit Speicherzellenanordnungen, mit einem möglichst geringen konstruktiven Aufwand in eine Leiterstruktur zu integrieren. Erfindungsgemäß wird diese Aufgabe gelöst durch einen Leiter-* bahnrahmen mit mindestens einer integrierten elektronischen Schaltung, wobei sich die integrierte elektronische Schaltung im Bereich einer Hauptfläche des Leiterbahnrahmens befindet, mit wenigstens einer Signalleitung, wobei sich zwischen der integrierten elektronischen Schaltung und der Signalleitung wenigstens abschnittsweise mindestens eine elektrisch isolierende Platte und eine elektrisch leitende, geerdete Platte befinden.The object of the invention is to integrate integrated electronic circuits, in particular with memory cell arrangements, into a conductor structure with the least possible design effort. According to the invention this object is achieved by a conductor * track frame with at least one integrated electronic circuit, wherein the integrated electronic circuit in the region of a main surface of the conductor frame is, with at least one signal line, wherein between the integrated electronic circuit and the signal line at least in sections at least an electrically insulating plate and an electrically conductive, grounded plate.

Die Signalleitungen verbinden Funktionselemente der integrierten elektronischen Schaltung mit einem oder mehreren geeigneten Anschlüssen. Durch den erfindungsgemäßen Aufbau des Leiterbahnrahmens werden parasitäre elektrische Parameter wie Induktivität, Kapazität und Widerstand des geometrischen Auf- baus minimiert. Auch bei integrierten elektronischen Schaltungen mit hohen Schaltgeschwindigkeiten, insbesondere bei schnellen Speicherbausteinen (High Performance DRAMs) , mit besonders hohen Anforderungen an die Gewährleistung der elek- trischen Funktion, wird eine sehr gute elektrische und signaltechnische Zuverlässigkeit erreicht.The signal lines connect functional elements of the integrated electronic circuit to one or more suitable connections. Parasitic electrical parameters such as inductance, capacitance and resistance of the geometrical structure are minimized by the structure of the conductor track frame according to the invention. Very good electrical and signaling reliability is achieved even with integrated electronic circuits with high switching speeds, in particular with fast memory chips (high performance DRAMs) with particularly high requirements for ensuring the electrical function.

Eine besonders gute Raumausnutzung läßt sich dadurch erzielen, daß die Signalleitung wenigstens abschnittsweise inner- halb des Leiterbahnrahmens verläuft.A particularly good use of space can be achieved if the signal line runs at least in sections within the conductor track frame.

Eine weitere Verbesserung der Raumausnutzung wird dadurch erreicht, daß sich auf zwei Hauptflächen des Leiterbahnrahmens jeweils mindestens eine integrierte elektronische Schaltung befindet.A further improvement in space utilization is achieved in that at least one integrated electronic circuit is located on each of the two main surfaces of the conductor track frame.

Eine weitere Erhöhung der elektrischen Zuverlässigkeit erfolgt dadurch, daß die Signalleitung wenigstens abschnittsweise parallel zu der integrierten elektronischen Schaltung verläuft. Um eine thermische Belastung der integrierten elektronischen Schaltung zu vermeiden, ist es zweckmäßig, daß der Leiterbahnrahmen mit wenigstens einem Wärmeverteiler versehen ist.The electrical reliability is further increased in that the signal line runs parallel to the integrated electronic circuit, at least in sections. In order to avoid thermal stress on the integrated electronic circuit, it is expedient for the conductor track frame to be provided with at least one heat distributor.

Hierdurch wird der Leiterbahnrahmen als Kühlfahne für die integrierten elektronischen Schaltungen eingesetzt.As a result, the conductor track frame is used as a cooling vane for the integrated electronic circuits.

Dies geschieht in besonders einfacher und zweckmäßiger Weise dadurch, daß sich der Wärmeverteiler in thermischem Kontakt mit einem den Leiterbahnrahmen wenigstens bereichsweise durchdringenden Wärmeleiter befindet.This is done in a particularly simple and expedient manner in that the heat distributor is in thermal contact with a heat conductor which at least partially penetrates the conductor track frame.

Die Erfindung sieht ferner vor, eine Platine, die mit integrierten elektronischen Schaltungen bestückt ist, so auszuge- stalten, daß sie wenigstens einen erfindungsgemäßen Leiterbahnrahmen enthält.The invention further provides for a circuit board which is equipped with integrated electronic circuits to be designed in such a way that it contains at least one interconnect frame according to the invention.

Eine besonders gute Raumausnutzung läßt sich dadurch erzielen, daß sie eine Hauptplatine aufweist und daß der Leiter- bahnrahmen im wesentlichen senkrecht zu der Hauptplatine angeordnet ist.A particularly good use of space can be achieved in that it has a main circuit board and that the conductor track frame is arranged essentially perpendicular to the main circuit board.

Ferner ist es zweckmäßig, daß die Hauptplatine eine Vielzahl von Leiterbahnrahmen enthält und daß die Leiterbahnrahmen im wesentlichen parallel und/oder koplanar zueinander angeordnet sind.Furthermore, it is expedient that the main circuit board contains a multiplicity of conductor track frames and that the conductor track frames are arranged essentially parallel and / or coplanar to one another.

Gegenstand der Erfindung ist ferner ein Verfahren zur Herstellung eines mit wenigstens einer integrierten elektroni- sehen Schaltung versehenen Leiterbahnrahmens, wobei der Leiterbahnrahmen mit wenigstens einer Signalleitung versehen wird und wobei die integrierte elektronische Schaltung so aufgebracht wird, daß sich zwischen der integrierten elektronischen Schaltung und der Signalleitung wenigstens ab- schnittsweise mindestens eine elektrisch isolierende Platte und eine elektrisch leitende, geerdete Platte befinden. Bei einer Vielzahl von Signalleitungen läßt sich ihre gegen- seitige Beeinflussung, der sogenannte crosstalk, dadurch vermeiden, daß die Signalleitungen jeweils durch zwei benachbarte Erdleitungen elektrisch abgeschirmt sind.The invention further relates to a method for producing a conductor track frame provided with at least one integrated electronic circuit, the conductor track frame being provided with at least one signal line and the integrated electronic circuit being applied such that there is between the integrated electronic circuit and the signal line at least in sections at least one electrically insulating plate and an electrically conductive, grounded plate. In the case of a large number of signal lines, their mutual influence, the so-called crosstalk, can be avoided by the signal lines being electrically shielded by two adjacent earth lines.

Weitere Vorteile, Besonderheiten und zweckmäßige Weiterbildungen der Erfindung ergeben sich aus den Unteransprüchen und der nachfolgenden Darstellung bevorzugter Ausführungsbeispiele der Erfindung anhand der Zeichnungen.Further advantages, special features and expedient developments of the invention result from the subclaims and the following illustration of preferred exemplary embodiments of the invention with reference to the drawings.

Von den Zeichnungen zeigt:From the drawings shows:

Fig. 1 einen Querschnitt durch einen Leiterbahnrahmen senkrecht zu der Ebene, in der sich die integrier- ten elektronischen Schaltungen befinden und1 shows a cross section through a conductor track frame perpendicular to the plane in which the integrated electronic circuits are located

Fig. 2 einen Querschnitt durch den in Fig. 1 dargestellten Leiterbahnrahmen,2 shows a cross section through the conductor track frame shown in FIG. 1,

Fig. 3 einen Querschnitt durch den in Fig. 1 und Fig. 2 dargestellten Leiterbahnrahmen durch die Schnittebene III-III,3 shows a cross section through the conductor track frame shown in FIGS. 1 and 2 through the sectional plane III-III,

Fig. 4 einen Querschnitt durch eine zweckmäßige Anordnung von Leiterbahnen in einem weiteren erfindungsgemäßen Leiterbahnrahmen.Fig. 4 shows a cross section through an expedient arrangement of conductor tracks in a further conductor track frame according to the invention.

Der in Fig. 1 dargestellte Leiterbahnrahmen 1 ist im Bereich seiner Hauptflächen über Isolationsschichten 2, 2 , 3, 3λ und elektrisch leitende, geerdete Grundplatten (ground-planes)1 in the area of its main surfaces via insulation layers 2, 2, 3, 3λ and electrically conductive, grounded base plates (ground planes)

14, 14 λ mit integrierten elektronischen Schaltungen 4, 5 verbunden.14, 14 λ connected to integrated electronic circuits 4, 5.

Die integrierten elektronischen Schaltungen 4, 5 weisen ther- mische Vias 6 auf, von denen in der Abbildung lediglich ein einziges beispielhaft vergrößert dargestellt ist. Bei den thermischen Vias 6 handelt es sich um Kontaktlöcher, die mit einem wärmeleitenden Material gefüllt sind. Sie werden auf die gleiche Weise wie elektrisch leitende Kontaktpunkte 8 hergestellt, sind jedoch nicht elektrisch angeschlossen, sondern dienen nur zur Wärmeleitung.The integrated electronic circuits 4, 5 have thermal vias 6, only one of which is shown enlarged in the figure as an example. The thermal vias 6 are contact holes that are connected to are filled with a thermally conductive material. They are produced in the same way as electrically conductive contact points 8, but are not electrically connected, but only serve to conduct heat.

Die integrierten elektronischen Schaltungen sind über die elektrisch leitenden Kontaktpunkte 8 mit Signalleitungen 9 verbunden, die in einem Anschlußelement 7 des Leiterbahnrahmens 1 enden.The integrated electronic circuits are connected via the electrically conductive contact points 8 to signal lines 9, which end in a connecting element 7 of the conductor track frame 1.

Der Leiterbahnrahmen 1 mündet in seinem Randbereich in das Anschlußelement 7, das in eine Leiterplattenanordnung oder in einen anderen geeigneten Steckplatz eingesteckt werden kann.In its edge region, the conductor track frame 1 opens into the connection element 7, which can be inserted into a circuit board arrangement or into another suitable slot.

Die Verbindung der Signalleitungen 9 von den integrierten elektronischen Schaltungen 4, 5 zu dem Anschlußelement 7 erfolgt über die elektrisch leitenden Kontaktpunkte 8, die in die Isolationsschichten 2, 2λ, 3, 3λ eingebettet sind.The connection of the signal lines 9 from the integrated electronic circuits 4, 5 to the connection element 7 takes place via the electrically conductive contact points 8, which are embedded in the insulation layers 2, 2 λ , 3, 3 λ .

Eine derartige Anordnung aus Isolationsschichten 2, 2Λ, 3, 3 und in diese eingebettete Signalleitungen 9 wird als Interpo- ser I bezeichnet.Such an arrangement of insulation layers 2, 2 Λ , 3, 3 and signal lines 9 embedded in them is referred to as interposer I.

Eine Verbindung über Isolationsschichten 2, 2Λ, 3, 3Λ ist be- sonders sinnvoll, wenn die integrierten elektronischen Schaltungen 4, 5 in der Form von konfigurierten Chips (existierende packages) vorliegen. Eine Verbindung über einen weiteren, vorzugsweise verästelte Leitungen aufweisenden, Leiterbahnrahmen, welcher vorzugsweise auf einer weiteren isolierenden Platte angebracht ist, eignet sich hingegen insbesondere bei nicht konfigurierten elektronischen Schaltungen.A connection via insulation layers 2, 2 Λ , 3, 3 Λ is particularly useful if the integrated electronic circuits 4, 5 are in the form of configured chips (existing packages). On the other hand, a connection via a further, preferably branched, conductor strip frame, which is preferably attached to a further insulating plate, is particularly suitable for non-configured electronic circuits.

Zur Erhöhung der Übersichtlichkeit sind die elektrischen An- Schlußleitungen in Fig. 1 nicht dargestellt. Eine Verlegung der Signalleitungen 9 erfolgt beispielhaft gemäß der in Fig. 2 dargestellten Ausführungsform. Die Signalleitungen 9 reichen jeweils von einem Signalanschluß S im Bereich des Anschlußelementes 7 bis zu einem Kontaktpunkt 8. Die Signalanschlüsse S befinden sich jeweils zwischen zwei Grundpotentialanschlüssen G. Vorzugsweise weisen alle Signalleitungen 9 eine gleiche Länge auf und sind durch eine geeignete Verdrahtung (Interposer Routing) mehrfach mit den integrierten elektronischen Schaltungen 4, 5 verbunden, so daß ein breites Bussystem gebildet wird.To increase clarity, the electrical connection lines are not shown in FIG. 1. The signal lines 9 are laid, for example, in accordance with the embodiment shown in FIG. 2. The signal lines 9 each extend from a signal connection S in the area of the connection element 7 to a contact point 8. The signal connections S are each located between two basic potential connections G. All signal lines 9 preferably have the same length and are connected by suitable wiring (interposer routing). connected several times to the integrated electronic circuits 4, 5, so that a wide bus system is formed.

Wärmeverteiler 12, 13 durchdringen den gesamten Bereich des Leiterbahnrahmens 1.Heat distributors 12, 13 penetrate the entire area of the conductor track frame 1.

Fig. 3 zeigt einen Querschnitt durch den in Fig. 1 und Fig. 2 dargestellten Leiterbahnrahmen durch die Schnittebene III-III im Bereich der Signalanschlüsse S. Die Signalanschlüsse S, die in einer höheren, nicht dargestellten Ebene in die Signalleitungen 9 münden, sind durch zwei Grundpotentialan- Schlüsse G und durch die beiden elektrisch leitenden, geerdeten Grundplatten 14, 14 elektrisch abgeschirmt. Auch die Signalleitungen 9 sind durch die Grundplatten 14, 14 λ sowie jeweils zwei benachbarte Erdleitungen, die in Verlängerung der Grundpotentialanschlüsse G angeordnet sind, elektrisch abge- schirmt. Die Erdleitungen, die in Verlängerung der Grundpotentialanschlüsse G angeordnet sind, weisen vorzugsweise ebenso wie die Signalleitungen gleiche Längen auf, so daß die elektrische Abschirmung der Signalleitungen 9 noch weiter verbessert wird.FIG. 3 shows a cross section through the conductor track frame shown in FIGS. 1 and 2 through the section plane III-III in the area of the signal connections S. The signal connections S, which open into the signal lines 9 at a higher level, not shown, are through two basic potential connections G and electrically shielded by the two electrically conductive, grounded base plates 14, 14. Also, the signal lines 9 are λ by the base plates 14, 14 and two adjacent ground lines which are arranged in extension of the basic potential terminals G, electrically shields off. The ground lines, which are arranged in the extension of the basic potential connections G, preferably have the same lengths as the signal lines, so that the electrical shielding of the signal lines 9 is further improved.

Fig. 4 zeigt einen Querschnitt durch eine alternative, gleichermaßen zweckmäßige, Anordnung von Leiterbahnen in einem weiteren erfindungsgemäßen Leiterbahnrahmen.4 shows a cross section through an alternative, equally expedient, arrangement of conductor tracks in a further conductor track frame according to the invention.

Hierbei sind von Signalanschlüssen S ausgehende Signalleitungen 16, 18, 22, 24 jeweils durch zwei benachbarte von einem Grundpotentialanschluß G ausgehenden Erdleitungen 15, 17, 19, 23 elektrisch abgeschirmt. Die Signalleitungen 16, 18, 22, ,24 münden in Kontaktpunkten 26, 28, 32, 34. Die Erdleitungen 15, 17, 19, 23 können sich seitlich einer aus den Kontaktpunkten 26, 28, 32, 34 gebildeten vertikalen Linie in einer gemeinsa- men Leitung, vorzugsweise der Erdleitung 15, vereinigen.Here, signal lines 16, 18, 22, 24 starting from signal connections S are each connected by two adjacent earth lines 15, 17, 19, starting from a basic potential connection G. 23 electrically shielded. The signal lines 16, 18, 22,, 24 open into contact points 26, 28, 32, 34. The earth lines 15, 17, 19, 23 can laterally form a vertical line formed from the contact points 26, 28, 32, 34 in a common - Unite the line, preferably the earth line 15.

Die vier Kontaktpunkte 26, 28, 32, 34 bilden mit entsprechenden weiteren Kontaktpunkten eine Kontaktmatrix, wobei im vorliegenden Fall eine Kontaktmatrix mit 4 x 4 Kontaktpunkten dargestellt ist.The four contact points 26, 28, 32, 34 form a contact matrix with corresponding further contact points, a contact matrix with 4 x 4 contact points being shown in the present case.

Thermische Vias 40, 41, 42 ermöglichen eine gute Wärmeableitung.Thermal vias 40, 41, 42 enable good heat dissipation.

Die dargestellte Anordnung der Leiterbahnen ist besonders vorteilhaft, weil sie eine gute elektrische Abschirmung der Signalleitungen 16, 18, 22, 24 mit einer hohen Wärmeabfuhr kombiniert. Jedoch sind auch andere Anordnungen der Signalleitungen, der Erdleitungen, der Kontaktpunkte oder der ther- mischen Vias zur Gestaltung von anderen Ausführungsformen erfindungsgemäßer Leiterbahnrahmen The arrangement of the conductor tracks shown is particularly advantageous because it combines good electrical shielding of the signal lines 16, 18, 22, 24 with high heat dissipation. However, other arrangements of the signal lines, the ground lines, the contact points or the thermal vias are also used to design other embodiments of the interconnect frames according to the invention

Claims

Patentansprüche claims 1. Leiterbahnrahmen (1)1. Conductor frame (1) - mit mindestens einer integrierten elektronischen Schaltung (4, 5),- With at least one integrated electronic circuit (4, 5), - wobei sich die integrierte elektronische Schaltung (4, 5) im Bereich einer Hauptfläche des Leiterbahnrahmens (1) befindet,the integrated electronic circuit (4, 5) is located in the area of a main surface of the conductor track frame (1), - mit wenigstens einer Signalleitung (9), - wobei sich zwischen der integrierten elektronischen Schaltung (4, 5) und der Signalleitung (9) wenigstens abschnittsweise mindestens eine elektrisch isolierende Platte (2, 2Λ, 3, 3Λ) und eine elektrisch leitende, geerdete Platte (14, 14 Λ) befinden.- With at least one signal line (9), - between the integrated electronic circuit (4, 5) and the signal line (9) at least in sections at least one electrically insulating plate (2, 2 Λ , 3, 3 Λ ) and an electrically conductive grounded plate (14, 14 Λ ). 2. Leiterbahnrahmen (1) nach Anspruch 1, d a d u r c h g e k e n n z e i c h n e t, daß die Signalleitung (9) wenigstens abschnittsweise innerhalb des Leiterbahnrahmens (1) verläuft.2. trace frame (1) according to claim 1, d a d u r c h g e k e n n z e i c h n e t that the signal line (9) extends at least in sections within the trace frame (1). 3. Leiterbahnrahmen (1) nach einem der Ansprüche 1 oder 2, d a d u r c h g e k e n n z e i c h n e t, daß sich auf zwei Hauptflächen des Leiterbahnrahmens (1) jeweils mindestens eine integrierte elektronische Schaltung (4, 5) befindet.3. interconnect frame (1) according to one of claims 1 or 2, d a d u r c h g e k e n n z e i c h n e t that at least one integrated electronic circuit (4, 5) is located on two main surfaces of the interconnect frame (1). 4. Leiterbahnrahmen (1) nach einem der Ansprüche 1 bis 3, d a d u r c h g e k e n n z e i c h n e t, daß die Signalleitung (9) wenigstens abschnittsweise parallel zu der integrierten elektronischen Schaltung (4, 5) verläuft.4. trace frame (1) according to one of claims 1 to 3, d a d u r c h g e k e n n z e i c h n e t that the signal line (9) at least in sections runs parallel to the integrated electronic circuit (4, 5). 5. Leiterbahnrahmen (1) nach einem der Ansprüche 1 bis 4, d a d u r c h g e k e n n z e i c h n e t, daß die Signalleitung in einer Wegstrecke, die von dem Anschlußelement (7) bis zu einem Kontaktpunkt (8) in einer der integrierten elektronischen Schaltungen (4, 5) führt, parallel zu einer durch die integrierten elektronischen ^ Schaltungen (4, 5) definierten Ebene verläuft.5. trace frame (1) according to any one of claims 1 to 4, characterized in that the signal line in a path leading from the connecting element (7) to a contact point (8) in one of the integrated electronic circuits (4, 5), runs parallel to a plane defined by the integrated electronic circuits (4, 5). 6. Leiterbahnrahmen (1) nach einem der Ansprüche 1 bis 5, d a d u r c h g e k e n n z e i c h n e t, daß wenigstens eine der integrierten elektronischen Schaltungen (4, 5) eine Speicherzellenanordnung enthält.6. interconnect frame (1) according to one of claims 1 to 5, d a d u r c h g e k e n n z e i c h n e t that at least one of the integrated electronic circuits (4, 5) contains a memory cell arrangement. 7. Leiterbahnrahmen (1) nach einem der Ansprüche 1 bis 6, d a d u r c h g e k e n n z e i c h n e t, daß der Leiterbahnrahmen (1) mit wenigstens einem Wärmeverteiler (12, 13) versehen ist.7. trace frame (1) according to any one of claims 1 to 6, d a d u r c h g e k e n n z e i c h n e t that the trace frame (1) is provided with at least one heat spreader (12, 13). 8. Leiterbahnrahmen (1) nach Anspruch 7, d a d u r c h g e k e n n z e i c h n e t, daß der Wärmeverteiler (12, 13) wenigstens bereichsweise einen den Leiterbahnrahmen (1) durchdringenden Wärmeleiter enthält.8. trace frame (1) according to claim 7, d a d u r c h g e k e n n e e c h n e t that the heat spreader (12, 13) at least partially contains a conductor track (1) penetrating heat conductor. 9. Leiterbahnrahmen (1) nach einem der Ansprüche 1 bis 8, d a d u r c h g e k e n n z e i c h n e t, daß er eine Vielzahl von Signalleitungen (9; 16, 18, 22, 24) enthält, die jeweils durch zwei benachbarte Erdleitungen (15, 17, 19, 23) elektrisch abgeschirmt sind.9. trace frame (1) according to any one of claims 1 to 8, characterized in that it contains a plurality of signal lines (9; 16, 18, 22, 24), each through two adjacent earth lines (15, 17, 19, 23) are electrically shielded. 10. Leiterbahnrahmen (1) nach einem der Ansprüche 1 bis 9, d a d u r c h g e k e n n z e i c h n e t, daß er in wenigstens einem seiner Randbereiche ein Anschlußelement (7) enthält.10. trace frame (1) according to one of claims 1 to 9, d a d u r c h g e k e n n z e i c h n e t that it contains a connection element (7) in at least one of its edge regions. 11. Platine, die mit integrierten elektronischen Schaltungen (4, 5) bestückt ist, d a d u r c h g e k e n n z e i c h n e t, daß sie wenigstens einen Leiterbahnrahmen (1) nach einem der Ansprüche 1 bis 9 enthält. 11. Board, which is equipped with integrated electronic circuits (4, 5), characterized in that it contains at least one interconnect frame (1) according to one of claims 1 to 9. 12. Platine nach Anspruch 11, d a d u r c h ^ g e k e n n z e i c h n e t, daß sie eine Hauptplatine aufweist und daß der Leiterbahnrahmen (1) im wesentlichen senkrecht zu der Hauptplatine angeordnet ist.12. The circuit board of claim 11, d a d u r c h ^ g e k e n n z e i c h n e t that it has a motherboard and that the conductor track frame (1) is arranged substantially perpendicular to the motherboard. 13. Platine nach Anspruch 12, d a d u r c h g e k e n n z e i c h n e t, daß die Hauptplatine eine Vielzahl von Leiterbahnrahmen (1) enthält und daß die Leiterbahnrahmen (1) im wesentlichen parallel und/oder koplanar zueinander angeordnet sind.13. The circuit board according to claim 12, d a d u r c h g e k e n n z e i c h n e t that the main board contains a plurality of interconnect frames (1) and that the interconnect frames (1) are arranged substantially parallel and / or coplanar with each other. 14. Verfahren zur Herstellung eines mit wenigstens einer integrierten elektronischen Schaltung (4, 5) versehenen Leiterbahnrahmens (1), - wobei der Leiterbahnrahmen (1) mit wenigstens einer Signalleitung (9) versehen wird und14. A method for producing a conductor track frame (1) provided with at least one integrated electronic circuit (4, 5), - wherein the conductor track frame (1) is provided with at least one signal line (9) and - wobei die integrierte elektronische Schaltung (4, 5) so aufgebracht wird, daß sich zwischen der integrierten elektronischen Schaltung (4, 5) und der Signalleitung (9) wenigstens abschnittsweise mindestens eine elektrisch isolierende Platte (2, 2 3, 3λ) und eine elektrisch leitende, geerdete Platte (14, 14Λ) befinden. - The integrated electronic circuit (4, 5) is applied so that between the integrated electronic circuit (4, 5) and the signal line (9) at least in sections at least one electrically insulating plate (2, 2 3, 3 λ ) and an electrically conductive, grounded plate (14, 14 Λ ).
EP99945911A 1998-07-28 1999-07-05 Conductor frame, printed circuit board with a conductor frame and a method for producing a conductor frame Withdrawn EP1104584A1 (en)

Applications Claiming Priority (3)

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DE19833930 1998-07-28
DE19833930 1998-07-28
PCT/DE1999/002072 WO2000007242A1 (en) 1998-07-28 1999-07-05 Conductor frame, printed circuit board with a conductor frame and a method for producing a conductor frame

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