EP1095461A1 - Segmentation mechanism for a block encoder - Google Patents

Segmentation mechanism for a block encoder

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Publication number
EP1095461A1
EP1095461A1 EP00918918A EP00918918A EP1095461A1 EP 1095461 A1 EP1095461 A1 EP 1095461A1 EP 00918918 A EP00918918 A EP 00918918A EP 00918918 A EP00918918 A EP 00918918A EP 1095461 A1 EP1095461 A1 EP 1095461A1
Authority
EP
European Patent Office
Prior art keywords
block
input data
segments
idb
data block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP00918918A
Other languages
German (de)
French (fr)
Other versions
EP1095461B1 (en
Inventor
Esko Nieminen
Lauri Pirttiaho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Solutions and Networks Oy
Original Assignee
Nokia Networks Oy
Nokia Oyj
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Networks Oy, Nokia Oyj filed Critical Nokia Networks Oy
Priority to EP10011964A priority Critical patent/EP2323266A1/en
Publication of EP1095461A1 publication Critical patent/EP1095461A1/en
Application granted granted Critical
Publication of EP1095461B1 publication Critical patent/EP1095461B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H04L1/0043—Realisations of complexity reduction techniques, e.g. use of look-up tables
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H04L1/0066—Parallel concatenated codes

Definitions

  • the invention relates to methods and equipment for block encoders.
  • block encoders are frequently used for error correction.
  • An example of a block encoder is a so-called turbo (en)coder, as disclosed in reference 1.
  • Figure 1 is a block chart of a turbo encoder TE which is connected to a corresponding turbo decoder TD via a (transmission) channel.
  • a typical turbo encoder conveys the original information directly to the channel. These bits are called systematic bits. Additionally, the turbo encoder adds redundancy (parity) with simple encoders 1 and 2, the latter of which is preceded by an interleaver P, which permutes the bits of the original information.
  • parity redundancy
  • block encoders process one or more data blocks at a time.
  • An input data block whose size exceeds the block size of the block encoder must be divided into smaller segments such that no segment is larger than the block size of the block encoder. This is why block encoders are particularly suitable for applications with a fixed input block size.
  • a problem with block encoders is that they do not easily lend themselves to applications having a variable (dynamic) input block size. In other words, what to do with the last few segments of the input data block, remains an open question.
  • An object of the invention is to provide a mechanism for using block encoders with applications having a variable (dynamic) input block size.
  • the mechanism should be generic in order to be applicable to a wide variety of block encoders.
  • a straightforward solution would be to fill the segment of the input data block to the block size of the block encoder. Assuming a block size of 8 kilobits (kb), a 14-kb input data block would be divided into a first segment of 8 kb and second (last) segment with a net size of 6 kb and 2 kb of fill (padding) bits.
  • kb kilobits
  • a benefit of this straightforward solution is that the block encoder does not have to adapt to varying input block sizes.
  • the invention is based on the idea that for an input data block whose size exceeds the block size of the block encoder:
  • the input data block is divided into segments of approximately equal size such that no segment is larger than the block size of the block en- coder.
  • the input data block is divided into the least possible number of segments.
  • the segments are as large as possible.
  • the input data block is di- vided into 2 ⁇ segments where n is a positive integer.
  • the input data block or the last segment is padded with a few fill bits until the length of the last segment equals that of the remaining segments.
  • the last segment is not padded to the full block size of the block encoder (unless the remaining segments happen to be of that size too).
  • Figure 1 is a block chart of a turbo encoder
  • Figure 2 illustrates dividing an input data block to a number of segments for the turbo encoder.
  • turbo encoder and the corresponding decoder
  • a reasonable value for the length of the coding block is 8192 bits including the user data, a possible error detection field (CRC) and the termination.
  • CRC error detection field
  • R DATA (bits per second) the user data rate of the service
  • W EXTRA the number of other bits added to the original user data (CRC etc.)
  • L CB max length of the coding block.
  • N s can be calculated from:
  • N s round_up((R DATA * T DELAY + 7 ⁇ ) / (L CB - ⁇ / TAIL )) [3]
  • ⁇ / EXTRA extra data to be appended to the user data before encoding (bits)
  • ⁇ / TAIL number of tail bits to be appended to the encoding blocks
  • N s round_up((R DATA * 7 " DELAY + N ⁇ ) I (L CB - ⁇ / TAIL ))
  • ⁇ / TB round_up((R DATA * 7 " DELAY + ⁇ / EXTRA ) / ⁇ / s ) + ⁇ / TAIL
  • algorithm B all input segments to the turbo encoder will be of equal size.
  • T DELAY encoding user data block length (seconds)
  • W EXTRA extra data t0 be appended to the user data before encoding (bits)
  • A number of tail bits to be appended to the encoding blocks
  • N s number of segments
  • ⁇ / TB number of bits in the turbo encoder input blocks
  • LL number of fill bits (e.g. zero) in the last turbo encoder input block
  • the length of input segment to the turbo encoder is maximised by choosing the smallest possible number of segments N s . In some cases it may be preferable to use a number of segments N s which is a power of 2, but this will shorten the input segments to the turbo encoder.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Analogue/Digital Conversion (AREA)
  • Transmission And Conversion Of Sensor Element Output (AREA)
  • Character Spaces And Line Spaces In Printers (AREA)
  • Image Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

A method for encoding an input data block (IDB) with a block encoder (TE). The block encoder is capable of processing consecutive coding blocks (CB) whose size has an upper limit (LCB) which is smaller than the size of the input data block (IDB). The method comprises: (1) determining the length of the input data block (IDB) before encoding any of its data with the block encoder (TE); (2) dividing the input data block (IDB) to a plurality of segments (S1 ... SN) wherein all segments are of substantially equal size and no segment is larger than the upper limit (LCB); and (3) processing each segment (S1 ... SN) with the block encoder (TE). If the last segment (SN) is shorter than the remaining segments (S1, S2...), fill bits (NFILL) can be added to the last segment (SN) such that its length equals that of the remaining segments (S1, S2...).

Description

Segmentation mechanism for a block encoder
Background of the invention
The invention relates to methods and equipment for block encoders. As is well known, block encoders are frequently used for error correction. An example of a block encoder is a so-called turbo (en)coder, as disclosed in reference 1.
Figure 1 is a block chart of a turbo encoder TE which is connected to a corresponding turbo decoder TD via a (transmission) channel. A typical turbo encoder conveys the original information directly to the channel. These bits are called systematic bits. Additionally, the turbo encoder adds redundancy (parity) with simple encoders 1 and 2, the latter of which is preceded by an interleaver P, which permutes the bits of the original information. However, details of the block encoder are not relevant for understanding the invention, and reference is made to relevant literature. Unlike streaming encoders, block encoders process one or more data blocks at a time. An input data block whose size exceeds the block size of the block encoder must be divided into smaller segments such that no segment is larger than the block size of the block encoder. This is why block encoders are particularly suitable for applications with a fixed input block size. A problem with block encoders is that they do not easily lend themselves to applications having a variable (dynamic) input block size. In other words, what to do with the last few segments of the input data block, remains an open question.
Disclosure of the invention An object of the invention is to provide a mechanism for using block encoders with applications having a variable (dynamic) input block size. The mechanism should be generic in order to be applicable to a wide variety of block encoders.
This object is achieved with a method and equipment which are characterized by what is disclosed in the attached independent claims. Preferred embodiments of the invention are disclosed in the attached dependent claims.
A straightforward solution would be to fill the segment of the input data block to the block size of the block encoder. Assuming a block size of 8 kilobits (kb), a 14-kb input data block would be divided into a first segment of 8 kb and second (last) segment with a net size of 6 kb and 2 kb of fill (padding) bits. A benefit of this straightforward solution is that the block encoder does not have to adapt to varying input block sizes.
The invention is based on the idea that for an input data block whose size exceeds the block size of the block encoder:
1) before coding is started, the size of the input data block is determined; and
2) the input data block is divided into segments of approximately equal size such that no segment is larger than the block size of the block en- coder.
According to a preferred embodiment of the invention, the input data block is divided into the least possible number of segments. In other words, the segments are as large as possible.
According to an alternative embodiment, the input data block is di- vided into 2π segments where n is a positive integer.
According to yet another preferred embodiment of the invention, if dividing the input data block produces a last segment which is shorter than the remaining segments, the input data block or the last segment is padded with a few fill bits until the length of the last segment equals that of the remaining segments. However, in contrast to the straightforward solution, the last segment is not padded to the full block size of the block encoder (unless the remaining segments happen to be of that size too).
Brief description of the drawings
The invention will be described in more detail by means of preferred embodiments with reference to the appended drawing wherein: Figure 1 is a block chart of a turbo encoder; and Figure 2 illustrates dividing an input data block to a number of segments for the turbo encoder.
Detailed description of the invention Various embodiments of the invention will be described in connection with a turbo encoder, an example of which is disclosed in reference 1. However, details of the turbo encoder, or any other encoder, are not relevant for understanding the invention.
Implementing a turbo encoder (and the corresponding decoder) can be facilitated by limiting the length of the coding block. A reasonable value for the length of the coding block is 8192 bits including the user data, a possible error detection field (CRC) and the termination. The following naming conventions will be used:
WTAIL = tne number of termination bits 7" DELAY (seconds) = the length of the user data block
RDATA (bits per second) = the user data rate of the service
WEXTRA = the number of other bits added to the original user data (CRC etc.)
LCB = max length of the coding block.
The following condition has to be satisfied:
-^DATA * 7"DELAY + WEXT A + NτML < LCB [1]
If this condition is not satisfied the data to be encoded must be segmented so that each separate segment satisfies the condition. The number of segments Λ/s has to satisfy the condition:
round_up((f?DATA * TDELAY + / ^™ ) /Ns ) + Λ/TAIL < LCB [2]
It is preferable to choose the smallest Ns satisfying the inequality
[2]. Ns can be calculated from:
Ns = round_up((RDATA * TDELAY + 7^^) / (LCB - Λ/TAIL )) [3]
It may happen that all the encoding blocks do not end up being of the same length, i.e. that (RDATA * 7" DELAY + /Λ/s is not an integer. In such a case, there are at least two possible solutions, which will be called algorithms A and B. In algorithm A, the last segment is allowed to have a different length than the other segments. In algorithm B, a number Λ/FILL of fill bits (e.g. zeroes) are added to the input data so that ( ?DATA * TDELAY + Λ/EXTRA + /VF*LL) / Ns is the smallest possible integer. (Alternatively, the fill bits can be appended to the last segment after segmentation.)
Algorithm A
Algorithm A allows the last segment to be shorter than the other segments. Algorithm A uses the following Inputs: ^DATA = the user data rate (bits per second) 7" DELAY = encoding user data block length (seconds)
Λ/EXTRA = extra data to be appended to the user data before encoding (bits) Λ/TAIL = number of tail bits to be appended to the encoding blocks
Algorithm A produces the following outputs: Ns = number of segments
Λ/TB= number of bits in the turbo encoder input blocks except the last one Λ/LΛST TB = number of bits in the last turbo encoder input block
In algorithm A the following computations will be performed: Let Ns = round_up((RDATA * 7" DELAY + N^^) I (LCB - Λ/TAIL )) Let Λ/TB = round_up((RDATA * 7" DELAY + Λ/EXTRA) / Λ/s) + Λ/TAIL; Let Λ/REM = remainder of ( ?DATA * 7" DELAY + Λ/EXTRA) / Λ/s; If Λ/REM is not equal to zero then N^ ^ = Λ/TB - Λ/s + Λ/REM else N^j ^ = Λ/TB End.
If algorithm A is used, an adaptive turbo interleaver is needed since the last input segment to the turbo encoder may be shorter than the others. The number of systematic bits in the output of the encoder is
KDATA * TDELAY + Λ/EXTRA + Ns * Λ/TAIL [4]
Thus there are no additional bits other than the ones due to the termination of each segment.
Algorithm B
As shown in Figure 2, in algorithm B all input segments to the turbo encoder will be of equal size. The inputs to algorithm B are: f?DATA = the user data rate (bits per second) TDELAY = encoding user data block length (seconds) WEXTRA = extra data t0 be appended to the user data before encoding (bits) A = number of tail bits to be appended to the encoding blocks
The outputs from algorithm B are: Ns = number of segments
Λ/TB = number of bits in the turbo encoder input blocks Λ/F|LL = number of fill bits (e.g. zero) in the last turbo encoder input block
In algorithm B, the following computations will be performed: Let Ns = round_up((f?DATA * TDELAY + / ^™) / (LCB - Λ/TAIL )) Let Λ/TB = round_up ((RDATA * TDELAY + Λ/EXTRA) / Ns ) + Λ/TAIL Let Λ/REM = remainder of (RDATA * TDELAY + Λ/EXTRA) / Ns lf NRm ≠ 0 then insert Λ/F,LL = (Λ/s - NRm) zero bits to the end of the input data else Λ/F,LL = 0.
All input segments to the turbo encoder are of equal size and therefore the same turbo interleaver can be used for all segments. In this case the number of systematic bits over an entire channel interleaving block at the output of the turbo encoder is:
Ns * (round_up((f?DATA * TDELAY + Λ/EXTRA) / Λ/s) + Λ/TAIL) [5]
Thus there may be some additional bits other than the termination bits.
Modification to algorithms A and B
In the above algorithms A and B, the length of input segment to the turbo encoder is maximised by choosing the smallest possible number of segments Ns. In some cases it may be preferable to use a number of segments Ns which is a power of 2, but this will shorten the input segments to the turbo encoder. In this case, the first step of the above algorithms A and B would be replaced by the following three steps: Let ns = round_up ((RDMA * TDELAY + Λ/EXTRA) / (LCB - Λ/TAIL)); Let m = round_up (log2πs); Let Ns = 2m.
References:
1. C. Berrou, A. Glavieux, P. Thitimajshima: Near Shannon limit error- correcting coding and decoding: Turbo-codes, IEEE International Conference on Communications, ICC 1993, Geneva, Switzerland 23-26 May, 1993, Vol. 2, pp. 1064-1070. All references are incorporated herein by reference.

Claims

Claims
1. A method for encoding an input data block (IDB) with a block encoder (TE), said block encoder being capable of processing consecutive coding blocks (CB) whose size has an upper limit (LCB) which is smaller than the size of the input data block (IDB); characterized in that the method comprises the steps of: determining the length of the input data block (IDB) before encoding any of its data with said block encoder (TE); dividing the input data block (IDB) to a plurality of segments (S, ... SN) wherein all segments are of substantially equal size and no segment is larger than said upper limit (LCB); and processing each segment (S., ... SN) with said block encoder (TE).
2. A method according to claim ^characterized in that if the last segment (SN) is shorter than the remaining segments (S,, S2...), fill bits (NF|LL) are added to the last segment (SN) such that its length equals that of the remaining segments (S^ S2...).
3. A method according to claim ^characterized in that if the length of the input data block (IDB) is not an exact multiple of said upper limit (LCB), fill bits (NF,LL) are added to the input data block (IDB) such that its length is an exact multiple of said upper limit (LCB).
4. A method according to any one of the preceding claims, characterized in that the number of segments is 2n where n is a positive integer.
5. A segmentation device for segmenting an input data block (IDB) for processing with a block encoder (TE), said block encoder being capable of processing consecutive coding blocks (CB) whose size has an upper limit (LCB) which is smaller than the size of the input data block (IDB); characterized in that the segmentation device is arranged to: determine the length of the input data block (IDB) before applying any of its data to said block encoder (TE); divide the input data block (IDB) to a plurality of segments (S ... SN) wherein all segments are of substantially equal size and no segment is larger than said upper limit (LCB); and to apply each segment (S ... SN) to said block encoder (TE).
EP00918918A 1999-04-16 2000-04-14 Segmentation mechanism for a block encoder Expired - Lifetime EP1095461B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP10011964A EP2323266A1 (en) 1999-04-16 2000-04-14 Segmentation mechanism for a block encoder

Applications Claiming Priority (3)

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FI990863 1999-04-16
FI990863A FI106758B (en) 1999-04-16 1999-04-16 Segmentation mechanism for a block encoder
PCT/FI2000/000322 WO2000064057A1 (en) 1999-04-16 2000-04-14 Segmentation mechanism for a block encoder

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EP10011964.3 Division-Into 2010-09-30

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EP1095461B1 EP1095461B1 (en) 2011-12-14

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US (1) US6437711B1 (en)
EP (2) EP1095461B1 (en)
JP (1) JP2002542706A (en)
CN (2) CN100508404C (en)
AT (1) ATE537609T1 (en)
AU (1) AU3969700A (en)
BR (1) BRPI0006049B1 (en)
CA (1) CA2333109C (en)
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WO (1) WO2000064057A1 (en)

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BR0006049A (en) 2001-03-20
CN1574649A (en) 2005-02-02
CA2333109C (en) 2007-06-19
CA2333109A1 (en) 2000-10-26
CN100508404C (en) 2009-07-01
CN1191684C (en) 2005-03-02
EP2323266A1 (en) 2011-05-18
CN1300468A (en) 2001-06-20
FI990863L (en) 2000-10-17
AU3969700A (en) 2000-11-02
FI106758B (en) 2001-03-30
JP2002542706A (en) 2002-12-10
BRPI0006049B1 (en) 2016-10-04
WO2000064057A1 (en) 2000-10-26
ATE537609T1 (en) 2011-12-15

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