EP1049249A1 - Verstärker mit veränderbarer Verstärkung - Google Patents

Verstärker mit veränderbarer Verstärkung Download PDF

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Publication number
EP1049249A1
EP1049249A1 EP99303445A EP99303445A EP1049249A1 EP 1049249 A1 EP1049249 A1 EP 1049249A1 EP 99303445 A EP99303445 A EP 99303445A EP 99303445 A EP99303445 A EP 99303445A EP 1049249 A1 EP1049249 A1 EP 1049249A1
Authority
EP
European Patent Office
Prior art keywords
amplifier
gain
transistor
load
amplifying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP99303445A
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English (en)
French (fr)
Inventor
Nader Rohani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia of America Corp
Original Assignee
Lucent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lucent Technologies Inc filed Critical Lucent Technologies Inc
Priority to EP99303445A priority Critical patent/EP1049249A1/de
Priority to JP2000130597A priority patent/JP2000323947A/ja
Publication of EP1049249A1 publication Critical patent/EP1049249A1/de
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3211—Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0017—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0017—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier
    • H03G1/0023—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier in emitter-coupled or cascode amplifiers

Definitions

  • the automatic gain control is used to control the output power and the linearity of the input/output characteristic.
  • the gain control is used to allow the receiver to handle a wide dynamic range of signals.
  • the object is to process the radio frequency signal as substantially linear manner as possible to reduce signal distortion.
  • Mobile telephone systems employ an array of base stations situated in a region where mobile telephone units are operating. When a particular mobile unit approaches a particular base station, the received signal strength at the base progressively increases in strength. There is therefore a requirement for automatic gain control at the front end of the radio frequency amplifying chain of the base station in order to reduce the signal level travelling to successive amplifying stages of the chain. This prevents the signals operating in a non-linear region of each amplifying stage.
  • a solution to such problems would be to use a pin diode as a gain control element which would act as a variable resistor in front of an amplifier.
  • a variable gain amplifier comprising a common load, a first amplifying transistor driving said local and having an emitter/collector path connected in circuit series with a first relatively low impedance, a second amplifying transistor also driving said load and having an emitter/collector path connected in circuit series with a second relatively high impedance, input means supplying the base of each of said first and second amplifying transistors with an input signal to be amplified, and control means for varying the DC bias to the bases of said first and second transistor amplifiers to vary the ratio of the extent to which each transistor drives the load whereby to vary the performance of the amplifier progressively between a low gain high linearly and a high gain low linearly.
  • an automatic gain control amplifier having a relatively high minimum gain amplifying element and a relatively low maximum gain amplifying element both connected to receive a common input signal and both driving a common load, means for monitoring the amplitude of the output signal envelope appearing across the load to reduce the gain of the high gain element and to increase the gain of the low gain element when the said amplitude tends to increase and vice versa when the said amplitude tends to reduce, both in a sense to maintain the amplitude of the output signal envelope substantially constant.
  • an antenna 4 is coupled to earth via an impedance 6.
  • the junction between the antenna and the impedance 6 feeds an automatic gain control amplifier 8 which in turn feeds an RF (radio frequency) amplifier 10.
  • the output of the RF amplifier 10 is fed to a mixer 12 to select a signal of the desired frequency, which signal is in turn demodulated by a demodulator 14 to produce an audio frequency signal.
  • the audio frequency signal is amplified by an AF (audio frequency) amplifier 16 and transmitted down a land line 20 to a local telephone exchange 18.
  • the automatic gain control amplifier 8 (see Figure 3) employs a variable gain amplifier 22, the circuit of which is more clearly seen in Figure 2.
  • the amplifier 22 has an input 24 for receiving an input signal from the antenna 4 and an output for feeding the input of the RF amplifier 10.
  • the input signal is amplified in parallel by two transistors Q2 and Q6 which are matched to a common load RL via matching impedance C5, L3.
  • Coupling capacitors C1 and C2 couple the input signal to the bases of respective transistors Q2 and Q6.
  • the collector/ emitter path of the transistor Q2 is connected in circuit series with a relatively low value impedance L1 (in this case an inductance).
  • An impedance L3 couples the collector to transistor Q2 to a voltage bus 25. This allows a relatively large amplification of the input signal (when the received signal has a relatively low value) but this also means that the linearity of the amplified signal is also relatively low.
  • Impedance L4 and C6 are identical to C5 and L3 ensuring that the same impedance values are present at the collectors of Q3 and Q7 as with Q2 and Q6, hence maintaining circuit balance.
  • the collector or emitter path of the transistor Q6 is connected in circuit series with a relatively high value impedance L2 (in this case an inductor). This prevents a relatively high amplification of the input signal (especially when the received input signal has a relatively high value) but also has the desirable result that the linearity of the amplified signal is particularly high.
  • the base bias of the two transistors Q2 and Q6 is controlled to switch the transistor Q2 progressively ON and to switch transistor Q6 progressively OFF in response to a falling amplitude of the input signal envelope and to switch the transistor Q2 progressively OFF and the transistor Q6 progressively ON in response to a rising amplitude of the input signal envelope.
  • the transistor Q6 is turned fully ON while for minimum amplitude input signal the transistor Q2 is turned fully ON.
  • the DC basis for transistor Q2 is controlled by a constant current source I1 which is connected in circuit series with the collector/emitter path of a transistor Q1 to ground.
  • the DC bias for the transistor Q1 is provided by a resistor R1 coupled between the base and the collector of transistor Q1.
  • the DC bias for the transistor Q2 is provided by a resistor R2 coupled between the collector of transistor Q1 and the base of transistor Q2.
  • the arrangement is such that DC current flowing through the collector/emitter path of transistor Q2 essentially mirrors the current provided by the current generator I1. If greater current is required to flow through the impedance L1, one or more further transistors can be used in parallel with transistor Q2. Namely, the collector/emitter paths of such transistors are connected in parallel with the collector/emitter path of transistor Q2 and the bus of such further transistors are coupled to the base of Q2.
  • the DC bias for the transistor Q6 is provided by an arrangement similar to that used for transistor Q2.
  • a constant current source I3 is coupled by the emitter/collector path of transistor Q5 to ground and resistors R5 and R6 respectively connect the collector to transistor Q5 to the base of transistor Q5 and the base of transistor Q6.
  • mirror amplifiers based on transistors Q3 and Q7 are employed to share the impedances L1 and L2.
  • Coupling capacitors C2 and C4 couple the input signal to the bases of respective transistors Q3 and Q7.
  • the transistors Q3 and Q7 are coupled via a coupling capacitor C6 to a dummy load RD having the same value as the load RL.
  • the emitter/collector path of transistor Q3 connected in circuit series with the impedance L1.
  • the DC bias for the base of transistor Q3 is provided by a constant current device I2 which is connected to ground through the emitter/collector path of a transistor Q4 and bias resistors R3 and R4 respectively couple the collector of transistor Q4 to the bases of transistors Q3 and Q4.
  • the constant current sources I2 and I3 are operated in tandem so that the current generated by both is the same at any instant.
  • the emitter/collector path of the transistor Q7 is connected in circuit series with the impedance L2 and the DC bias for the transistor Q7 is provided by a constant current source I4.
  • the emitter/collector path of a transistor Q8 connects the constant current source to ground while bias resistors R7 and R8 connect the collector of transistor Q8 to the bases of respective transistors Q7 and Q8.
  • the current sources I4 and I1 are operated in tandem so that at any instant the current generated by each will remain the same.
  • L2 and L1 advantageously lie within a ratio of from 2:1 to 20:1.
  • Such an arrangement would allow a change in gain ratio from 4 dB to 12 dB.
  • variable gain circuit having constant input and output impedances and the resultant beneficial gain/linearly characteristic described
  • a comparator 30 has one input connected to the output 26 of the amplifier 22 and another output connected to a terminal 28 supplied by a reference voltage V ref representing a desired gain.
  • the output of the comparator 30 is fed to control the current sources I3 and I2 of the amplifier 22 directly and via an inverting amplifier 32 to control the current sources I1 and I4.
  • the current sources I1 and I4 are controlled in inverse ratio to the current sources I2 and I3.
  • variable gain amplifier When the variable gain amplifier is embedded in an integrated circuit further noise reduction in the circuit can be achieved by using two amplifiers each as herein described forming two halves of a split system.
  • variable gain amplifier being used in a radio receiver, it can also be used in a radio transmitter.
  • the use of the amplifier limited to the field of radio communication but, as will be appreciated, it can be used in any electrical environment which requires a variable gain giving the described gain/linearly characteristics.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Amplifiers (AREA)
EP99303445A 1999-04-30 1999-04-30 Verstärker mit veränderbarer Verstärkung Withdrawn EP1049249A1 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP99303445A EP1049249A1 (de) 1999-04-30 1999-04-30 Verstärker mit veränderbarer Verstärkung
JP2000130597A JP2000323947A (ja) 1999-04-30 2000-04-28 可変利得増幅器、自動利得制御増幅器、自動利得制御システムおよび無線受信機

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP99303445A EP1049249A1 (de) 1999-04-30 1999-04-30 Verstärker mit veränderbarer Verstärkung

Publications (1)

Publication Number Publication Date
EP1049249A1 true EP1049249A1 (de) 2000-11-02

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP99303445A Withdrawn EP1049249A1 (de) 1999-04-30 1999-04-30 Verstärker mit veränderbarer Verstärkung

Country Status (2)

Country Link
EP (1) EP1049249A1 (de)
JP (1) JP2000323947A (de)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7362172B2 (en) 2004-01-30 2008-04-22 Matsushita Electric Industrial Co., Ltd Variable gain circuit
CN112702024A (zh) * 2020-12-29 2021-04-23 武汉邮电科学研究院有限公司 一种高线性度的分布式光驱动电路
CN113839633A (zh) * 2021-09-03 2021-12-24 厦门优迅高速芯片有限公司 一种可调增益放大器

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7187804B2 (ja) 2018-04-05 2022-12-13 株式会社デンソー レーダ受信機

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3027071A1 (de) * 1980-07-17 1982-02-11 Philips Patentverwaltung Gmbh, 2000 Hamburg Transistorverstaerker mit zwei emittergekoppelten transisorpaaren
JPS58197906A (ja) * 1982-05-13 1983-11-17 Mitsubishi Electric Corp 利得切換え増幅回路
US4723110A (en) * 1986-02-20 1988-02-02 U.S. Philips Corporation Transconductance amplifier
EP0324273A2 (de) * 1988-01-13 1989-07-19 Tektronix, Inc. Breitbandig linearisierter emitterrückgekoppelter Verstärker
US5742203A (en) * 1994-10-28 1998-04-21 U.S. Philips Corporation Gain-controllable amplifier, receiver

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3027071A1 (de) * 1980-07-17 1982-02-11 Philips Patentverwaltung Gmbh, 2000 Hamburg Transistorverstaerker mit zwei emittergekoppelten transisorpaaren
JPS58197906A (ja) * 1982-05-13 1983-11-17 Mitsubishi Electric Corp 利得切換え増幅回路
US4723110A (en) * 1986-02-20 1988-02-02 U.S. Philips Corporation Transconductance amplifier
EP0324273A2 (de) * 1988-01-13 1989-07-19 Tektronix, Inc. Breitbandig linearisierter emitterrückgekoppelter Verstärker
US5742203A (en) * 1994-10-28 1998-04-21 U.S. Philips Corporation Gain-controllable amplifier, receiver

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
KIMURA K: "A BIPOLAR FOUR-QUADRANT ANALOG QUARTER-SQUARE MULTIPLIER CONSISTING OF UNBALANCED EMITTER-COUPLED PAIRS AND EXPANSIONS OF ITS INPUT RANGES", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 29, no. 1, 1 January 1994 (1994-01-01), pages 46 - 55, XP000441636, ISSN: 0018-9200 *
PATENT ABSTRACTS OF JAPAN vol. 008, no. 039 (E - 228) 21 February 1984 (1984-02-21) *

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7362172B2 (en) 2004-01-30 2008-04-22 Matsushita Electric Industrial Co., Ltd Variable gain circuit
CN112702024A (zh) * 2020-12-29 2021-04-23 武汉邮电科学研究院有限公司 一种高线性度的分布式光驱动电路
CN112702024B (zh) * 2020-12-29 2024-01-26 武汉邮电科学研究院有限公司 一种高线性度的分布式光驱动电路
CN113839633A (zh) * 2021-09-03 2021-12-24 厦门优迅高速芯片有限公司 一种可调增益放大器
CN113839633B (zh) * 2021-09-03 2024-01-23 厦门优迅高速芯片有限公司 一种可调增益放大器

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Publication number Publication date
JP2000323947A (ja) 2000-11-24

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