EP1047128A3 - Warped semiconductor device and method of manufacturing the same - Google Patents

Warped semiconductor device and method of manufacturing the same Download PDF

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Publication number
EP1047128A3
EP1047128A3 EP00303379A EP00303379A EP1047128A3 EP 1047128 A3 EP1047128 A3 EP 1047128A3 EP 00303379 A EP00303379 A EP 00303379A EP 00303379 A EP00303379 A EP 00303379A EP 1047128 A3 EP1047128 A3 EP 1047128A3
Authority
EP
European Patent Office
Prior art keywords
semiconductor element
element chip
semiconductor device
manufacturing
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP00303379A
Other languages
German (de)
French (fr)
Other versions
EP1047128A2 (en
EP1047128B1 (en
Inventor
Eiji Yanagawa
Akihiko Nakano
Toshinori Ohmi
Tadao Takeda
Hideyuki Unno
Hiroshi Ban
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Sharp Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Sharp Corp filed Critical Nippon Telegraph and Telephone Corp
Publication of EP1047128A2 publication Critical patent/EP1047128A2/en
Publication of EP1047128A3 publication Critical patent/EP1047128A3/en
Application granted granted Critical
Publication of EP1047128B1 publication Critical patent/EP1047128B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/57—Protection from inspection, reverse engineering or tampering
    • H01L23/573—Protection from inspection, reverse engineering or tampering using passive means
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Pressure Sensors (AREA)
  • Die Bonding (AREA)

Abstract

A semiconductor device in accordance with the present invention includes a semiconductor element chip pressed and secured on a distortion die-pad so that the semiconductor element chip, sealed inside a package, is held in a predetermined distorted state. The predetermined distorted state is preferably downward or upward warping. The semiconductor element chip operates normally in the distorted state, and does not operate normally when the semiconductor element chip is separated from the semiconductor device, and thereby released from the distortion and laid alone. This ensures that the semiconductor element chip is protected from circuit analysis.
EP00303379A 1999-04-23 2000-04-20 Warped semiconductor device and method of manufacturing the same Expired - Lifetime EP1047128B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP11710899A JP3515012B2 (en) 1999-04-23 1999-04-23 Semiconductor device and manufacturing method thereof
JP11710899 1999-04-23

Publications (3)

Publication Number Publication Date
EP1047128A2 EP1047128A2 (en) 2000-10-25
EP1047128A3 true EP1047128A3 (en) 2001-05-16
EP1047128B1 EP1047128B1 (en) 2006-11-22

Family

ID=14703618

Family Applications (1)

Application Number Title Priority Date Filing Date
EP00303379A Expired - Lifetime EP1047128B1 (en) 1999-04-23 2000-04-20 Warped semiconductor device and method of manufacturing the same

Country Status (5)

Country Link
US (1) US6472730B1 (en)
EP (1) EP1047128B1 (en)
JP (1) JP3515012B2 (en)
KR (1) KR100366932B1 (en)
DE (1) DE60031908T2 (en)

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DE10106836B4 (en) 2001-02-14 2009-01-22 Infineon Technologies Ag Integrated circuit arrangement of a flat substrate
US20060072302A1 (en) * 2004-10-01 2006-04-06 Chien Tseng L Electro-luminescent (EL) illuminated wall plate device with push-tighten frame means
DE102004007690B3 (en) * 2004-02-16 2005-10-13 Infineon Technologies Ag Integrated circuit arrangement
DE102004021633B4 (en) * 2004-05-03 2006-04-06 Infineon Technologies Ag Method for connecting a semiconductor chip to a chip carrier and arrangement with a semiconductor chip and a chip carrier
US11277010B2 (en) 2004-10-01 2022-03-15 Tseng-Lu Chien LED night light with edge-lit light guide
US9235747B2 (en) * 2008-11-27 2016-01-12 Apple Inc. Integrated leadframe and bezel structure and device formed from same
CN116779496B (en) * 2023-08-21 2023-12-26 成都汉芯国科集成技术有限公司 3D packaging system and packaging method suitable for heterogeneous integrated multiple chips

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EP0509567A2 (en) * 1991-03-28 1992-10-21 Koninklijke Philips Electronics N.V. Device with protection against access to secure information
EP0510434A2 (en) * 1991-04-26 1992-10-28 Hughes Aircraft Company Apparatus and method for inhibiting analysis of a secure circuit
WO1997036326A1 (en) * 1996-03-28 1997-10-02 Symbios,Inc. Integrated circuit protection device and method
EP0860882A2 (en) * 1997-02-24 1998-08-26 General Instrument Corporation Anti-tamper bond wire shield for an integrated circuit

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Publication number Priority date Publication date Assignee Title
JPS63237144A (en) * 1987-03-25 1988-10-03 Sega Enterp:Kk Semiconductor device with imitation preventing function
EP0509567A2 (en) * 1991-03-28 1992-10-21 Koninklijke Philips Electronics N.V. Device with protection against access to secure information
EP0510434A2 (en) * 1991-04-26 1992-10-28 Hughes Aircraft Company Apparatus and method for inhibiting analysis of a secure circuit
WO1997036326A1 (en) * 1996-03-28 1997-10-02 Symbios,Inc. Integrated circuit protection device and method
EP0860882A2 (en) * 1997-02-24 1998-08-26 General Instrument Corporation Anti-tamper bond wire shield for an integrated circuit

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* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 013, no. 040 (P - 820) 30 January 1989 (1989-01-30) *
PATENT ABSTRACTS OF JAPAN vol. 013, no. 195 (E - 754) 10 May 1989 (1989-05-10) *

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EP1047128A2 (en) 2000-10-25
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EP1047128B1 (en) 2006-11-22
KR100366932B1 (en) 2003-01-09
KR20010014803A (en) 2001-02-26
US6472730B1 (en) 2002-10-29
JP2000307050A (en) 2000-11-02
JP3515012B2 (en) 2004-04-05

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