EP1004072B1 - Systeme de programmation graphique emboite - Google Patents

Systeme de programmation graphique emboite Download PDF

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Publication number
EP1004072B1
EP1004072B1 EP98924969A EP98924969A EP1004072B1 EP 1004072 B1 EP1004072 B1 EP 1004072B1 EP 98924969 A EP98924969 A EP 98924969A EP 98924969 A EP98924969 A EP 98924969A EP 1004072 B1 EP1004072 B1 EP 1004072B1
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European Patent Office
Prior art keywords
graphical program
graphical
host computer
embedded
compiled
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German (de)
English (en)
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EP1004072A1 (fr
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Jeffrey L. Kodosky
Darshan Shah
Samson Dekey
Steven W. Rogers
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National Instruments Corp
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National Instruments Corp
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/30—Creation or generation of source code
    • G06F8/34—Graphical or visual programming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44505—Configuring for program initiating, e.g. using registry, configuration files

Definitions

  • the present invention relates to graphical programming, and in particular to a system and method for executing a portion or all of a graphical program in an embedded system, wherein a user interface portion of the graphical programming system optionally also executes on the host CPU.
  • high level text-based programming languages have been used by programmers in writing applications programs.
  • Many different high level programming languages exist including BASIC, C, FORTRAN, Pascal, COBOL, ADA, APL, etc.
  • Programs written in these high level languages are translated to the machine language level by translators known as compilers.
  • the high level programming languages in this level, as well as the assembly language level, are referred to as text-based programming environments.
  • Examples of fields in which computer systems are employed to model and/or control physical systems are the fields of instrumentation, process control, and industrial automation.
  • Computer modeling or control of devices such as instruments or industrial automation hardware has become increasingly desirable in view of the increasing complexity and variety of instruments and devices available for use.
  • computer programs used to control such systems had to be written in conventional text-based programming languages such as, for example, assembly language, C, FORTRAN, BASIC, or Pascal.
  • U.S. Patent Number 4,901,221 to Kodosky et al discloses a graphical system and method for modeling a process, i.e. a graphical programming environment which enables a user to easily and intuitively model a process.
  • the graphical programming environment disclosed in Kodosky et al can be considered the highest and most intuitive way in which to interact with a computer.
  • a graphically based programming environment can be represented at level above text-based high level programming languages such as C. Pascal, etc.
  • the method disclosed in Kodosky et al allows a user to construct a diagram using a block diagram editor, such that the diagram created graphically displays a procedure or method for accomplishing a certain result. such as manipulating one or more input variables to produce one or more output variables.
  • Kodosky et al teaches a graphical programming environment wherein a user places or manipulates icons in a block diagram using a block diagram editor to create a data flow "program."
  • a graphical program for controlling or modeling devices such as instruments, processes or industrial automation hardware, is referred to as a virtual instrument (VI).
  • VI virtual instrument
  • a user preferably creates a front panel or user interface panel.
  • the front panel includes various front panel objects, such as controls or indicators that represent the respective input and output that will be used by the graphical program or VI, and may include other icons which represent devices being controlled.
  • the controls and indicators are created in the front panel, corresponding icons or terminals are automatically created in the block diagram by the block diagram editor.
  • the user can first place terminal icons in the block diagram which cause the display of corresponding front panel objects in the front panel. The user then chooses various functions that accomplish his desired result, connecting the corresponding function icons between the terminals of the respective controls and indicators.
  • the user creates a data flow program, referred to as a block diagram, representing the graphical data flow which accomplishes his desired function. This is done by wiring up the various function icons between the control icons and indicator icons. The manipulation and organization of icons in turn produces machine language that accomplishes the desired method or process as shown in the block diagram.
  • a user inputs data to a virtual instrument using front panel controls. This input data propagates through the data flow block diagram or graphical program and appears as changes on the output indicators.
  • the front panel can be analogized to the front panel of an instrument.
  • the front panel can be analogized to the MMI (Man Machine Interface) of a device. The user adjusts the controls on the front panel to affect the input and views the output on the respective indicators.
  • MMI Man Machine Interface
  • graphical programming has become a powerful tool available to programmers.
  • Graphical programming environments such as the National Instruments LabVIEW product have become very popular.
  • Tools such as LabVIEW have greatly increased the productivity of programmers, and increasing numbers of programmers are using graphical programming environments to develop their software applications.
  • graphical programming tools are being used for test and measurement, data acquisition, process control, man machine interface (MMI), and supervisory control and data acquisition (SCADA) applications, among others.
  • MMI man machine interface
  • SCADA supervisory control and data acquisition
  • US-A-4849880 discloses a virtual machine programming system.
  • the present invention as defined in the appended claims comprises a computer-based virtual instrumentation system, wherein graphical programs created using the computer system can be downloaded to an embedded system for execution in a real-time or deterministic manner.
  • the present invention thus provides a method for automatically generating an embedded application in response to a graphical program created by a user. This provides the user the ability to develop or define instrument functionality using graphical programming techniques, while enabling the resulting program to operate in an embedded real-time system.
  • the preferred embodiment of the invention comprises a general purpose host computer system which includes a CPU and memory, and an embedded system or device coupled to the host computer system which also includes a CPU and memory, referred to as an embedded CPU and embedded memory.
  • the embedded memory stores a real-time operating system kernel which provides basic OS services.
  • the embedded system also includes a graphical program execution engine, referred to as embedded Lab VIEW. which enables the embedded system to execute the graphical program.
  • the embedded system is an interface card or device such as an Intelligent DAQ card or VXI controller interface card coupled to (or plugged in to) the host computer.
  • the embedded memory further includes a shared memory portion used for bi-directional communication between the host computer and the embedded system.
  • the embedded system comprises an instrument or device connected to the computer, such as through a network connection. It is noted that the instrument or device comprising the embedded system can take any of various forms. as desired.
  • the host computer system includes a host graphical programming system, e.g., host LabVIEW, which is used to develop a graphical program.
  • the host LabVIEW also executes code to display the front panel of a graphical program whose block diagram is executing on the embedded system.
  • the host computer system also includes software according to the present invention which is operable to download software into the embedded system to configure or initialize the embedded system.
  • the embedded system has non-volatile storage media, and at power up the embedded system initializes and configures itself with a real time kernel and an embedded graphical programming system.
  • the embedded system does not have non-volatile boot media for storing an operating system and the embedded graphical programming system
  • the embedded system receives OS and programs from the host computer.
  • the embedded system receives it OS and programs from the host computer. Since the operating system and application programs typically reside in a non-volatile media, such as a hard drive, and a computer system typically 'boots' the operating system from the hard drive, its absence means that an alternative method of booting needs to present.
  • the embedded system executes the BIOS code in the read-only memory (ROM), as is typical in any computer system.
  • the BIOS code then executes a BIOS extension program present in memory which requests the operating system kernel from the host computer system. Therefore, the host computer first loads a kernel or basic operating system onto the embedded system. The host computer also transfers one or more other loader applications. As a result, an embedded graphical programming system and various configuration information are then loaded onto the embedded system.
  • the embedded graphical programming system is embedded LabVIEW.
  • Various software drivers are then loaded onto the embedded system. These components are loaded onto the embedded system using the shared memory and using a shared memory protocol.
  • the embedded system includes a kernel, an embedded graphical programming execution system, e.g., embedded LabVIEW, and any necessary device drivers.
  • the user After the system has been configured, the user first creates a graphical program on the host computer system using the host LabVIEW, which includes arranging on the screen a plurality of nodes comprising the graphical program.
  • the host computer then compiles the graphical program to produce a compiled graphical program, depending on the selected target.
  • the user also preferably selects the execution engine for the graphical program, i.e. whether the program will run on the host computer or on the embedded system. If the user has selected the execution engine in the embedded system, the host computer downloads the relevant part of the compiled graphical program to the device through a front panel protocol.
  • the device then executes the compiled graphical program. This includes executing the execution engine to execute the compiled graphical program, as well as executing the OS kernel for basic OS services. Due to the use of a real-time operating system and reduced OS overhead, the embedded system or device executes the compiled graphical program in a deterministic manner.
  • the graphical program includes a graphical diagram and a graphical front panel.
  • the graphical front panel is usable for providing/displaying input/output to/from the compiled graphical program executing on the device.
  • the block diagram portion executes in the embedded system
  • the host CPU executes front panel display code to display on the screen the graphical front panel of the graphical program.
  • the embedded system and the host computer exchange data using a front panel protocol to enable this operation.
  • the output data is transferred to the host computer system, and the host computer system displays the output data in the graphical front panel of the graphical program.
  • the host computer system displays the input data in the graphical front panel of the graphical program and transfers the input data to the embedded system so that the device can utilize the user input during execution of the compiled graphical program.
  • the present invention also includes improved debugging support for graphical programs executing on the embedded system.
  • the user can debug a graphical program executing on embedded LabVIEW utilizing the block diagram of the graphical program displayed on the display screen by the host LabVIEW.
  • the host LabVIEW and embedded LabVIEW exchange information to enable the user to view debugging information, such as execution highlighting and probe information, on the display screen for a graphical program executing on the embedded system. This provides greatly simplified debugging for embedded graphical programs.
  • the host graphical programming system or host LabVIEW thus provides the user interface for graphical programs executing on the embedded system.
  • the host LabVIEW thus essentially acts as the front panel "browser" for embedded LabVIEW applications.
  • the host LabVIEW can also act as an independent application communicating with embedded LabVIEW through the shared memory and/or network.
  • the host graphical programming system further provides a seamless environment in which the user can develop an embedded application using high level graphical programming techniques.
  • the system 100 comprises a host computer 102 which connects to one or more instruments.
  • the host computer 102 comprises a CPU, a display screen, memory, and one or more input devices such as a mouse or keyboard as shown.
  • the computer 102 connects through the one or more instruments to analyze, measure or control a unit under test (UUT) or process 130.
  • UUT unit under test
  • the one or more instruments may include a GPIB instrument 112, a data acquisition board 114, and/or a VXI instrument 116.
  • the GPIB instrument 112 is coupled to the computer 102 via a GPIB interface card 122 provided by the computer 102.
  • the data acquisition board 114 is coupled to the computer 102, and preferably interfaces through signal conditioning circuitry 124 to the UUT.
  • the signal conditioning circuitry 124 preferably comprises an SCXI (Signal Conditioning eXtensions for Instrumentation) chassis comprising one or more SCXI modules 126.
  • SCXI Signal Conditioning eXtensions for Instrumentation
  • Both the GPIB card 122 and the DAQ card 114 are typically plugged in to an I/O slot in the computer 102, such as a PCI bus slot, a PC Card slot.
  • the VXI instrument 116 is coupled to the computer 102 via a VXI bus, MXI bus, or other serial or parallel bus provided by the computer 102.
  • the computer 102 preferably includes VXI interface logic, such as a VXI, MXI or GPIB interface card (not shown) comprised in the computer.
  • a serial instrument (not shown) may also be coupled to the computer 102 through a serial port, such as an RS-232 port, USB (Universal Serial bus) or IEEE 1394 or 1394.2 bus, provided by the computer 102.
  • a serial port such as an RS-232 port, USB (Universal Serial bus) or IEEE 1394 or 1394.2 bus, provided by the computer 102.
  • an instrument will not be present of each interface type, and in fact many systems may only have one or more instruments of a single interface type. such as only GPIB instruments.
  • one or more of the devices connected to the computer 102 comprises an embedded system which includes an embedded CPU and memory according to the present invention.
  • the embedded system executes a real time kernel and a graphical program execution engine to enable execution of graphical programs in a real-time or deterministic manner.
  • one or more of the GPIB card 122, the DAQ card 114, or the VXI card comprise an embedded system according to the present invention.
  • one or more of the GPIB instrument 112, the VXI instrument 116, or the serial instrument comprise an embedded system according to the present invention.
  • the embedded system further comprises programmable hardware, such as an FPGA (field programmable gate array).
  • the instruments are coupled to the unit under test (UUT) or process 130, or are coupled to receive field signals, typically generated by transducers.
  • the system 100 may be used in a data acquisition and control application, in a test and measurement application, a process control application, or a man-machine interface application.
  • the industrial automation system 140 is similar to the instrumentation or test and measurement system 100 shown in Figure 1. Elements which are similar or identical to elements in Figure 1 have the same reference numerals for convenience.
  • the system 140 comprises a computer 102 which connects to one or more devices or instruments.
  • the computer 102 comprises a CPU, a display screen, memory, and one or more input devices such as a mouse or keyboard as shown.
  • the computer 102 connects through the one or more devices to a process or device 160 to perform an automation function, such as MMI (Man Machine Interface), SCADA (Supervisory Control and Data Acquisition). portable or distributed acquisition, advanced analysis, or control.
  • MMI Man Machine Interface
  • SCADA Supervisory Control and Data Acquisition
  • the one or more devices may include a data acquisition board 114, a serial instrument 142, a PLC (Programmable Logic Controller) 144, or a fieldbus network card 156.
  • the data acquisition board 114 is coupled to or comprised in the computer 102, and preferably interfaces through signal conditioning circuitry 124 to the process 160.
  • the signal conditioning circuitry 124 preferably comprises an SCXI (Signal Conditioning extensions for Instrumentation) chassis comprising one or more SCXI modules 126.
  • the serial instrument 142 is coupled to the computer 102 through a serial interface card 152, or through a serial port, such as an RS-232 port, provided by the computer 102.
  • the PLC 144 couples to the computer 102 through a serial port, Ethernet port, or a proprietary interface.
  • the fieldbus interface card 156 is preferably comprised in the computer 102 and interfaces through a fieldbus network to one or more fieldbus devices, such as valve 146.
  • Each of the DAQ card 114, the serial card 152 and the fieldbus card 156 are typically plugged in to an I/O slot in the computer 102 as described above. However, these cards 114, 152 and 156 are shown external to computer 102 for illustrative purposes. In typical industrial automation systems a device will not be present of each interface type, and in fact many systems may only have one or more devices of a single interface type, such as only PLCs. The devices are coupled to the device or process 160.
  • one or more of the devices connected to the computer 102 comprise an embedded system according to the preferred embodiment which includes an embedded CPU and memory.
  • the embedded system executes a real time kernel and a graphical program execution engine to enable execution of graphical programs in a real-time or deterministic manner.
  • the embedded system further includes programmable hardware, such as an FPGA (field programmable gate array).
  • the host computer 102 preferably includes a host memory media, such as a magnetic media, CD-ROM, or floppy disks 104.
  • the memory media preferably stores a host graphical programming development system for developing and executing graphical programs.
  • the memory media also stores computer programs according to the present invention which are executable to download a graphical program for execution on an embedded system coupled to the computer system.
  • the host CPU executing code and data from the host memory thus comprises a means for downloading graphical code into an embedded implementation according to the steps described below.
  • the embedded system comprised in the host computer 102 preferably includes a memory media which stores a real-time kernel providing basic OS services, as well as a graphical programming system run-time engine for real-time execution of compiled graphical programs.
  • the embedded CPU executing code and data from the embedded memory thus comprises a means for executing graphical code in an embedded real-time system according to the steps described below.
  • the instruments or devices in Figures 1 and 1A are controlled by graphical software programs, optionally a portion of which execute on the CPU of the computer 102, and at least a portion of which are downloaded to the embedded system for execution.
  • the graphical software programs which perform data acquisition, analysis and/or presentation, e.g., for instrumentation control or industrial antomation, are referred to as virtual instruments.
  • the preferred embodiment utilizes the LabVIEW or BridgeVIEW graphical programming systems, hereafter collectively referred to as LabVIEW, available from National Instruments.
  • LabVIEW is intended to include graphical programming systems which include G programming functionality, i.e., which include at least a portion of LabVIEW graphical programming functionality, including the BridgeVIEW graphical programming system.
  • graphical programming system is intended to include any of various types of systems which are used to develop or create graphical code or graphical programs, including LabVIEW and Bridge VIEW from National Instruments, Visual Designer from Intelligent Instrumentation, Hewlett-Packard's VEE (Visual Engineering Environment), Snap-Master by HEM Data Corporation, DASYLab by DasyTec, and GFS DiaDem, among others.
  • the graphical programs and embedded system are involved with data acquisition/generation, analysis, and/or display, and for controlling or modeling instrumentation or industrial automation hardware
  • the preferred embodiment can be used to create embedded implementations of graphical programs for a plethora of applications and are not limited to instrumentation or industrial automation applications.
  • Figures 1 and 1a are exemplary only, and the preferred embodiment may be used in any of various types of systems.
  • the system and method of the preferred embodiment is operable for creating embedded implementations of graphical programs or graphical code for any of various types of applications, including general purpose software applications such as word processing, spreadsheets, network control, games, etc.
  • the computer 102 includes at least one central processing unit or CPU 160 which is coupled to a processor or host bus 162.
  • the CPU 160 may be any of various types, including an x86 processor, a PowerPC processor, a CPU from the Motorola family of processors, a CPU from the SPARC family of RISC processors, as well as others.
  • Main memory 166 is coupled to the host bus 162 by means of memory controller 164.
  • the main memory 166 stores a graphical programming system.
  • the main memory 166 also stores operating system software as well as the software for operation of the computer system, as well known to those skilled in the art.
  • the instrumentation control software will be discussed in more detail below.
  • the host bus 162 is coupled to an expansion or input/output bus 170 by means of a bus controller 168 or bus bridge logic.
  • the expansion bus 170 is preferably the PCI (Peripheral Component Interconnect) expansion bus, although other bus types can be used.
  • the expansion bus 170 includes slots for various devices such as the data acquisition board 114 (of Figure 1), a GPIB interface card 122 which provides a GPIB bus interface to the GPIB instrument 112 (of Figure 1), and a VXI or MXI bus card 186 coupled to the VXI chassis 116 for receiving VXI instruments.
  • the computer 102 further comprises a video display subsystem 180 and hard drive 182 coupled to the expansion bus 170.
  • One or more of the interface cards or devices coupled to the expansion bus such as the DAQ card 114, the GPIB interface card 122, the GPIB instrument 112, or the VXI or MXI bus card 186 comprises an embedded systern comprising an embedded CPU and embedded memory.
  • the embedded system is a stand-alone device, and may be coupled as a node to a network.
  • the host computer 102 is also connected as a node on the network.
  • the embedded system may take various configurations, as desired.
  • FIG. 3 a block diagram illustrating an interface card comprising an embedded system according to the preferred embodiment is shown. It is noted that Figure 3 is exemplary only, and an interface card or device comprising an embedded system according to the preferred embodiment may have various architectures or forms, as desired.
  • the interface card illustrated in Figure 3 is the DAQ interface card 114 shown in either of Figures 1, 1A, or 2. However, as noted above, the reconfigmable hardware may be included on any of the various devices shown in Figures 1 or 1A, or on other devices, as desired.
  • the interface card 114 includes an I/O connector 202 which is coupled for receiving signals.
  • the I/O connector 202 presents analog and/or digital connections for receiving/providing analog or digital signals.
  • the I/O connector 202 is adapted for coupling to SCXI conditioning logic 124 and 126, or is adapted to be coupled directly to a unit under test 130 or process 160.
  • the interface card 114 also dedicated logic 204 for performing a specific function.
  • the interface card 114 includes data acquisition (DAQ) logic 204.
  • the data acquisition logic 204 comprises analog to digital (A/D) converters, digital to analog (D/A) converters, timer counters (TC) and signal conditioning (SC) logic as shown.
  • the DAQ logic 204 provides the data acquisition functionality of the DAQ card 114.
  • the dedicated logic 204 is comprised on a daughter card which is inserted into a connector on the main card, wherein the main card includes the other components shown in Figure 3.
  • the interface card 114 includes a dedicated on-board microprocessor 212 and memory 214, referred to as an embedded processor and embedded may, respectively.
  • an embedded processor and embedded may, respectively.
  • This enables a portion of the graphical program to be compiled into machine language for storage in the memory 214 and execution by the microprocessor 212.
  • the embedded memory 214 stores a kernel providing basic OS services, as well as a graphical programming system run-time engine for real-time execution of compiled graphical programs.
  • the embedded memory 214 is also operable to receive and store a portion or all of a compiled grapical program for execution in the embedded system.
  • the embedded CPU 212 executes code and data from the embedded memory 214 to implement at least a portion of a virtual instrumentation or industrial automation function.
  • the interface card 114 further includes bus interface logic 216 and a control/data bus 218.
  • the interface card 114 is a PCI bus-compliant interface card adapted for coupling to the PCI bus of the host computer 102, or adapted for coupling to a PXI (PCI eXtensions for Instrumentation) bus.
  • the bus interface logic 216 and the control/data bus 218 thus present a PCI or PXI interface.
  • the interface card 114 also includes local bus interface logic 208.
  • the local bus interface logic 208 presents a RTSI (Real Time System Integration) bus for routing timing and trigger signals between the interface card 114 and one or more other devices or cards.
  • RTSI Real Time System Integration
  • the interface card 114 further includes a programmable hardware element or programmable processor 206.
  • the programmable hardware 206 comprises a field programmable gate array (FPGA) such as those available from Xilinx, Altera, etc.
  • the programmable hardware element 206 is coupled to the DAQ logic 204 and is also coupled to the local bus interface 208.
  • graphical programs can be created on the computer 102, or on another computer in a networked system, and, in this embodiment, one or more graphical programs can be converted into embedded hardware implementations, and at least a portion of one or more graphical programs can be converted into hardware implementation forms for execution in the FPGA 206.
  • one or more of the graphical programs are compiled for execution on the CPU 212 and execute locally on the interface card 114 via the CPU 212 and memory 214, and at least a portion of a second graphical program is translated or converted into a hardware executable format and downloaded to the FPGA 206 for hardware implementation.
  • the embedded system does not include a non-volatile media, such as a hard disk, for storing software programs such as the OS kernel or the embedded graphical programming system. Since an operating system and application programs typically reside on a hard drive or non-volatile media of a computer system, and a computer system typically 'boots' the operating system from the hard drive, its absence means that an alternative method of booting needs to present.
  • Figure 4 illustrates loading of the various software elements comprised in the embedded system from the host computer onto the embedded system. It is noted that various of the steps in the flowcharts below can occur concurrently or in different orders.
  • step 402 the kernel or basic operating system is loaded onto the embedded system.
  • step 404 the embedded graphical programming system and various configuration information are loaded onto the embedded system.
  • the embedded graphical programming system is embedded Lab VIEW.
  • step 406 various software drivers and/or configuration utilities are loaded onto the embedded system.
  • the embedded system includes a kernel, an embedded graphical programming execution system, e.g., embedded LabVIEW, and any necessary device drivers.
  • the kernel is the Phar Lap kernel RTOS (real time operating system) available from Phar Lap.
  • FIG. 5A and 5B a more detailed flowchart is shown illustrating operation of the flowchart of Figure 4. It is noted that Figures 5A and 5B collectively illustrate two separate parallel flowcharts. a first flowchart illustrating operations of the host computer 102 (steps 422 - 430), and a second flowchart illustrating operations of the embedded system (steps 442 - 460). Unless designated with arrows, it is noted that various steps in each of the two flowcharts can occur in various orders and/or simultaneously; as desired.
  • step 420 power is provided to the computer system 102 and to the embedded system.
  • the host computer 102 and the embedded system perform the following operations.
  • step 422 the host computer 102 boots. This comprises the host computer 102 performing boot operations as is normally done in computer systems.
  • step 424 the host computer 102 executes a loader application which is operable to load vaious elements onto the embedded system. The loader application causes the host computer 102 to wait for a request from the embedded system.
  • step 442 the interface card 114 comprising the embedded system also boots up. This involves the embedded CPU 212 on the embedded system executing the BIOS (basic input/output system) from ROM comprised on the interface card 114.
  • BIOS basic input/output system
  • BIOS extension software executes BIOS extension software according to the preferred embodiment.
  • the embedded system executes the BIOS code in the read-only memory (ROM), as is typical in any computer system.
  • the BIOS code searches for any BIOS extension program present in memory and executes any BIOS extension program that it finds.
  • a BIOS extension program is stored in the ROM, wherein the BIOS extension software is provided in addition to the normal BIOS software.
  • the BIOS extension software is a loader program that causes the embedded system to request a load image from the host computer 102. More specifically, the BIOS extension software causes the embedded CPU 212 to set one or more bits in the shared memory on the embedded system which causes a request to be made to receive a load image from the host computer.
  • step 426 the host computer 102 receives the request and operates to transfer the load image from system memory 166 to the shared memoly 230 on the embedded system.
  • step 446 the embedded system receives the load image from the shared memory 230.
  • This transfer utilizes a shared memory protocol which is described further below.
  • the host computer 102 operates to transfer the load image in a plurality of iterations using block transfers.
  • steps 426 and 446 iteratively execute a plurality of times in order to transfer portions of the load image from the host computer to the embedded system. This is primarily due to the limited size of the buffers in the shared memory 230 and thus numerous transfers are required. In other words, due to the limited size of the shared memory 230, the host CPU 160 operates to transfer the load image in sequential block transfers using the shared memory protocol.
  • step 448 the embedded CPU 212 executes the load image to load the kernel into its memory 214.
  • a small program is also loaded which, when executed, causes the embedded system to request that the embedded graphical programming system, e.g., embedded LabVIEW, be transferred to the embedded system.
  • the host transfers the embedded graphical program execution engine, e.g., embedded LabVIEW to the shared memory 230.
  • step 452 the embedded system receives the embedded graphical program execution engine from the shared memory 230. This transfer preferably utilizes the shared memory protocol mentioned above and described further below.
  • step 454 the embedded system loads the embedded graphical program execution engine into its memoly 214.
  • step 456 the embedded system requests software drivers from the host system.
  • the host transfers te drivers to the shared memory 230, and in step 458 the embedded system receives the drivers.
  • This transfer also preferably utilizes the shared memory protocol mentioned above and described further below.
  • data acquisition drivers are preferably loaded on the system, preferably the NI-DAQ drivers available from National Instruments.
  • the embedded system is a different type of device, such as a GPIB interface card, or an image acquisition device, then the respective driver is loaded onto the system.
  • Any device drivers or configuration utilities which are downloaded preferably make use of an OS independent API.
  • the actual device driver is preferably a Phar Lap DLL.
  • the following comprises a list of the major components in the host LabVIEW graphical programming system.
  • the components which are marked** are included in Embedded LabVIEW.
  • the components which are not marked** are not included in Embedded LabVIEW.
  • step 502 the user launches the host graphical programming system on the host computer 102.
  • the host computer system 102 launches the executable of the host graphical programming system to run the graphical programming system on the host computer 102.
  • step 504 the user selects an execution engine for execution of the graphical program.
  • the computer system 102 receives and stores user input regarding which execution engine is to execute the graphical program.
  • two execution engines are comprised in the system, one being in the host computer 102 associated with the main graphical programming system, and a second associated with the embedded graphical programming system comprised in the embedded system.
  • a plurality of embedded systems may be coupled to the host computer 102, either directly or through a network.
  • the execution engine can be selected prior to launching the graphical programming system or after a graphical program has been created or opened.
  • the host computer 102 displays a dialog box regarding selection of an execution engine.
  • the host computer 102 displays the dialog box in response to a user preference setting in a preferences dialog that indicates that a dialog box should be displayed to enable the user to select the execution engine.
  • the preferences menu includes a setting which allows the user to select whether to display the dialog box or not. This is used to disable the display of the dialog box, for example, when the user is primarily using the host graphical programming system to create host applications, and the user does not wish to be bothered with having to provide input to this dialog box every time the graphical programming system is launched.
  • the user can include an argement specifying the desired execution engine.
  • the user can create an icon representing the graphical programming system which automatically specifies one of the execution engines.
  • Step 506 the user creates or opens a graphical program.
  • Step 506 presumes that a graphical programming development system is stored in the memory of the host computer system for creation of graphical programs.
  • the graphical programming system is the LabVIEW graphical programming system available from National Instruments.
  • the user creates the graphical program in a graphical program panel, referred to as a block diagram window and also creates a user interface in a graphical front panel
  • the graphical program comprises a graphical data flow diagram which specifies functionality of the program to be performed. This graphical data flow diagram is directly compilable into machine language code for execution on the computer system 102.
  • the host graphical programming system thus provides a seamless environment in which the user can develop an embedded application using high level graphical programming techniques.
  • step 506 After the user has created or opened a graphical program in step 506, in steps 508 and 510 the user compiles the graphical program, i.e., user input is received indicating that the graphical program should be compiled.
  • the user selects the run button in step 508, which automatically causes the graphical program to be compiled into machine language in step 510.
  • the host Lab VIEW compiler compiles the graphical program.
  • the system determines whether the machine language or executable portion of the program is to nm on the host computer or on the embedded computer. In other words, the system determines which execution engine has been selected by the user. If the host computer 102 has been selected by the user, then the machine language or compiled version of the graphical program is executed in the host computer 102, i.e., on the host CPU 160, as is normally done in LabVIEW.
  • step 522 the host computer 102 operates to transfer the machine language code corresponding to the graphical program to the embedded system to begin execution of the compiled code on the embedded system.
  • step 542 the host computer 102 operates to transfer the machine language code corresponding to the graphical program to the embedded system, this time using a higher level front panel protocol.
  • This higher level front panel protocol preferably utilizes an underlying data transfer protocol.
  • the front panel protocol sits on top of the shared memory protocol.
  • the front panel protocol utilizes the underlying network protocol, such as Ethernet.
  • the front panel protocol operates to provide further information regarding the identity of the data being transferred. This allows more intelligent transfer of the various components of the machine language code forming the graphical program or VI. This allows the embedded system to properly identify and configure the compiled graphical program in its memory for execution. It is noted that, if the compiled graphical program has been previously transferred and stored in the embedded system, then the transfer in step 542 is not required.
  • a graphical program comprises the following components.
  • a graphical program comprises front panel and block diagram source code portions, linker information, executable code, and data.
  • the front panel and block diagram source code remains in the host computer 102, and the linker information, executable code, and data are transferred to the embedded system.
  • the executable code or machine language code includes data structures which represent the controls and indicators that are to be displayed on the front panel.
  • the actual code which operates to display these controls and indicators and display and update data within these controls and indicators referred to as the editor portion, is preferably comprised in the host graphical programming system executing on the host computer 102.
  • step 544 the host computer 102 transfers a request to the embedded system to execute the compiled graphical program.
  • various host devices can request the embedded system to execute a respective graphical program or VI.
  • the host computer 102 transfers a request to the embedded system to execute the compiled graphical program.
  • step 546 the embedded system determines if the rights to execution of the compiled graphical program have already been given to a prior requester. If so, then in step 552 the embedded system returns a message to the host computer 102 that the compiled graphical program is already executing for another requester. If the rights to execution of the compiled graphical program have not already been given to a prior requester in step 546, then in step 548 the embedded system executes the graphical program.
  • step 548 the embedded system executes the graphical program, i.e., the embedded CPU 212 executes the machine language to implement the graphical program inside the embedded system.
  • Figure 8 is a simplified diagram illustrating execution of the graphical program in the embedded system. As shown, in step 602 the embedded system executes block diagram portion, and in step 604 the host system executes the front panel portion of the graphical program
  • the computation portion of the VI or graphical program is compiled into machine language and is downloaded and executed on the embedded system
  • the machine language code includes structures which represent the controls and indicators that are to be displayed on the front panel of the graphical program.
  • the actual code which operates to display these controls and indicators and display and update data within these controls and indicators referred to as the editor portion, is comprised in the graphical programming system which executes on the host computer 102 and is not part of the embedded LabVIEW comprised on the embedded system. Therefore the computation or block diagram portion of the graphical program executes on the embedded system.
  • the host computer 102 when the user provides input to a control, the host computer 102 performs the display operations and is required to transfer the input data to the embedded system using the front panel protocol and the shared memory as described above.
  • the embedded system when execution of the compiled graphical program in the embedded system generates output which is necessary to be displayed on the front panel of the VI, then the embedded system utilizes the front panel protocol and the shared memory to transfer the output to the LabVIEW editor executing on the host computer 102, which operates to display the data on the display screen.
  • the user can operate/view the controls and indicators of the glaphical program on the display of the host computer as if the graphical program were executing directly on the host system.
  • the user can input a selection which prevents display of updates of output data in order for increased speed and efficiency in the real time embedded system.
  • the preferred embodiment also allows programmatic control of graphical programs or VIs in embedded LabVIEW from host LabVIEW.
  • the host and embedded LabVIEW programs each include a set of VIs or graphical programs and/or a C library, that to allow programmatic control of each program.
  • These VIs or graphical programs on each of the host and embedded LabVIEW can communicate, such as by accessing the reserved portion of shared memory or using a network protocol.
  • This enables a user to build an application in which a portion runs on the host computer 102 and a portion runs on the embedded system.
  • the user can create an application in which the user interface/data logger VIs execute on the host computer 102 and control/data acquisition VIs execute on embedded LabVIEW.
  • the host LabVIEW can thus act, for example, as an independent application communicating with embedded LabVIEW, such as through the shared memory.
  • the embedded system provides more deterministic and/or real time performance for execution of applications.
  • the embedded graphical programming system e.g., embedded LabVIEW
  • the embedded graphical programming system provides determinism due to the following.
  • embedded LabVIEW has no direct user interface.
  • there is no interference in program execution such as from disk caching, and no overhead, e.g., driver call overhead, from the OS.
  • Embedded LabVIEW is also the only application running in the system.
  • embedded LabVIEW is running on top of a real-time operating system, as opposed to a desktop non-real-time system.
  • the embedded system executes a graphical program somewhat differently for certain constructs comprised within a graphical program.
  • the LabVIEW graphical programming system includes attribute nodes which are placed in a program to allow a user to programmatically control front panel objects, such as controls and indicators.
  • the execution engine in the embedded system arrives upon execution of an attribute node, the execution system recognizes that an attribute node is substantially solely involved with the program changing values or other information on front panel objects, such as controls or indicators.
  • it is impossible for the execution system to execute the attribute node because the attribute node is intricately involved with changing parameters or attributes associated with front panel objects, and this code resides solely on the host computer 102. Therefore, in the preferred embodiment, for attribute nodes.
  • the execution engine in the embedded system operates to transfer a pointer to where the code execution should begin as well as the necessary data to perform the operations.
  • the host computer 102 can then execute this portion of the code.
  • the embedded system only transfers a pointer and the necessary data to the host, since the code necessary to execute the attribute node already resides on the host.
  • the host computer 102 operates to modify the front panel accordingly and provides any results to the execution engine for it to use in execution of the remainder of the graphical program.
  • the host computer 102 and the embedded system each include a Shared Memory Communication (SMC) Manager which implements the shared memory protocol.
  • SMC Shared Memory Communication
  • the SMC Manager is a simple, low level driver that provides the ability to send and receive streams of bytes through the shared memory 230.
  • the SMC Manager comprises two layers: A top layer that presents a Winsock like API, and a Physical layer that accesses the shared memory.
  • the SMC Manager provides the most basic services (read, write, callback) to its client.
  • the top (Winsock) layer is preferably simplistic due to the use of shared memory, e.g., because the top layer does not have to handle lost packets or packets arriving out of sequence.
  • the physical layer carries out the actual reading and writing to shared memory.
  • the Winsock layer is a very thin veneer over the physical layer.
  • the physical layer performs most of the work.
  • the Winsock layer expands to include the TCP protocol, and an IP layer is inserted between the Winsock layer and the physical layer.
  • the SMC Manager provides a connection between two entities so that they can exchange data.
  • the two entities will usually reside in two different systems (e.g. one on the host PC and one on the embedded system, e.g., the intelligent DAQ card).
  • each system has its own SMC Manager.
  • the SMC protocol is preferably a peer-to-peer protocol and there is no master/slave hierarchy.
  • the SMC managers are referred to below as host and slave SMC managers for convenience.
  • the shared memory is subdivided into a number of areas. Part of the shared memory is reserved for register access, and the rest is dedicated to the shared memory protocol.
  • the shared memory is structured as shown in Figure 12.
  • the shared memory block includes two connection vectors - one for the host SMC and one for the slave SMC - that indicate which connection is desired to be open. Each bit in the vector corresponds to a connection number. The bits in the connection vector are set when the open function with the corresponding connection number is called. The bits are reset when the close function is called. A connection is established when the corresponding bits in both the host and slave connection vector are set.
  • connection vectors are not a perfectly reliable way to determine that a connection is valid e.g., one side could reboot without resetting the connections.
  • connection vectors The number of connections that can be opened is limited by the number of bits used for the connection vectors. In the preferred embodiment, 32 connections are available.
  • the data transfer scheme uses two unidirectional channels. Each channel is structured as shown in Figure 13. If the sender owns the channel, it can move data to the data area, set the length and transfer ownership of the channel to the receiver. When the receiver obtains the ownership of the channel, it can get transfer data out of the channel, and when it's done, it can transfer the ownership back to the sender. The receiver cannot read the data area until it has ownership, and the sender cannot write to the data area until it has the ownership.
  • bi-directional channels are used. Bi-directional channels may be used because the scheme of two uni-directional data channels may not lead to the most efficient use of resources. For example, if one side is sending small packets and the other is sending large packets, then one data channel is under utilized and the other is overburdened. Bi-directional channels remedy this problem. However, bi-directional channels are more complicated, and having to contend for the token may cause delays itself.
  • Figure 14 illustrates the structure of the shared memory bank using bi-directional channels.
  • Figure 15 the data channel structure.
  • Each data channel comprises a data area and a control area.
  • the data area is used for the actual data transfers, while the control area is used for house-keeping and connection management.
  • FIG. 16 illustrates the privileges of token owners and non-owners. Only one side (the token owner) can read or write the data area at any time. The control area permits concurrent write/write (not to the same location), read/write, read/read operations - subject to limitations of privileges.
  • the table of Figure 16 summarizes the privileges of token owners and non-owners with regards to the different fields in the shared memory block.
  • the SMC Manager can always read and write to it's own Token Request flag. However, it only makes sense to change the request flag to true if it doesn't have the token (in order to request for it) and change the flag to false if it already has the token.
  • the token owner has to be able to read the Token Request flag of the other side. so it can pass the token to the other side if requested.
  • the non-owner cannot read the Token Request flag because it has no token to pass.
  • the non-owner cannot read the data area because the data area might be in a inconsistent state (e.g. the length field is wrong). The token owner will make sure the data area is in a consistent state before passing the token.
  • the token owner needs to send data, it writes the data to the data area and passes the token to the other side. Once the other side has the token, it can read out the data from the data area.
  • the non-owner needs to send data, it needs to wait until it has the token - which it can obtain in one of two ways.
  • the SMC Manager When the SMC Manager reads data from the shared memory, it stores the data in a read buffer. Each connection preferably has its own read buffer. When the client calls the read function the client obtains the data out of the read buffer. When a read buffer is full. the SMC Manager discards data in the shared memory block without transferring it to the read buffer (to free the shared memory for further transactions). Clients also have a mechanism to detect loss of data and compensate for it by re-transmission.
  • the front panel protocol is a high level communication protocol which is used by the host LabVIEW and embedded LabVIEW.
  • the host LabVIEW and embedded LabVIEW communicate with each other using the front panel protocol.
  • the front panel protocol defines a format of data and commands that are transmitted back and forth to enable transmission of graphical program objects, software components and other data between host LabVIEW and embedded LabVTEW.
  • the front panel protocol uses the shared memory protocol described above in performing the actual transfers.
  • the front panel protocol uses the Winsock API and effectively sits on top of the Winsock API.
  • a different underlying protocol is used, such as Ethernet.
  • the front panel protocol transmits data as a sequence of packets, wherein each packet is a collection of data seat as a single message
  • the front panel protocol defines the format of data and commands that are transmitted back and forth to provide proxy controls and indicators on the host for the graphical program executing on the embedded system.
  • the host CPU executes front panel display code to display on the screen the graphical front panel of the graphical program.
  • the host LabVIEW and embedded LabVIEW use the front panel protocol to communicate I/O data back and form to accomplish this split execution.
  • the host graphical programming system or host LabVIEW thus provides the user interface for graphical programs executing on the embedded system.
  • the host LabVIEW thus essentially acts as the front panel "browser" for embedded LabVIEW applications.
  • the front panel protocol is also used for downloading of graphical programs or VIs to the embedded system.
  • the host LabVIEW operates to download a graphical program or VI by breaking the graphical program into pieces and sending them with any required information so that the graphical program can be reconstructed by the embedded system.
  • the front panel protocol is used for single stepping/debugging a graphical program executing on the embedded system.
  • the host LabVIEW can also act as an independent application communicating with embedded LabVIEW through the shared memory, preferably using the shared memory protocol, or the bont panel protocol.
  • the preferred embodiment provides the user the ability to debug a graphical program application which is executing on the embedded system, wherein the debugging is performed using graphical front panels and other graphical information displayed on the display screen of the host computer. Further, the user is able to debug a graphical program application which is executing on the embedded system by opening and viewing the block diagram of the graphical program application on the host computer using the host LabVIEW. Thus, as the compiled graphical program executes on the embedded system, the host computer displays the block diagram and/or front panel for debugging purposes.
  • Figure 11 conceptually illustrates the front panel displayed on the host computer 102 being used for debugging a graphical program executing on the embedded system.
  • the embedded system provides data regarding graphical program execution to the host computer, and the host computer displays this information for debugging purposes. Further, the user can enter input, such as selected nodes to be probed or enabling the next node to execute in single-step mode, and this information is provided to the embedded system to cause the desired execution. Thus, the user can use the host computer CPU and display screen for displaying the front panel and/or block diagram for debugging purposes for a graphical program executing on the embedded system.
  • Execution highlighting is used for debugging proposes to view an animation of the execution of the VI block diagram.
  • execution highlighting the movement of data from one node to another is marked by objects or bubbles moving along the wires.
  • execution highlighting is enabled for a graphical progam executing on the embedded system according to the present invention, as the graphical program executes on the embedded system, the embedded system provides execution status data to the host computer to enable the host computer to display bubbles moving along the wires of the block diagram, wherein the bubbles represent execution of the graphical program on the embedded system.
  • Execution highlighting is commonly used with single-step mode to gain an understanding of how data flows through nodes in the graphical program.
  • single-stepping mode the user presses a step button to proceed to execution of a subsequent node in the graphical program.
  • the next node to be executed blinks rapidly.
  • the embedded system provides execution status data to the host computer informing the host computer as to which node is currently being executed, and to enable the host computer to blink the next node to be executed.
  • the host computer provides this user input to the embedded system to direct the embedded system to execute the next node in the graphical program.
  • the preferred embodiment includes a mechanism for embedded LabVIEW to load DLLs and to invoke or call functions in DLLs.
  • DLLs may be generated by the native development tools (specifically the linker) provided by the real-time operating system used in the embedded system, or by development tools used for desktop computer systems (e.g. Microsoft Visual C++). In the latter case, because the DLLs generated by desktop development tools are not intended to be used in real-time operating systems, some modification or 'patching' is necessary to make the DLL compatible with the embedded system.
  • the importance of having the ability to use DLLs generated by desktop development tools is for user convenience, such that the user is not required to purchase any additional real-time development tools (specifically the linker) in order to take advantage of the flexibility provided by DLLs.
  • DLLs are normally loaded from disks or other non-volatile media. Because of the absence of such non-volatile media in the embedded system, an alternative method is required.
  • the loading of DLLs is somewhat similar to the process of initial booting - the embedded system requests the DLL from the host system, using the shared memory protocol as the conduit. An application on the host system reads the requested DLL from its hard disk and supplies the DLL to the embedded system.
  • the preferred embodiment includes a mechanism for loading and relocating code interface nodes (CINs).
  • CINs code interface nodes
  • errors generated during execution of the graphical program on the embedded system are provided to the host system for display on the screen.
  • the preferred embodiment includes a method for defining and ensuring behavior of Lab VIEW when a VI requests a resource that does not exist. MORE The present invention also intelligently handles File IO, From Panel Attributes, Networking
  • the preferred embodiment includes new basic primitives which allow the user to build deterministic control loops.
  • one new primitive allows a user to specify skew in the "Wait for multiple ms" primitive.

Claims (50)

  1. Procédé pour réaliser des opérations d'instrumentation dans un système d'instrumentation (100) comprenant un ordinateur hôte (102) et un dispositif, dans lequel l'ordinateur hôte (102) comprend un processeur central hôte (160) et une mémoire hôte (166), dans lequel le dispositif est couplé à l'ordinateur (102), dans lequel le dispositif comprend un processeur central intégré et une mémoire intégrée, le procédé comprenant :
    le stockage d'un système de programmation graphique dans la mémoire (166) de l'ordinateur hôte (102),
    la création d'un programme graphique sur l'ordinateur hôte (102), dans lequel ladite création du programme graphique comprend le fait de disposer sur l'écran une pluralité de noeuds constituant le programme graphique ; et
    la compilation du programme graphique de manière à produire un programme graphique compilé ;
       caractérisé en ce que le procédé comprend en outre :
    le stockage d'un moteur d'exécution de programme graphique dans la mémoire intégrée du dispositif ;
    le téléchargement du programme graphique compilé dans la mémoire intégrée comprise sur le dispositif ; et
    l'exécution par le dispositif du programme graphique compilé, dans lequel ladite exécution comprend l'exécution du moteur d'exécution aux fins d'exécuter le programme graphique compilé.
  2. Procédé selon la revendication 1, comprenant en outre :
    le stockage de la partie résidente d'un. système d'exploitation dans la mémoire intégrée du dispositif,
    dans lequel la partie résidente du système d'exploitation fournit les services de base d'un système d'exploitation ;
       dans lequel ladite exécution du programme graphique compilé comprend l'exécution de ladite partie résidente d'un système d'exploitation.
  3. Procédé selon la revendication 2, dans lequel le dispositif exécute le programme graphique d'une manière déterministe.
  4. Procédé selon la revendication 1, comprenant en outre :
    la réception d'une saisie utilisateur sélectionnant le moteur d'exécution compris dans le dispositif afin d'exécuter le programme graphique compilé après la création dudit programme graphique.
  5. Procédé selon la revendication 1, dans lequel la mémoire intégrée comprise sur le dispositif comprend une partie de mémoire partagée, le procédé comprenant en outre :
    la communication du processeur central (160) avec le processeur central intégré en utilisant la mémoire partagée.
  6. Procédé selon la revendication 5, dans lequel le processeur central hôte (160) communiquant avec le processeur central intégré et en utilisant la mémoire partagée comprend :
    le stockage par le processeur central hôte (160) de l'information de communication dans la mémoire partagée ;
    l'accès par le processeur central intégré à ladite information de communication dans la mémoire partagée ;
    le stockage par le processeur central intégré de ladite information de communication dans la mémoire partagée ; et
    l'accès par le processeur central hôte (160) à ladite information de communication dans la mémoire partagée.
  7. Procédé selon la revendication 1, dans lequel le programme graphique comprend un organigramme graphique et un panneau de commande graphique, le procédé comprenant en outre :
    l'affichage par le processeur central hôte (160) sur l'écran, dudit panneau de commande graphique du programme graphique durant l'exécution du programme graphique compilé par le dispositif.
  8. Procédé selon la revendication 7, dans lequel ledit panneau de commande graphique est utilisable pour fournir/afficher des entrées/sorties provenant/à destination du programme graphique compilé en cours d'exécution par le dispositif.
  9. Procédé selon la revendication 8, comprenant en outre :
    l'exécution par le dispositif du programme graphique compilé générant des données de sorties destinées à être affichées dans le panneau de commande graphique du programme graphique ;
    le transfert des données de sortie vers l'ordinateur hôte (102) ;
    l'affichage par l'ordinateur hôte (102) des données de sortie dans le panneau de commande graphique du programme graphique en réponse audit transfert.
  10. Procédé selon la revendication 9, dans lequel la mémoire intégrée comprise dans le dispositif comprend une partie de mémoire partagée,
       dans lequel ledit transfert des données de sortie vers l'ordinateur hôte (102) comprend :
    le stockage par le dispositif des données de sortie dans la mémoire partagée ; et
    l'accès de l'ordinateur hôte (102) aux données de sortie dans ladite mémoire partagée.
  11. Procédé selon la revendication 8, comprenant en outre :
    la réception d'une entrée utilisateur pour le programme graphique via le panneau de commande graphique ;
    l'affichage par l'ordinateur hôte (102) des données d'entrée dans le panneau de commande graphique du programme graphique en réponse à ladite réception de données d'entrée ;
    le transfert des données d'entrée vers le dispositif ;
    l'utilisation par le dispositif de l'entrée utilisateur durant l'exécution du programme graphique compilé.
  12. Procédé selon la revendication 11, dans lequel la mémoire intégrée comprise dans le dispositif comprend une partie de mémoire partagée, dans lequel ledit transfert des données d'entrée vers le dispositif comprend :
    le stockage par l'ordinateur hôte (102) des données d'entrée dans la mémoire partagée ; et
    l'accès par le dispositif aux données d'entrée dans la mémoire partagée.
  13. Procédé selon la revendication 7, dans lequel le processeur central hôte (160) exécute un code d'affichage du panneau de commande graphique afin d'afficher à l'écran ladite fenêtre graphique du programme graphique.
  14. Procédé selon la revendication 1, dans lequel le dispositif contient une carte d'interface comprise dans l'ordinateur.
  15. Procédé selon la revendication 1, comprenant en outre :
    l'interrogation par le processeur central hôte (160) du dispositif afin de déterminer quels programmes graphiques sont résidents sur le dispositif ;
    l'affichage sur l'écran des programmes graphiques qui sont résidents sur le dispositif en réponse à ladite interrogation.
  16. Procédé selon la revendication 1, comprenant en outre :
    le transfert par le dispositif d'une information de débogage vers l'ordinateur hôte (102) durant l'exécution du programme graphique compilé par le dispositif ;
    l'affichage sur l'écran par l'ordinateur hôte (102) de l'information de débogage en réponse audit transfert.
  17. Procédé selon la revendication 16, dans lequel le programme graphique comprend un organigramme et un panneau de commande graphique, le procédé comprenant en outre :
    l'affichage sur l'écran, par l'ordinateur hôte (102), de l'organigramme du programme graphique durant l'exécution du programme graphique compilé par le dispositif, dans lequel l'ordinateur hôte (102) affiche l'information de débogage sur l'organigramme du programme graphique.
  18. Procédé selon la revendication 17, dans lequel le schéma fonctionnel comprend une pluralité de noeuds,
    dans lequel l'information de débogage comprend les valeurs des données provenant d'un ou plusieurs noeuds de ladite pluralité de noeuds au fur et à mesure que lesdits noeuds sont exécutés par le dispositif ;
       dans lequel l'ordinateur hôte (102) affichant l'information de débogage comprend l'affichage, par l'ordinateur hôte (102), desdites valeurs des données provenant d'un ou de plusieurs noeuds de ladite pluralité de noeuds au fur et à mesure que lesdits noeuds sont exécutés par le dispositif.
  19. Procédé selon la revendication 17, dans lequel l'organigramme comprend une pluralité de noeuds, dans lequel l'information de débogage comprend l'exécution d'une instruction de mise en surbrillance afin d'exécuter la mise en surbrillance desdits noeuds dans l'organigramme au fur et à mesure que les noeuds sont exécutés par le dispositif ;
       dans lequel l'ordinateur hôte (102) affichant l'information de débogage comprend l'exécution, par l'ordinateur hôte (102), de la mise en surbrillance desdits noeuds dans l'organigramme au fur et à mesure que lesdits noeuds sont exécutés par le dispositif.
  20. Procédé selon la revendication 19, comprenant en outre :
    la réception, par l'ordinateur hôte (102), d'une entrée en pas à pas du fait de l'exécution du programme graphique compilé en cours d'exécution par le dispositif ;
    l'introduction, par l'ordinateur hôte (102), de ladite entrée en pas à pas dans le dispositif ;
    l'exécution, par le dispositif, d'un ou plusieurs noeuds dans le programme graphique compilé en réponse à ladite entrée en pas à pas.
  21. Procédé selon la revendication 1, dans lequel le programme graphique réalise une fonction de mesure, le procédé comprenant en outre :
    la réception, par le dispositif, d'un signal provenant d'une source externe avant ladite exécution ;
       dans lequel ladite exécution comprend l'exécution, par le dispositif, du programme graphique compilé afin d'assurer la fonction de mesure du signal.
  22. Procédé selon la revendication 1, dans lequel le dispositif comprend un instrument réalisant des fonctions de mesure ;
       dans lequel le programme graphique comprend un panneau de commande graphique, dans lequel le panneau de commande graphique simule un panneau de commande de l'instrument.
  23. Procédé selon la revendication 22, comprenant en outre :
    l'affichage sur l'écran, par le processeur central hôte (160), du panneau de commande graphique du programme graphique durant l'exécution, par l'instrument, du programme graphique compilé.
  24. Procédé selon la revendication 22, comprenant en outre :
    la réalisation par le panneau de commande graphique d'une ou plusieurs des fonctions suivantes : 1) introduction d'une entrée dans le programme graphique compilé en cours d'exécution sur l'instrument ; et 2) affichage d'une sortie provenant du programme graphique compilé en cours d'exécution sur l'instrument.
  25. Procédé selon la revendication 22, comprenant en outre :
    la réception, par le panneau de commande graphique, d'une entrée d'un utilisateur durant l'exécution, par le dispositif, du programme graphique compilé ;
    l'introduction, par le panneau de commande graphique, d'une entrée dans le programme graphique compilé en cours d'exécution sur l'instrument.
  26. Procédé selon la revendication 22, comprenant en outre :
    la réception, par le panneau de commande graphique, d'une sortie du programme graphique compilé en cours d'exécution sur l'instrument ; et
    l'affichage, par le panneau de commande graphique, de la sortie.
  27. Procédé pour initialiser un dispositif dans un système d'instrumentation en vue d'exécuter des programmes graphiques, le système d'instrumentation comprenant un ordinateur hôte (102) et le dispositif couplé à l'ordinateur hôte (102), dans lequel l'ordinateur hôte (102) comprend un processeur central hôte (160) et une mémoire hôte (166), dans lequel le dispositif comprend un processeur central intégré et une mémoire intégrée, le procédé comprenant :
    la mise sous tension électrique de l'ordinateur hôte (102) et du dispositif ; et
    l'initialisation de l'ordinateur hôte (102) ;
       caractérisé en ce que le procédé comprend en outre :
    l'initialisation du dispositif ;
    le transfert, par l'ordinateur hôte (102), de la partie résidente d'un système d'exploitation vers le dispositif ;
    le stockage, par le dispositif, de ladite partie résidente d'un système d'exploitation dans la mémoire intégrée ;
    le transfert, par l'ordinateur hôte, d'un moteur d'exécution de programmation graphique intégré vers le dispositif ; et
    le stockage, par le dispositif, du moteur d'exécution de programmation graphique dans la mémoire intégrée.
  28. Procédé selon la revendication 27, dans lequel, après que le dispositif ait stocké la partie résidente d'un système d'exploitation et le moteur d'exécution de programmation graphique intégré, le dispositif est opérable pour exécuter des programmes graphiques.
  29. Procédé selon la revendication 27, dans lequel l'ordinateur hôte (102) transférant la partie résidente d'un système d'exploitation vers le dispositif comprend :
    la demande, par le dispositif, d'une image de chargement à l'ordinateur hôte (102) après l'initialisation du dispositif ;
    le transfert, par l'ordinateur hôte (102), de ladite image de chargement vers le dispositif ;
    l'exécution, par le dispositif, de l'image de chargement afin de charger la partie résidente du système d'exploitation dans la mémoire intégrée.
  30. Procédé selon la revendication 27, dans lequel l'ordinateur hôte (102) stocke un système de programmation graphique dans la mémoire hôte (166),
       dans lequel le moteur d'exécution de programme graphique intégré comprend une partie du système de programmation graphique stocké dans la mémoire hôte (166).
  31. Procédé selon la revendication 27, dans lequel le dispositif comprend un instrument pour réaliser des fonctions de mesure.
  32. Système d'instrumentation (100) pour mesurer un signal, le système d'instrumentation comprenant :
    un ordinateur hôte (102), dans lequel l'ordinateur hôte (102) comprend un processeur central hôte (160), une mémoire hôte (166) et un écran d'affichage, dans lequel l'ordinateur hôte (102) stocke un programme graphique, dans lequel le programme graphique réalise une fonction de mesure ;
       dans lequel l'ordinateur hôte (102) est opérable pour compiler le programme graphique afin de produire un programme graphique compilé ;
       caractérisé en ce que le système d'instrumentation comprend en outre :
    un instrument couplé à l'ordinateur hôte (102),
    dans lequel l'instrument comprend un processeur central intégré et une mémoire intégrée, dans lequel l'instrument comprend en outre une entrée destinée à recevoir un signal provenant d'une source externe ;
       dans lequel l'ordinateur hôte (102) est opérable pour transférer au moins une partie du programme graphique compilé vers la mémoire intégrée de l'instrument en vue de l'exécution de ladite au moins une partie du programme graphique compilé ; et
       dans lequel le processeur central intégré de l'instrument est opérable pour exécuter ladite au moins une partie du programme graphique compilé afin de réaliser la fonction de mesure d'un signal reçu.
  33. Système d'instrumentation selon la revendication 32, dans lequel l'instrument comprend en outre une logique analogique/numérique (A/N) couplée à l'entrée afin de réaliser la conversion analogique/numérique d'un signal reçu afin de produire un signal numérique ;
       dans lequel l'instrument est opérable pour exécuter ladite au moins une partie du programme graphique compilé afin de réaliser la fonction de mesure sur le signal numérique.
  34. Système d'instrumentation selon la revendication 32, dans lequel l'instrument est opérable pour exécuter une première partie du programme graphique compilé ;
       dans lequel l'ordinateur hôte (102) est opérable pour exécuter une seconde partie du programme graphique compilé.
  35. Système d'instrumentation selon la revendication 32, dans lequel le programme graphique compilé comprend une première partie et une seconde partie ;
       dans lequel le système d'instrumentation (100) comprend un dispositif d'entrée utilisateur qui est opérable pour recevoir une première entrée utilisateur sélectionnant l'instrument pour l'exécution de la première partie du programme graphique compilé et est opérable pour recevoir une seconde entrée utilisateur sélectionnant le processeur central hôte (160) pour l'exécution de la seconde partie du programme graphique compilé ;
       dans lequel l'instrument est opérable pour exécuter la première partie du programme graphique compilé en réponse à la première entrée utilisateur sélectionnant l'instrument pour l'exécution de la première partie du programme graphique compilé ;
       dans lequel l'ordinateur hôte (102) est opérable pour exécuter la seconde partie du programme graphique compilé en réponse à la seconde entrée utilisateur sélectionnant le processeur central hôte (160) pour l'exécution de la seconde partie du programme graphique compilé.
  36. Système d'instrumentation selon la revendication 32,
       dans lequel le programme graphique comprend une interface utilisateur sous forme de panneau de commande, dans lequel l'interface utilisateur sous forme de panneau de commande simule un panneau de commande de l'instrument.
  37. Système d'instrumentation selon la revendication 36,
       dans lequel l'interface utilisateur sous forme de panneau de commande est présentée à l'écran lorsque l'instrument exécute ladite au moins une partie du programme graphique compilé.
  38. Système d'instrumentation selon la revendication 37, dans lequel ladite interface utilisateur sous forme de panneau de commande est utilisable pour fournir/afficher des entrées/sorties provenant/à destination du programme graphique compilé en cours d'exécution sur l'instrument.
  39. Système d'instrumentation selon la revendication 36,
       dans lequel le processeur central hôte (160) est opérable pour exécuter un code provenant de la mémoire hôte (166) pour présenter ladite interface utilisateur sous forme de panneau de commande à l'écran lorsque l'instrument exécute ladite au moins une partie du programme graphique compilé.
  40. Système d'instrumentation selon la revendication 39,
       dans lequel l'instrument est opérable pour générer des données de sortie destinées à être affichées dans l'interface utilisateur sous forme de panneau de commande du programme graphique en réponse à l'exécution de ladite au moins une partie du programme graphique compilé ;
       dans lequel l'instrument est opérable pour transférer les données de sortie vers l'ordinateur hôte (102) ;
       dans lequel l'ordinateur hôte (102) est opérable pour afficher les données de sortie sur l'interface utilisateur sous forme de panneau de commande.
  41. Système d'instrumentation selon la revendication 39,
       dans lequel l'ordinateur hôte (102) comprend un dispositif d'entrée utilisateur destiné à recevoir les entrées de l'utilisateur ;
       dans lequel l'ordinateur hôte (102). est opérable pour afficher les données d'entrée dans l'interface utilisateur sous forme de panneau de commande du programme graphique ;
       dans lequel l'ordinateur hôte (102) est en outre opérable pour transférer les données d'entrée vers l'instrument ; et
       dans lequel l'instrument utilise les données d'entrée durant l'exécution de ladite au moins une partie du programme graphique compilé.
  42. Système d'instrumentation selon la revendication 39, dans lequel le système d'instrumentation est un instrument virtuel.
  43. Système d'instrumentation selon la revendication 32, dans lequel l'instrument exécute ladite au moins une partie du programme graphique compilé en temps réel.
  44. Système d'instrumentation selon la revendication 32, dans lequel l'instrument exécute ladite au moins une partie du programme graphique compilé de manière déterministe.
  45. Système d'instrumentation selon a revendication 32, dans lequel la mémoire intégrée stocke un moteur d'exécution de programme graphique.
  46. Système d'instrumentation selon la revendication 45, dans lequel :
    la mémoire intégrée stocke en outre une partie résidente d'un système d'exploitation, dans lequel la partie résidente fournit les services de base d'un système d'exploitation ;
    l'instrument exécute ladite partie résidente lors de l'exécution de ladite au moins une partie du programme graphique compilé.
  47. Système d'instrumentation selon la revendication 32, dans lequel :
    l'ordinateur hôte (102) stocke en outre un système de programmation graphique ;
    le système de programmation graphique est exécutable pour créer le programme graphique en réponse à une entrée de l'utilisateur, dans lequel la création du programme graphique comprend le fait de disposer une pluralité de noeuds constituant le programme graphique sur l'écran d'affichage en réponse à l'entrée de l'utilisateur.
  48. Système d'instrumentation selon la revendication 32, dans lequel la mémoire intégrée que comprend l'instrument comprend une partie de mémoire partagée ;
       dans lequel le processeur central hôte (160) est exploitable pour communiquer avec le processeur central intégré utilisant la mémoire partagée.
  49. Système d'instrumentation selon la revendication 32, dans lequel l'instrument est une carte d'interface incluse dans l'ordinateur hôte (102).
  50. Système d'instrumentation selon la revendication 32, dans lequel l'instrument est un instrument externe couplé à l'ordinateur hôte (102).
EP98924969A 1997-08-18 1998-05-29 Systeme de programmation graphique emboite Expired - Lifetime EP1004072B1 (fr)

Applications Claiming Priority (3)

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US912445 1997-08-18
US08/912,445 US6173438B1 (en) 1997-08-18 1997-08-18 Embedded graphical programming system
PCT/US1998/010916 WO1999009473A1 (fr) 1997-08-18 1998-05-29 Systeme de programmation graphique emboite

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EP1004072A1 EP1004072A1 (fr) 2000-05-31
EP1004072B1 true EP1004072B1 (fr) 2002-03-06

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EP (1) EP1004072B1 (fr)
AT (1) ATE214173T1 (fr)
DE (1) DE69804107T2 (fr)
WO (1) WO1999009473A1 (fr)

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