EP0956589A4 - - Google Patents

Info

Publication number
EP0956589A4
EP0956589A4 EP96941385A EP96941385A EP0956589A4 EP 0956589 A4 EP0956589 A4 EP 0956589A4 EP 96941385 A EP96941385 A EP 96941385A EP 96941385 A EP96941385 A EP 96941385A EP 0956589 A4 EP0956589 A4 EP 0956589A4
Authority
EP
European Patent Office
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP96941385A
Other versions
EP0956589A1 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/749,259 external-priority patent/US5764484A/en
Application filed filed Critical
Publication of EP0956589A1 publication Critical patent/EP0956589A1/en
Publication of EP0956589A4 publication Critical patent/EP0956589A4/xx
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
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    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142Metallic substrates having insulating layers
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
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    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/4805Shape
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body
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    • H01L2224/732Location after the connecting process
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    • H01L2224/73265Layer and wire connectors
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    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
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    • H01L2924/15165Monolayer substrate
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    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
EP96941385A 1995-11-20 1996-11-18 Ground ring for metal electronic package Withdrawn EP0956589A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US737495P 1995-11-20 1995-11-20
US7374P 1995-11-20
US08/749,259 US5764484A (en) 1996-11-15 1996-11-15 Ground ring for a metal electronic package
PCT/US1996/018479 WO1997019470A1 (en) 1995-11-20 1996-11-18 Ground ring for metal electronic package
US749259 2003-12-31

Publications (2)

Publication Number Publication Date
EP0956589A1 EP0956589A1 (en) 1999-11-17
EP0956589A4 true EP0956589A4 (en) 1999-11-17

Family

ID=26676905

Family Applications (1)

Application Number Title Priority Date Filing Date
EP96941385A Withdrawn EP0956589A1 (en) 1995-11-20 1996-11-18 Ground ring for metal electronic package

Country Status (5)

Country Link
EP (1) EP0956589A1 (en)
JP (1) JP2000500619A (en)
KR (1) KR19990071466A (en)
TW (1) TW434870B (en)
WO (1) WO1997019470A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6716363B2 (en) * 2016-06-28 2020-07-01 株式会社アムコー・テクノロジー・ジャパン Semiconductor package and manufacturing method thereof

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939316A (en) * 1988-10-05 1990-07-03 Olin Corporation Aluminum alloy semiconductor packages
EP0457260A1 (en) * 1990-05-18 1991-11-21 Fujitsu Limited Semiconductor device having a ceramic package
US5091772A (en) * 1989-05-18 1992-02-25 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and package
WO1994022168A1 (en) * 1993-03-19 1994-09-29 Olin Corporation Ball grid array electronic package
EP0645953A1 (en) * 1993-09-29 1995-03-29 Siemens NV Method of producing a two or multilayer wiring structure and two or multilayer structure made thereof
WO1996003020A1 (en) * 1994-07-19 1996-02-01 Olin Corporation Integrally bumped electronic package components

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3819431A (en) * 1971-10-05 1974-06-25 Kulite Semiconductor Products Method of making transducers employing integral protective coatings and supports
JPS58169943A (en) * 1982-03-29 1983-10-06 Fujitsu Ltd Semiconductor device
US5023398A (en) * 1988-10-05 1991-06-11 Olin Corporation Aluminum alloy semiconductor packages
US5353195A (en) * 1993-07-09 1994-10-04 General Electric Company Integral power and ground structure for multi-chip modules

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939316A (en) * 1988-10-05 1990-07-03 Olin Corporation Aluminum alloy semiconductor packages
US5091772A (en) * 1989-05-18 1992-02-25 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and package
EP0457260A1 (en) * 1990-05-18 1991-11-21 Fujitsu Limited Semiconductor device having a ceramic package
WO1994022168A1 (en) * 1993-03-19 1994-09-29 Olin Corporation Ball grid array electronic package
EP0645953A1 (en) * 1993-09-29 1995-03-29 Siemens NV Method of producing a two or multilayer wiring structure and two or multilayer structure made thereof
WO1996003020A1 (en) * 1994-07-19 1996-02-01 Olin Corporation Integrally bumped electronic package components

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO9719470A1 *

Also Published As

Publication number Publication date
WO1997019470A1 (en) 1997-05-29
KR19990071466A (en) 1999-09-27
EP0956589A1 (en) 1999-11-17
TW434870B (en) 2001-05-16
JP2000500619A (en) 2000-01-18

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