EP0916450B1 - Method and apparatus for polishing semiconductor wafers - Google Patents

Description

The invention relates to a method for polishing semiconductor wafers the at least one side of at least one semiconductor wafer against one with one Polishing cloth covered polishing plate is pressed and polished, the semiconductor wafer and the polishing plate perform a relative movement.

The planarization of a semiconductor wafer using a chemo-mechanical polishing process forms an important processing step in the manufacturing process a flat, defect-free and smooth semiconductor wafer. This polishing step sets in many manufacturing processes the last shaping and thus the surface properties significantly determining step before reusing the semiconductor wafer as a raw material for the manufacture of electrical, electronic and microelectronic Components represent. The objectives of the polishing process are in particular the achievement a high level of flatness and parallelism of the two disc sides, the removal through Pretreatment of damaged surface layers ("damage removal") and reduction the micro roughness of the semiconductor wafer.

Single-sided and double-sided polishing processes are usually used. In the Single side batch polishing of a group of several semiconductor wafers ("single side batch polishing") the semiconductor wafers with one side on the front of a carrier plate mounted by a positive and non-positive between the side and the support plate Connection, for example by adhesion, gluing, kitten or vacuum application, will be produced. As a rule, the semiconductor wafers are placed on the Carrier plate mounted so that they form a pattern of concentric rings. To the free sides of the pane are countered by the addition of a polishing agent a polishing plate, over which a polishing cloth is stretched, with a certain polishing force pressed and polished. The carrier plate and the polishing plate are thereby usually rotated at different speeds. The necessary polishing force is provided by a pressure stamp hereinafter referred to as "polishing head" transfer the back of the carrier plate. A variety of used polishing machines are designed so that they over have several polishing pots and accordingly several carrier plates be able to record.

With double side polishing (DSP) the front and back are polished simultaneously by several semiconductor wafers between two covered with polishing cloths, upper and lower polishing plates. there the semiconductor wafers lie in thin guide cages ("wafer carrier"), which are referred to as rotor disks and in a similar form when lapping semiconductor wafers be used. Double-sided polishing processes and devices are always for the treatment of groups of semiconductor wafers designed ("batch polishing").

Several factors make it difficult to achieve the desired flatness and parallelism of the semiconductor wafers, subsequently sought Called geometry. Polished semiconductor wafers often have pages that are not parallel to each other but in cross-section the shape of a wedge take in.

The shape of the wedge can be described with the term linear thickness variation describe. The linear thickness variation is the largest measured difference in thickness between two measuring points, the on the same diameter symmetrical to the center of the semiconductor wafer lie. The measuring points are usually symmetrical on a circle that is a distance of, for example 6 mm from the edge of the wafer of the semiconductor wafer. Is the edge the semiconductor wafer, which faces the edge of the carrier plate, thicker (thinner) than the edge of the pane, towards the center of the carrier plate shows, one speaks of a positive (negative) linear Wedging.

Another measure of the wedge shape of semiconductor wafers is the so-called TTV value (TTV = total thickness variation). This value gives the difference between the thickest and the thinnest point on the semiconductor wafer.

Ultimately, the wedging of a semiconductor wafer caused by the polishing is the result an uneven material removal. It can arise if the carrier plate while the polish is deformed radially by its own weight or a certain radial wedge-shape due to manufacturing. Sometimes there is an emerging one Wear of the polishing cloth Cause that the disc geometry in the Several polishing runs deteriorated. A certain basic wedge results even when using ideally flat carrier plates due to the kinematic conditions for single disc polishing, which promote inhomogeneous material removal.

EP-4033 A1 proposes intermediate layers made of soft elastic bodies between the polishing pot and the back of the carrier plate, whereby the carrier plate is intentionally curved a little radially symmetrically. With that, too to a certain extent be prevented that the semiconductor wafers are polished wedge-shaped. However, this method cannot be automated and is prone to errors because of its success largely depends on the experience and prudence of the operators that choose the intermediate layers based on their width and insert them. But also if no mistakes are made, the wedge of the polished semiconductor wafers remains above a certain limit.

In US-4,471,579 a polishing machine is described, the bushings in the polishing plate for the passage of tempered liquids.

The present invention solves the problem of polishing semiconductor wafers to achieve improved uniformity of the polishing removal, so that in particular the wedge shape of the polished semiconductor wafers is low.

The invention relates to a method for polishing semiconductor wafers the at least one side of at least one semiconductor wafer against one with one Polishing cloth covered polishing plate is pressed and polished, the semiconductor wafer and the polishing plate perform a relative movement, characterized in that the Semiconductor wafer during polishing at least two areas on the polishing plate sweeps that have certain radial latitudes and different temperatures and tempering agents are provided in the polishing plate, with the help of which the number, the radial latitudes and the temperatures of the areas before polishing the Semiconductor wafers can be set.

According to investigations by the inventors, a radially convex temperature profile arises during polishing on the polishing plate, which is used for the wedging of polished semiconductor wafers is jointly responsible. The temperature profile causes an inhomogeneous material removal, not by using the above-mentioned elastic intermediate layers (for example when using ceramic carrier plates that are practically not curved ) or not sufficient (when using carrier plates from less stiff material) can be compensated. By the present invention is one such compensation is possible because of the creation of tempered areas a radial temperature profile of the polishing plate is specified, which indicates the material removal decisively determined. The invention makes it possible to polish the wedge of Setting semiconductor wafers within comparatively wide limits. By the invention can produce semiconductor wafers that are specifically positive or negative wedge are. However, the invention is primarily used for kinematic influences and influences of the carrier plate or the polishing cloth, which too Wedges would lead to compensate and for example an extension of the service life of the polishing cloth to reach.

The invention can be used both for one-sided polishing (one and Multi-disc polish), as well as for double-sided polish become. The invention is illustrated below using the example multi-disc single-side polishing (single-side batch polishing) explained in more detail.

According to the invention it is ensured that the semiconductor wafers at least two areas during polishing paint over the polishing plate, which is caused by temperature control in the Polishing pads are kept at certain temperatures. The Areas are preferably laid out in concentric rings, taking temperatures from at least two of the ranges differ. The number, the radial latitudes and the temperatures the areas are determined before a polishing run. Not excluded is the temperature at which the areas be held during a polishing run change.

Due to influences of the polishing kinematics, the use not completely flat carrier plates and an inhomogeneous one The polishing cloth wears during polishing Semiconductor wafers on a conventional polishing plate are not homogeneous Temperature before. The temperature often increases from the edge r / 2 of the polishing plate (r is the radius of the polishing plate) and falls off towards the center of the polishing plate, making a radial convex temperature profile results. By the establishment from areas on the polishing plate, from areas in the polishing plate housed temperature control agents on certain. temperatures can be maintained, a homogenization of the temperature profile can be achieved. To avoid training a radially convex temperature profile should be at least two tempered areas can be set up on the polishing plate. For example, three areas in the shape are suitable concentric rings, the outer and the inner on one higher temperature than the middle range. This creates heat in the center area of the polishing plate arises during the polishing of semiconductor wafers, dissipated via the temperature control. The outer and inner ring and thus preserve the parts of the polishing plate near the edge additional thermal energy, so that overall a flatter radial temperature profile results. Basically, by the invention of any polishing process radial temperature profile are made uniform.

The number of areas, their radial latitude and the temperatures, on which they are held are before polishing of the semiconductor wafers. As the basis for the determination can data from an analysis of the geometry previously polished Semiconductor wafers are used, for example the linear thickness variation determined for these semiconductor wafers. Measurement data of the radial temperature profile can also form the basis of the polishing plate during a previous one Polishing run were determined.

The functional relationship between that after a polish too expected geometry of the semiconductor wafers and the one to be determined Number, width and temperatures of the areas on the The polishing plate is expediently carried out by routine experimentation determined. In such experiments, the number is radial Systematic changes in width and temperature of the areas and the effects on the geometry of the polished semiconductor wafers examined.

After completing such experiments, the polishing process can be started be automated easily. A host computer dialed as input data the radial temperature profile, which during a previous polishing run or data on the geometry (for example on the wedge shape) of semiconductor wafers, which polishes on a walking polishing trip have been based on the empirical relationship found those to achieve a desired one Disc geometry necessary parameters (number, radial width and temperature of the Areas)

The invention is described in more detail below with reference to figures. In Figure 1 is a preferred device suitable for carrying out the claimed method shown schematically. The figure shows a vertical section through the device in side view. In Figure 2 is a horizontal section through the polishing plate of the device shown in top view. FIGS. 3a, 3b and 4a, 4b show schematically like the geometry of semiconductor wafers through the application of the invention can be influenced. In the following, reference is only made to features that serve to clarify the invention are necessary. Similar features are used in the figures indicated with the same reference numerals.

First, reference is made to FIG. 1. In the embodiment shown is a single-side polishing machine with several polishing pots, one of which one can be seen. The polishing pot 1 presses a carrier plate 2 against with a polishing force K. a polishing plate 4 covered with a polishing cloth 3. The carrier plate is, for example held on the polishing pot by vacuum suction. The semiconductor wafers 5 are fixed on the front of the carrier plate 2 facing the polishing cloth 3. While of the polishing rotates both the carrier plate and the polishing plate with a certain Speed and direction of rotation. Essential feature of the device are ring combs running in concentric tracks in the polishing plate which flows a tempering medium. There are five annular chambers Z1 in the polishing plate shown provided up to Z5. Each annulus becomes independent of another one Temperature medium, for example water, flows through, the temperature medium in each ring chamber has a certain temperature and the temperatures differ could be. The temperature control medium is through flow lines VZ1 to VZ5 pumped into the respective ring chambers and leaves them again through return lines RZ1 to RZ5. The supply and return lines run through a rotating union 6, which is attached to the underside of the polishing plate 4. For the sake of clarity, the supply and return lines are shown interrupted. The temperature control medium is from a thermostat 7 at a desired temperature held. The thermostat is operated by one Control computer 8 controlled, the target temperatures SZ1 to SZ5 specifies for the temperature control medium in the annular chambers Z1 to Z5. The master computer in turn accesses a data store 9 back, stored in the measurement data of previous polishing runs and automatically calculates the Target temperatures.

The temperature control medium holds a certain one in each annular chamber Temperature upright, so that on the polishing plate radially symmetrical Areas with a characteristic temperature arise that sweep over the semiconductor wafers during polishing. The The number of available areas depends on the number of the provided ring chambers. The radial widths of the areas are of the chosen radial widths of the annular chambers and depending on the temperature of the temperature control medium flows through the annular chambers.

In Figure 2 is a horizontal section through the polishing plate the device shown in Figure 1 in plan view. If the temperature of the temperature control medium in each ring chamber Z1 to Z5 from the temperatures of the tempering medium in the rest Differentiates annular chambers, produce the annular chambers the polishing plate corresponds to the number of annular chambers Number of annular areas. These areas are on a Temperature maintained, which is essentially the temperature of the Temperature control medium in the associated ring chamber corresponds. The Number of areas is correspondingly lower when the temperature of the temperature control medium in two or more neighboring ones Annular chambers is the same. Is the temperature of the temperature control medium the same in two adjacent ring chambers, results from this an area on the polishing plate whose radial width is approximately the sum of the redial widths of these annular chambers equivalent. 2 to 5 annular chambers are preferred provided. The radial widths of the annular chambers are preferably 25 to 120% of the diameter of the to be polished Semiconductor wafers.

The annular chambers can deviate from the illustration in Fig. 2 also be structured in itself (for example meandering). The specification of a certain radial temperature profile the polishing plate by providing areas with a certain temperature can also be considered other than described above can be achieved, for example by the integration of heating and cooling elements in the polishing plate. These can be done inductively or through a likewise in the polishing plate housed power supply are operated.

FIGS. 3a, 3b and 4a, 4b show schematically like the geometry of semiconductor wafers through the application the invention can be influenced. The figures reflect that Result of exemplary embodiments.

After a polishing run in a device according to FIG Preserved semiconductor wafers with positive taper. While during the polishing run, tempering medium flowed through the ring chambers, which is tempered in the annular chambers Z1 to Z5 as follows was: Z1 = 30 ° C, Z2 = 30 ° C, Z3 = 40 ° C, Z4 = 30 ° C and Z5 = 30 ° C (Fig. 3a). By changing the temperatures in the annular chambers (Z1 = 40 ° C, Z2 = 40 ° C, Z3 = 30 ° C, Z4 = 40 ° C and Z5 = 40 ° C) were able to a subsequent polishing run with nearly semiconductor wafers plane-parallel sides can be obtained (Fig. 3b).

After a polishing run in a device according to FIG. 1 Preserved semiconductor wafers with negative wedge. While during the polishing run, temperature control medium flowed through the annular chambers which is tempered in the annular chambers Z1 to Z5 as follows was: Z1 = 30 ° C, Z2 = 30 ° C, Z3 = 40 ° C, Z4 = 30 ° C and Z5 = 30 ° C (Fig. 4a). By changing the temperatures in the annular chambers (Z1 = 20 ° C, Z2 = 20 ° C, Z3 = 50 ° C, Z4 = 20 ° C and Z5 = 20 ° C) were able to a subsequent polishing run around semiconductor wafers with almost plane-parallel sides can be obtained (Fig. 4b).

Claims (7)

1. Process for polishing semiconductor wafers, in which at least one side of at least one semiconductor wafer is pressed against a polishing plate, over which a polishing cloth is stretched, and is polished, the semiconductor wafer and the polishing plate executing a relative movement, characterized in that the semiconductor wafer passes over at least two regions on the polishing plate during the polishing, which regions have defined radial widths and are at different temperatures, and temperature-control means are provided in the polishing plate, with the aid of which the number, the radial widths and the temperatures of the regions are fixed before the semiconductor wafers are polished.
2. Process according to Claim 1, characterized in that, in plan view of the polishing plate, the regions form concentric rings.
3. Process according to Claim 1 or Claim 2, characterized in that the number, the radial widths and the temperatures of the regions are fixed as a function of the result of a measurement, which is carried out during a preceding polishing run, of the radial temperature profile of the polishing plate.
4. Process according to Claim 1 or Claim 2, characterized in that the number, the radial widths and the temperatures of the regions are fixed as a function of the result of an analysis of the geometry of previously polished semiconductor wafers.
5. Process according to one of Claims 1 to 4, characterized in that the number, the radial widths and the temperatures of the regions are fixed automatically with the aid of a computer.
6. Process according to one of Claims 1 to 5, characterized in that the temperatures of the regions are changed during the polishing.
7. The process according to one of Claims 1 to 6, characterized in that the polishing is selected from a group of polishing processes which comprises single side polishing, double side polishing, single wafer polishing and batch polishing

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