EP0899644A3 - Polarisationsspannungsstabilisierungsschaltung - Google Patents

Polarisationsspannungsstabilisierungsschaltung Download PDF

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Publication number
EP0899644A3
EP0899644A3 EP98306464A EP98306464A EP0899644A3 EP 0899644 A3 EP0899644 A3 EP 0899644A3 EP 98306464 A EP98306464 A EP 98306464A EP 98306464 A EP98306464 A EP 98306464A EP 0899644 A3 EP0899644 A3 EP 0899644A3
Authority
EP
European Patent Office
Prior art keywords
voltage
drop circuit
diode
voltage drop
bias voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP98306464A
Other languages
English (en)
French (fr)
Other versions
EP0899644A2 (de
Inventor
Susumu Kanno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alps Alpine Co Ltd
Original Assignee
Alps Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alps Electric Co Ltd filed Critical Alps Electric Co Ltd
Publication of EP0899644A2 publication Critical patent/EP0899644A2/de
Publication of EP0899644A3 publication Critical patent/EP0899644A3/de
Withdrawn legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is DC
    • G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Amplifiers (AREA)
  • Control Of Electrical Variables (AREA)
  • Direct Current Feeding And Distribution (AREA)
EP98306464A 1997-09-01 1998-08-13 Polarisationsspannungsstabilisierungsschaltung Withdrawn EP0899644A3 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP9235652A JPH1174736A (ja) 1997-09-01 1997-09-01 バイアス電圧安定化回路
JP235652/97 1997-09-01

Publications (2)

Publication Number Publication Date
EP0899644A2 EP0899644A2 (de) 1999-03-03
EP0899644A3 true EP0899644A3 (de) 1999-05-06

Family

ID=16989196

Family Applications (1)

Application Number Title Priority Date Filing Date
EP98306464A Withdrawn EP0899644A3 (de) 1997-09-01 1998-08-13 Polarisationsspannungsstabilisierungsschaltung

Country Status (2)

Country Link
EP (1) EP0899644A3 (de)
JP (1) JPH1174736A (de)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4691304A (en) * 1984-05-30 1987-09-01 Hitachi, Ltd. Semiconductor device having an arrangement for preventing operational errors
JPH09162641A (ja) * 1995-12-05 1997-06-20 Alps Electric Co Ltd 電圧制御発振器

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4691304A (en) * 1984-05-30 1987-09-01 Hitachi, Ltd. Semiconductor device having an arrangement for preventing operational errors
JPH09162641A (ja) * 1995-12-05 1997-06-20 Alps Electric Co Ltd 電圧制御発振器

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
LIRAN T: "OPTIMIZATION OF A BACK BIAS GENERATOR FOR NMOS VLSI", PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ESPOO, FINLAND, JUNE 7 - 9, 1988, vol. 2, no. CONF. 21, 7 June 1988 (1988-06-07), INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, pages 1601 - 1606, XP000124760 *
PATENT ABSTRACTS OF JAPAN vol. 097, no. 010 31 October 1997 (1997-10-31) *

Also Published As

Publication number Publication date
EP0899644A2 (de) 1999-03-03
JPH1174736A (ja) 1999-03-16

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