EP0886218A3 - Schéma à multiplexage temporel de résolution d'interblocage dans l'arbitrage distribué - Google Patents

Schéma à multiplexage temporel de résolution d'interblocage dans l'arbitrage distribué Download PDF

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Publication number
EP0886218A3
EP0886218A3 EP98300659A EP98300659A EP0886218A3 EP 0886218 A3 EP0886218 A3 EP 0886218A3 EP 98300659 A EP98300659 A EP 98300659A EP 98300659 A EP98300659 A EP 98300659A EP 0886218 A3 EP0886218 A3 EP 0886218A3
Authority
EP
European Patent Office
Prior art keywords
bus
time multiplexed
clock signal
distributed arbitration
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP98300659A
Other languages
German (de)
English (en)
Other versions
EP0886218A2 (fr
EP0886218B1 (fr
Inventor
Jiu An
Shashank Merchant
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of EP0886218A2 publication Critical patent/EP0886218A2/fr
Publication of EP0886218A3 publication Critical patent/EP0886218A3/fr
Application granted granted Critical
Publication of EP0886218B1 publication Critical patent/EP0886218B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
EP98300659A 1997-06-19 1998-01-29 Schéma à multiplexage temporel de résolution d'interblocage dans l'arbitrage distribué Expired - Lifetime EP0886218B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US879202 1997-06-19
US08/879,202 US6061361A (en) 1997-06-19 1997-06-19 Time multiplexed scheme for deadlock resolution in distributed arbitration

Publications (3)

Publication Number Publication Date
EP0886218A2 EP0886218A2 (fr) 1998-12-23
EP0886218A3 true EP0886218A3 (fr) 2003-04-09
EP0886218B1 EP0886218B1 (fr) 2004-12-01

Family

ID=25373631

Family Applications (1)

Application Number Title Priority Date Filing Date
EP98300659A Expired - Lifetime EP0886218B1 (fr) 1997-06-19 1998-01-29 Schéma à multiplexage temporel de résolution d'interblocage dans l'arbitrage distribué

Country Status (4)

Country Link
US (1) US6061361A (fr)
EP (1) EP0886218B1 (fr)
JP (1) JP4625549B2 (fr)
DE (1) DE69827879T2 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6738845B1 (en) * 1999-11-05 2004-05-18 Analog Devices, Inc. Bus architecture and shared bus arbitration method for a communication device
DE19961124A1 (de) * 1999-12-17 2001-06-21 Infineon Technologies Ag Schnittstelle
US6778548B1 (en) * 2000-06-26 2004-08-17 Intel Corporation Device to receive, buffer, and transmit packets of data in a packet switching network
US7035277B1 (en) * 2000-08-31 2006-04-25 Cisco Technology, Inc. Priority-based arbitration system for context switching applications
ES2405354T3 (es) 2006-02-20 2013-05-30 Robert Bosch Gmbh Dispositivo de detección de obstrucción
FR3087982B1 (fr) * 2018-10-31 2020-12-04 Commissariat Energie Atomique Procede et circuit de multiplexage temporel d'acces concurrents a une ressource informatique
TWI739556B (zh) * 2020-08-19 2021-09-11 瑞昱半導體股份有限公司 時脈死結檢測系統、方法以及非暫態電腦可讀取媒體

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0399204A1 (fr) * 1989-04-24 1990-11-28 BULL HN INFORMATION SYSTEMS ITALIA S.p.A. Système informatique avec double arbitre par contrôler l'accès au bus de système
EP0774717A1 (fr) * 1995-11-06 1997-05-21 Sun Microsystems, Inc. Dispositif et méthode pour réaliser un interfaçage générique entre un système hÔte et un bloc fonctionnel d'ATM-noyau

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3464799B2 (ja) * 1993-03-12 2003-11-10 モトローラ・インコーポレーテッド パケット伝送システムにおける競合および資源の不適当な割当ての可能性を低減する方法および装置
US5713025A (en) * 1993-10-21 1998-01-27 Sun Microsystems, Inc. Asynchronous arbiter using multiple arbiter elements to enhance speed
US5787265A (en) * 1995-09-28 1998-07-28 Emc Corporation Bus arbitration system having a pair of logic networks to control data transfer between a memory and a pair of buses
US5797018A (en) * 1995-12-07 1998-08-18 Compaq Computer Corporation Apparatus and method of preventing a deadlock condition in a computer system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0399204A1 (fr) * 1989-04-24 1990-11-28 BULL HN INFORMATION SYSTEMS ITALIA S.p.A. Système informatique avec double arbitre par contrôler l'accès au bus de système
EP0774717A1 (fr) * 1995-11-06 1997-05-21 Sun Microsystems, Inc. Dispositif et méthode pour réaliser un interfaçage générique entre un système hÔte et un bloc fonctionnel d'ATM-noyau

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"TIME-DIVISION MULTIPLEXED BUS ARBITRATION", IBM TECHNICAL DISCLOSURE BULLETIN, IBM CORP. NEW YORK, US, VOL. 35, NR. 3, PAGE(S) 317-318, 1998-08-03, ISSN: 0018-8689, XP000326280 *

Also Published As

Publication number Publication date
JP4625549B2 (ja) 2011-02-02
EP0886218A2 (fr) 1998-12-23
JPH1125036A (ja) 1999-01-29
US6061361A (en) 2000-05-09
EP0886218B1 (fr) 2004-12-01
DE69827879D1 (de) 2005-01-05
DE69827879T2 (de) 2005-11-03

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