EP0807330A2 - Circuit a courant non recurrent - Google Patents

Circuit a courant non recurrent

Info

Publication number
EP0807330A2
EP0807330A2 EP96935292A EP96935292A EP0807330A2 EP 0807330 A2 EP0807330 A2 EP 0807330A2 EP 96935292 A EP96935292 A EP 96935292A EP 96935292 A EP96935292 A EP 96935292A EP 0807330 A2 EP0807330 A2 EP 0807330A2
Authority
EP
European Patent Office
Prior art keywords
transistor
electrode coupled
coupled
current
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP96935292A
Other languages
German (de)
English (en)
Other versions
EP0807330B1 (fr
Inventor
Brian C. Martin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV, Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of EP0807330A2 publication Critical patent/EP0807330A2/fr
Application granted granted Critical
Publication of EP0807330B1 publication Critical patent/EP0807330B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/34—DC amplifiers in which all stages are DC-coupled
    • H03F3/343—DC amplifiers in which all stages are DC-coupled with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/34—DC amplifiers in which all stages are DC-coupled
    • H03F3/343—DC amplifiers in which all stages are DC-coupled with semiconductor devices only
    • H03F3/345—DC amplifiers in which all stages are DC-coupled with semiconductor devices only with field-effect devices

Definitions

  • the invention is directed to a current one-shot circuit and more particularly to a BiCMOS current one-shot circuit.
  • a conventional current one-shot circuit is shown in FIG. 1.
  • Current one-shot circuit 10 includes an input terminal 12, a capacitor Cl , a resistor Rl , and a bipolar transistor Ql .
  • the collector of transistor Ql is coupled to a first supply voltage V cc and the emitter of transistor Ql is coupled to a second supply voltage 14, for example, ground.
  • Resistor Rl is coupled in series with a capacitor Cl between second supply voltage 14 and the base of transistor Ql .
  • Capacitor Cl is coupled between resistor Rl and an input voltage terminal 10. Under static conditions, the base of transistor Ql is held to ground through resistor Rl .
  • transistor Ql when an input voltage, V ⁇ n , makes a low-to high transition, the base voltage of transistor Ql is pulled up through capacitor Cl . If Vin rises far enough and fast enough so that the base of Ql is pulled up to about 0.7 volts, transistor Ql turns on and pulls current through its collector. Transistor Ql remains on until resistor Rl discharges the base voltage below about 0.7 volts. Accordingly, transistor Ql provides a current "one-shot" during each low-to-high transition of V in .
  • the RC time constant which controls the duration of the current one-shot is not linear.
  • the relationship of the current duration to the input voltage is an inverse non ⁇ linear relationship whereby a shorter edge rate causes a longer one-shot duration.
  • the RC based current one-shot circuit requires a significant amount of silicon. Accordingly, it is desirable to provide a current one-shot circuit which requires less silicon and varies linearly with the input signal.
  • a current one-shot circuit which proportionally tracks the input voltage. It is a preferred embodiment of the invention, a current one-shot is provided which includes an MOS transistor network to selectively provide a current path between the input terminal and the base of a bipolar transistor in order to selectively conduct current through the bipolar transistor. Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
  • FIG. 1 shows a current one-shot circuit in accordance with the prior art
  • FIG. 2 shows a current one-shot circuit in accordance with a first embodiment of the invention
  • FIG. 3 shows a current one-shot circuit in accordance with a second embodiment of the invention
  • FIG. 4 shows show a current one-shot circuit in accordance with a third embodiment of the invention
  • FIG. 5 shows a current one-shot circuit in accordance with a fourth embodiment of the invention.
  • FIG. 6 shows a current one-shot circuit in accordance with a fifth embodiment of the invention.
  • FIG. 2 shows a current one-shot circuit 200.
  • One shot circuit 200 includes an input terminal 202, an inverter U l , NMOS transistors Nl and N2 and a bipolar transistor Q2.
  • Input terminal 202 is coupled to an input of inverter Ul and a control electrode of transistor N2.
  • Transistor Nl has a first conducting electrode coupled to input terminal 202, a second conducting electrode coupled to the base of transistor Q2 and a control electrode coupled to an output of inverter Ul .
  • Transistor N2 has a first conducting electrode coupled to the base of transistor Q2 and a second conducting electrode coupled to a second supply voltage 214, for example, ground.
  • Transistor Q2 has an emitter coupled to second supply voltage 214 and a collector coupled to an output terminal 216.
  • V ⁇ n In a static environment when V ⁇ n is either high or low, the base of transistor Q2 is discharged to ground via transistors N2 and Nl, respectively.
  • V ⁇ n When V ⁇ n is high, transistor Nl is off, the output of inverter Ul is low and transistor N2 is on.
  • V ⁇ n is at a logic low level, transistor Nl is on, the output of inverter Ul is high and transistor N2 is off.
  • V ⁇ n undergoes a low-to-high transition, transistor Nl provides a conductive path from input terminal 202 to the base of transistor Q2.
  • transistor Q2 When V ⁇ n equals about 0.7 volts, transistor Q2 begins to turn on and the voltage at the base of transistor Q2 is clamped a diode drop above ground. As V ⁇ n continues its low-to-high transition, both transistors Nl and N2 (which starts to turn on as soon as V ⁇ n exceeds the NMOS threshold voltage) conduct more current.
  • the sizing of transistors Nl and N2 is set so that the desired proportion of current enters the base of Q2. In a preferred embodiment, transistor Nl is generally larger than transistor N2.
  • Current one- shot circuit 300 operates during the high-to-low transition of V ⁇ n .
  • Current one-shot circuit 300 includes an input terminal 302, PMOS transistors Pl and P2, an inverter U2 and a bipolar transistor Q3.
  • Input terminal 302 is coupled to an input of an inverter U2 and to the control electrode of transistor Pl .
  • Transistor Pl has a first conducting electrode coupled to a first supply voltage V cc and a second conducting electrode coupled to the base of transistor Q3.
  • Transistor P2 has a first conducting electrode coupled to the base of transistor Q3, a second conducting electrode coupled to input terminal 302.
  • Transistor Q3 has an emitter coupled to first supply voltage V cc and a collector coupled to an output terminal 316.
  • V ⁇ n In a static environment, when V ⁇ n is either low or high, the base of transistor Q3 is held to V cc and is off. When V ⁇ n is high, transistor Pl is off, the output of inverter U2 is low and transistor P2 is on causing the input voltage V ⁇ n to appear at the base of transistor Q2. When V ⁇ n is low, transistor Pl is on, the output of inverter U2 is high and transistor P2 is off, thus causing V cc to appear at the base of transistor Q3.
  • transistor P2 When V ⁇ n begins a high-to-low transition, transistor P2 provides a conductive path between the input terminal 302 and the base of transistor Q3.
  • transistors Pl and P2 continue to conduct more current since transistor Pl begins turns on when V in falls below its threshold voltage.
  • the output of inverter U2 goes high, turning off transistor P2.
  • Transistor Pl turns remains on, discharging the base of transistor Q3 to V cc , turning transistor Q3 off.
  • transistor Q3 produces a one-shot current.
  • FIG. 4 shows a current one-shot circuit in accordance with a third embodiment of the invention.
  • Current one-shot circuit 400 is essentially the same circuit as that of Fig. 2 except that a resistor R2 is substituted for transistor N2 to provide the base pull-off of transistor Q3.
  • Fig. 5 shows a current one-shot circuit 500 which is essentially the same circuit as that shown in Fig. 2 except that the control electrode of transistor N2 is coupled directly to first supply voltage V cc to provide the base pull-off of Q3.
  • FIG. 6 shows a current one-shot circuit 600 which is similar to the one-shot circuit shown in FIG. 2 except that the control electrode of transistor Nl is coupled to an external voltage terminal 610 for receiving external voltage signal V ext .

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Amplifiers (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

L'invention concerne un circuit à courant non récurrent qui génère un courant pendant une période souhaitée, la période souhaitée étant inversement proportionnelle à la vitesse de montée du signal d'entrée. Le circuit comprend un dispositif de transistor MOS conduisant sélectivement le courant entre une borne d'entrée et un circuit générant un courant. Le circuit générant le courant peut être un transistor bipolaire ayant sa base couplée à la borne d'entrée et un trajet de courant principal entre une sortie du circuit et une tension d'alimentation.
EP96935292A 1995-11-30 1996-11-20 Circuit a courant non recurrent Expired - Lifetime EP0807330B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US56569695A 1995-11-30 1995-11-30
US565696 1995-11-30
PCT/IB1996/001261 WO1997020384A2 (fr) 1995-11-30 1996-11-20 Circuit a courant non recurrent

Publications (2)

Publication Number Publication Date
EP0807330A2 true EP0807330A2 (fr) 1997-11-19
EP0807330B1 EP0807330B1 (fr) 2001-10-10

Family

ID=24259729

Family Applications (1)

Application Number Title Priority Date Filing Date
EP96935292A Expired - Lifetime EP0807330B1 (fr) 1995-11-30 1996-11-20 Circuit a courant non recurrent

Country Status (5)

Country Link
US (1) US5793237A (fr)
EP (1) EP0807330B1 (fr)
KR (1) KR100452176B1 (fr)
DE (1) DE69615820T2 (fr)
WO (1) WO1997020384A2 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW358283B (en) * 1996-06-26 1999-05-11 Oki Electric Ind Co Ltd Remote testing device
US6294959B1 (en) 1999-11-12 2001-09-25 Macmillan Bruce E. Circuit that operates in a manner substantially complementary to an amplifying device included therein and apparatus incorporating same

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3646370A (en) * 1970-07-06 1972-02-29 Honeywell Inc Stabilized monostable delay multivibrator or one-shot apparatus
US3711729A (en) * 1971-08-04 1973-01-16 Burroughs Corp Monostable multivibrator having output pulses dependent upon input pulse widths
US3968449A (en) * 1974-12-16 1976-07-06 Ncr Corporation Rate compensating monostable multivibrator
JPS54156529A (en) * 1978-05-31 1979-12-10 Nippon Chemical Ind Camera power supply circuit
JPS57104317A (en) * 1980-12-19 1982-06-29 Nec Corp Pulse delay circuit
US4333047A (en) * 1981-04-06 1982-06-01 Precision Monolithics, Inc. Starting circuit with precise turn-off
JPH0693626B2 (ja) * 1983-07-25 1994-11-16 株式会社日立製作所 半導体集積回路装置
JPS6184112A (ja) * 1984-10-02 1986-04-28 Fujitsu Ltd 論理ゲ−ト回路
US4629908A (en) * 1985-02-19 1986-12-16 Standard Microsystems Corp. MOS monostable multivibrator
FR2656455B1 (fr) * 1989-12-21 1992-03-13 Bull Sa Circuit de precharge d'un bus de memoire.
US5218239A (en) * 1991-10-03 1993-06-08 National Semiconductor Corporation Selectable edge rate cmos output buffer circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9720384A2 *

Also Published As

Publication number Publication date
WO1997020384A3 (fr) 1997-07-31
KR100452176B1 (ko) 2005-01-05
KR19980701930A (ko) 1998-06-25
WO1997020384A2 (fr) 1997-06-05
US5793237A (en) 1998-08-11
DE69615820T2 (de) 2002-04-11
EP0807330B1 (fr) 2001-10-10
DE69615820D1 (de) 2001-11-15

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