EP0729678A1

EP0729678A1 - Process and device for speech scrambling and unscrambling in speech transmission

Info

Publication number: EP0729678A1
Application number: EP95900687A
Authority: EP
Inventors: Wolfram Busching; Erhard Schlenker; Günter SPAHLINGER
Original assignee: Litef GmbH
Current assignee: Northrop Grumman Litef GmbH
Priority date: 1993-11-19
Filing date: 1994-11-09
Publication date: 1996-09-04
Anticipated expiration: 2014-11-09
Also published as: SG54159A1; KR960706244A; FI962106A0; EP0729678B1; HUT74262A; FI962106A; WO1995015627A1; JPH09501291A; ZA949167B; AU8141394A; DE59406692D1; CZ143896A3; SK63096A3; RU2118059C1; PL314289A1; DE4339464C2; US5778073A; ATE169787T1; HU9601333D0; TW252241B

Abstract

PCT No. PCT/EP94/03693 Sec. 371 Date May 14, 1996 Sec. 102(e) Date May 14, 1996 PCT Filed Nov. 9, 1994 PCT Pub. No. WO95/15627 PCT Pub. Date Jun. 8, 1995A digitized real voice signal is converted via complex filtering into a complex signal that is subjected to sampling rate reduction, the bandwidth of the respective complex filter corresponding to the sampling rate. The complex signal is phase-modulated by means of a code signal generated by a random-number generator and additively combined with a pilot signal (likewise phase-modulated in a random distribution) to form an encrypted useful signal for transmission. The useful signal is sequentially transmitted together with a preamble for synchronization and signal equalization at the receiver end. At the receiver end, clock synchronization is forced for a phase-modulated pilot signal produced at the receiver end and equalizer coefficients for an equalizer at the receiver end are calculated from the digitized received signal after complex filtering and corresponding sampling rate reduction, during a preamble recognition phase, at which point the phase of the useful signal decryption is initialized. The encrypted, transmitted signal is separated from its phase-modulated pilot signal, which is superimposed at the transmitter end, by linking to the synchronized pilot signal, which is produced at the receiver end, and the phase-modulated, encrypted digital speech signal thus obtained is subsequently decomposed by the code signal produced at the receiving end and clockcontrolled by the preamble.

Description

Method and device for disguising and unveiling speech during speech transmission

description

The invention relates to a method and a device for speech concealment and unveiling during speech transmission or in devices for speech transmission which, on the one hand, and / or for digitizing a, with a front end unit for digitizing a speech signal and adapting a transmission signal to a predetermined transmission channel Reception signals and on the other hand are equipped to adapt the processed reception signal to a speech reproduction device.

Regarding the state of the art in speech obfuscation or unveiling, reference is made to the following known, keyword-based methods:

1. Digitization of the speech signals, encryption of the digital values and transmission as digital data with a MODEM.

2. Storage of a sequence of the speech signal, division of the sequence into several smaller time intervals, transmission of these partial - -

Sequences in a different order than the original.

3. Subdivision of the spectral range to be transmitted into smaller subregions, transmission of a signal which is produced by interchanging spectral subregions.

4. Frequency band inversion, i.e. Exchange of high and low frequencies of the low-frequency spectrum to be transmitted with a fixed or variable split point (image frequency method).

5. Combination of procedures 2 to 4

The known methods have the following basic disadvantages:

Ad 1.) The same channels are generally used for the transmission of the digital data as for the unveiled language. Since these channels only provide a limited bandwidth, data reduction methods are necessary. After this (reduced) data has been reconstructed on the receiving side, it is not possible to reliably identify the speaker.

Ad 2.) For physiological reasons, the number and temporal length of the partial intervals can only be changed within narrow limits. This leads to a simple decipherability of the transmitted signal.

The transitions between interchanged subintervals cannot generally be reconstructed on the reception side in a phase-pure manner, so that a reduction in the signal quality can be achieved compared to the unveiled signal.

Basically, there is a perceptible delay between speaking and signal transmission in this method, which leads to disruptive echo effects for the speaker in certain types of transmission channels.

Ad 3.) For physiological reasons, the number and bandwidth of the spectral subintervals are strictly limited. This leads to a simple decipherability of the transmitted signal. Unavoidable bandwidth overlaps of the filters required for generating and reconstructing the partial spectra lead to a deterioration in the Transmission quality.

Ad 4.) Decryption of the transmitted signal is possible with relatively little technical effort. The residual intelligibility of the skewed signal is high; trained listeners can also listen to broadcasts without technical aids.

5.) Combinations of the different methods generally increase security against decryption; however, they also lead to a summation of the disadvantageous properties, such as a deterioration in the signal-to-noise ratio and limitation to a few simple constellations of transmission channels.

The invention is therefore based on the object of providing a method and a device for disguising and unveiling speech during speech transmission which can be produced in a compact design as a module (which can also be retrofitted) and which is one compared to the known methods and devices Ensure significantly better security against interception and evaluation by third parties.

In connection with this task, the following additional requirements are imposed on the language concealment:

High intelligibility; - Good speaker recognition;

Little difference in quality compared to clear operation;

Function and usability largely transparent to the user;

Automatic detection of hidden signals on the receiving side;

Usability in analog radio networks and in the telephone area,

Compliance with the available predetermined

Transmission bandwidths. -f ^™

The method according to the invention for disguising and unveiling speech during speech transmission is characterized in that it is on the transmission side

the digitized speech signal is converted by a first complex input filter with a bandwidth that corresponds to the bandwidth of the transmission channel into a complex signal that is phase-modulated by means of a key signal controlled by pseudo random numbers,

additively combining the phase-modulated speech signal with a pilot signal likewise phase-modulated in pseudo-random distribution to form a veiled useful signal to be transmitted, and

- The useful signal in a sequential sequence, together with a preamble serving for receiver-side synchronization and useful signal equalization, passes through a first complex output filter as a complex signal, which generates a real output signal, which after digital-to-analog conversion is output to a transmit signal processor, and that on the receiver side

the digitized received signal is converted into a complex signal by a second complex input filter with a bandwidth that corresponds to the bandwidth of the transition channel,

from this complex signal during a preamble detection phase, on the one hand, a clock synchronization for a pilot signal generated in the pseudo-random distribution initialized by the preamble is forced, and, on the other hand, equalizer coefficients for a receiver-side equalizer are calculated and then the phase of the useful signal unveiling is initialized,

- the veiled ^' useful signal is separated from its phase-modulated pilot signal superimposed on the transmitter side by linking to the synchronized pilot signal generated on the receiver side, and

- The phase-modulated, veiled digital voice signal obtained in this way is unveiled by inverse phase modulation by means of the key signal generated by the receiver and clock-controlled by the preamble, and as a complex signal passes through a second complex output filter, which generates a real output signal, which is digital Is given to a received signal processing. One aspect that is essential for the method according to the invention is that after the input-side digitization, both the transmission and the reception-side, complex filtering, preferably using a Hilbert filter, is carried out, which generates a complex signal from a real one, which is subject to a reduction in the sampling rate fen, the bandwidth of the respective complex filter corresponding to the reduced sampling rate. All operations essential for the further process then take place with the complex signals at a reduced clock frequency.

On the output side, the complex signal is preferably subjected to a sampling rate increase by inserting zeros into the data stream on both the transmitting and receiving sides. A subsequent complex filter, preferably also a Hilbert filter, serves as an interpolation filter and generates a real signal with a sampling frequency corresponding to the channel bandwidth.

A device according to the invention for speech concealment and unveiling in devices for speech transmission, which, on the one hand, has a front-end unit for digitizing a speech signal and adapting a transmit signal to a predetermined transmission channel and / or for digitizing a received signal and for adapting the processed received signal to a speech ¬ on the other hand, is characterized in that a key generator controlled by a (pseudo) random number generator acts on the transmission side of a digital phase modulator which phase modulates the digitized speech signal, - the phase-modulated speech signal with a one supplied by a pilot signal generator, also in Random distribution phase-modulated pilot signal is combined to form a useful signal, a preamble generator generates a preamble which serves for receiver-side synchronization and useful signal equalization and which via an actuated in a defined clock sequence switch is sequentially output signal processing together with the 'useful signal to the front-end unit for transmitting, and that emfangsseitig a digital equalizing filter for equalization of the mission channel caused by the distortion of the digitized reception Über¬ -b-

Signal is present, the equalizer coefficient during the

When the preamble is received and calculated, a device is provided for detecting the preamble within the received useful signal, which, depending on a specified section of the preamble, triggers the calculation of the equalizer coefficients in a higher-level computing unit for the equalizer filter and then initializes the unveiling of the useful signal by activating a clock synchronization device which, on the one hand, from the received, demodulated pilot signal by complex multiplication with one generated on the receiving side

Pilot signal a control signal for sampling clock correction and, on the other hand, under the control of a (pseudo) random number generator likewise initialized with the clock synchronization, delivers a phase-modulated pilot signal from the pilot signal supplied by the reception-side pilot signal generator via a modulator, which is linked to the equalized useful signal and then as a phase-modulated one Speech signal in a phase demodulator under the control of the synchronized, receiving-side random number generator is converted into the unmodulated, digital speech signal which is emitted to the front end unit for conversion into an audible signal.

Advantageous additions and further development of the method according to the invention and the device for speech concealment and unveiling are contained in dependent patent claims and will become apparent to the expert reader in the further course of the description of the invention, in particular also on the basis of exemplary embodiments with reference to Drawings, the indications, block names and the like of which are to be evaluated as a disclosure essential to the invention as well as the present description.

Show it:

1 shows the block diagram of a speech concealment / unveiling module according to the invention, hereinafter referred to as "SV module";

2 shows the principle of obfuscation with an arbitrarily chosen course of time; 3 shows the functional block diagram of the transmitting part of the SV module;

4 shows the principle of unveiling, again without claiming the right time scale;

5 shows the functional block diagram of the receiving section of the SV module;

6 shows the block diagram of the signal processing on the transmission side of the SV module;

7 shows the structure of an input-side (first) complex filter, preferably a Hilbert filter:

8 shows the frequency response of the input-side (first) complex filter according to FIG. 7;

9 shows the structure of a first complex output filter, preferably a Hilbert filter in the transmission part of the SV module;

10 shows the frequency response of the first complex output filter according to FIG. 9;

11 shows the block diagram of the reception-side signal processing in the preamble detection phase (clear position);

12 shows the block diagram of the reception-side signal processing in the unveiling phase;

13 shows an operating and functional flow diagram for the transmitter-side signal processing according to the block diagram of FIG. 6; and

14 shows an operating and functional sequence program for the reception-side signal processing according to the block diagrams of FIGS. 12 and 12.

In order to facilitate understanding, an exemplary embodiment of an SV module according to the invention with regard to its circuit structure and / or its mode of operation is subsequently described in several individual sections. cuts described:

1. Circuit description of the SV module

The SV module essentially consists of a powerful, digital signal processor system and the peripheral components required for operation, combined with modern signal processing algorithms. The block diagram shown in FIG. 1 shows the components and assemblies important for digital signal processing. Functions such as power supply, clock generation, discrete inputs and analog input and output stages are not shown for the sake of clarity.

The structure of the SV module according to FIG. 1 corresponds to a realized and functional prototype, which is still used in part to test and further improve the algorithm development. A targeted version of the series can itself be found in the block diagram representation. The description of this embodiment is by no means to be understood as the only possible embodiment of the invention. Rather - as can be recognized by the person skilled in the art - many modifications and changes are possible in all subareas and assemblies, both on the transmitter and receiver side, without leaving the scope of the technical teaching conveyed here.

The essential signal processing unit is a signal processor 1, in which the processor type ADSP 21msp55 from Analog Devices is used, at least in the prototype version. This signal processor 1 already contains an AD converter 2 and a DA converter 3 with a resolution of 16 bits, for example, at a sampling rate of 8 kHz. Furthermore, separate RAM areas 2, 3 for data on the one hand (lk x 16) and program (2k x 24) on the other hand are integrated. The internal memory organization corresponds to the Harvard architecture, so that data access is possible in every command cycle in addition to the op code fetch. Without exception, all processor operations require one cycle. This means that a processing capacity of 13 MIPS (integer) is available.

A mask-programmed variant of this processor (ADSP21msp56) is provided for series production and will additionally have a 2k x 24 bit ROM 6 on the program memory side. - <. -

A further pair of AD / DA converters 8.9 is required for duplex operation. This is implemented by a converter module 7 of the type AD28msp02, which contains the converters identical to the signal processor 1 in a separate housing. The data transmission between the converter module 7 and the signal processor 1 takes place via fast serial interfaces.

An EEPROM 10 is present as external memory, which stores loadable program parts as well as variables that are seldom to be changed, such as the key (further explanation below). The memory size here is 8k x 8 (series) or 32k x 8 (prototype) as indicated in FIG. 1.

The state of a speech button, a squelch logic of a radio 11 and a crypt ON / OFF switch can be queried by the signal processor 1 on discrete input signals (not shown).

The operating sequence, which will be discussed in more detail in connection with signal processing, can be briefly described as follows: After the operating voltage has been applied, a RESET signal of a few milliseconds is first generated. Then the signal processor 1 loads its internal program RAM 5 with the content of the external EEPROM 10 and starts the program. In the currently tested prototype of the SV module, the entire program required at a certain time must first be accommodated in this RAM (2x instructions). In the series configuration of the SV module already indicated in FIG. 1, 2k instructions are additionally available in the ROM 6.

The external EEPROM 10 can also be addressed as a data memory in order to be able to read and change variable parameters, such as the key.

The program flow is structured in time by interrupts of the analog interfaces, which run freely with their specified conversion rate of 8 kHz and which trigger an interrupt each time the conversion has taken place.

2. The signal processing

All functions of the SV module are implemented by digital signal processing. - / o -

The principle of signal processing is first explained.

3 shows the functional block diagram of the transmission part of the SV module:

On the transmission side, a key signal is generated in a key signal generator 23, with the aid of which the input signal of the microphone, i.e. the speech signal is obscured. When a PTT button (not shown) is pressed, a so-called preamble generated in a preamble generator 24 is transmitted immediately before the veiled speech signal, which is illustrated by the three time-related partial diagrams in FIG. 2.

The preamble is required for the synchronization of a further key signal generator 43 (cf. FIG. 5) and the setting of an equalizer 40 on the receiving side.

If an intrusion into an ongoing conversation is to be made possible, the preamble is sent out periodically in a fixed time grid, with the prototype currently being tested every 5 seconds. The shifted voice signal is hidden for the duration of the preamble (currently approx. 200 ms).

A pilot signal generator 20 supplies a special pilot signal which is additively linked to the disguised speech signal and which is used on the receiving side for synchronizing the sampling clock, as explained in more detail below. The front-end unit 22a / 22b shown in two sub-blocks takes care of the pre-processing of the analog input signal and conversion into a digital signal or the final processing of the encrypted voice signal on the transmission side and adaptation to the respective transmission device or the transmission channel. Further details are explained below.

The beginning of a veiled transmission signal is - as can be seen in FIG. 4 - characterized by the preamble. For this reason, the reception signal is always analyzed on the reception side when the receiver is not in the unveiling mode. During this phase, the received signal is looped through the SV module unchanged. If the end of a preamble is recognized, the unveiling process is started with this recognition, ie the key generator 43 on the receiving side is started and the incoming useful signal is unveiled ("speech signal" in Fig. 4).

5 shows the functional block diagram of the receiving part of the SV module. The received signal is fed to a function block 44, the function of which is to recognize and analyze the received signal. If a preamble is received, the properties of the transmission channel and, therefrom, filter coefficients for an equalizer 51 at the receiving end are determined on the basis of this.

If the end of the preamble is detected, then an equalizer adapted to the transmission channel is available. Regarding the details of such an initial synchronization and adaptation of a reception filter of a digital receiver, reference is made to the document DE-Cl-1 08 806 (Ref. (4)). At the same time, the reception-side key generator 43 is started to uncover the useful signal. The sampling synchronization 55 evaluates the Pilto signal superimposed on the useful signal and separates it from the useful signal. The unveiled useful signal is then output.

Further details are shown in the following detailed description of the sending and receiving sides.

Fig. 6 shows a detailed block diagram of the signal processing on the transmission side in the case of obfuscation. The individual function blocks are described in more detail in the following subsections. All signal processing functions, which are illustrated verbally in the flowchart in FIG. 13, are implemented with the aid of one signal processor 1 (cf. FIG. 1). The double lines and arrows in FIG. 6 are intended to identify analytical signals. Real signals are represented by simple lines and arrows.

There are basically three types of signal processing: First, analog signal processing in the analog front end 22, digital signal processing in 8 kHz cycles and digital signal processing in 2,667 kHz (8/3 kHz) cycles. For the representation in Fig. 6, the corresponding. Differentiate signals by the parameter designations t = analog, v = digital, 8 kHz cycle and n = digital, 2,667 kHz cycle. - / 2-

Plain text operation is realized by a simple feedback on the digital side of the analog front end 22.

It should be emphasized at this point that the area of application of the current prototype of an SV module according to the invention can be seen in today's analog transmission channels.

The input-side analog front-end unit 22 has the task of level adjustment, sampling the analog input signal c (t), and converting it into a digital signal c (t>).

The A / D converter part of the analog front end 22 (not shown in detail) consists of two analog input amplifiers and an A / D converter.

The following specifications apply to the A / D converter part of the analog front end 22 in the tried and tested prototype of the SV module:

Sampling frequency: 8 kHz

Word length: 16 bits

Decimation filter

Passband: 0 to 3.7 kHz

Ripple: ± 0.2 dB

Attenuation: 65 dB

With regard to further details on the structure and function of the analog front end 22, reference is made to the literature references Ref. [1] and Ref. [2] given in the appendix, the content of which may be used for further explanation.

The digitized input signal c (v) acts on a first complex input filter 30 to suppress the lower sideband. This filter 30 also ensures that the bandwidth of the input signal (digitized voice signal) is limited to a bandwidth that corresponds to that of the transmission channel, ie 2,667 kHz in the present exemplary embodiment. The complex first input filter 30 generates a complex output signal consisting of real and imaginary parts from a real input signal, with any real or imaginary part between any -ft-

Frequency there is a phase shift of 90 ° (analytical signal). At the same time, spectral components outside the usable bandwidth of the transmission channel are suppressed. Preferably, and in the tried and tested embodiment of the invention, the first complex input filter (as well as the complex input filter on the receiving side; see below) is a higher-order Hilbert filter.

This first Hilbert filter 30 on the input side is a recursive filter, the transfer function of which

16

H (.z) - -η (1)

Σ *, - z-

/ -o is given. The structure of this filter is illustrated by FIG. 7.

As mentioned, the input signal of this Hilbert filter 30 is the sampled, real received signal c (v). The recursive part of this filter has only real ones

Coefficients b _j , so that only real operations are required here.

The transverse part has complex coefficients aj.

The design of this first Hilbert filter 30 is based on the design of an elliptical low-pass filter. The low pass is converted into a Hilbert band pass by a transformation in the frequency domain.

The frequency response of the Hilbert filter 30 implemented in the prototype of the invention is shown in FIG. 8.

The band-limited output signal d (v) of the first complex input filter (Hilbert filter) acts on a function block designated as sampling rate reduction 31, in which the sampling clock by a certain, preferably integer factor, in the present exemplary embodiment by a factor of 3 to 2,667 kHέ is reduced. A suitable dimensioning of the first Hilbert filter 30 on the input side ensures that no aliasing effects occur. -l + -

The combination of Hilbert filter 30 and sampling reduction 31 means that any frequency band with a bandwidth of 2,667 kHz can contain the complete useful information.

In principle, only every third output value of the input signal c (v) of the Hilbert filter 30 is processed to reduce the sampling rate. In practice, this is achieved in that the transverse part of the Hilbert filter 30 is operated at 8/3 kHz. This means that the filter output values are calculated and processed only with every third cycle of the 8 kHz sampling cycle.

The pilot signal generator 20 is used to generate a pilot signal q (n) which is used on the receiving side for clock tracking. The pilot signal arises from the phase modulation of the pilot signal described below.

The (pseudo) random number generator 34 (cf. FIG. 6) as part of the key signal generator 23 has the task of generating equally distributed numbers in the range from 1 to 64, for example. These numbers are used to select random values from a field of 64 complex values (cf. block "data record" in FIG. 6). Two key signals z _s (n), z _p (n) are generated from the selected values, one of which (z _s (n)) for

Phase modulation of the useful signal and the second (Zp (n)) is used to generate the pilot signal q (n).

The random number generator 34 implemented in the current embodiment of the invention is based on the linear congruence method. The random values r (n) are according to the regulation

r (n) = (a • r (n - 1) + c) mod m n = 1,2, ... (2)

calculated. The starting value r (0) is generally unimportant, since with a suitable choice of the constant values a and c, all m possible values are generated before the random sequence is repeated. The random numbers generated are equally distributed in the range from 0 to (m-1).

In the tested embodiment, m = 2 ^{32 was} chosen. A long sequence can be created with this. In addition, the modulo function of equation (2) can then be implemented with little effort using the signal processor 1. -tr-

The constants were chosen to be a = 1664525 and c = 32767 according to Knuth's rules (cf. Ref. [6]).

In order to obtain equally distributed random numbers between 1 and 64, it is sufficient to consider 6 bits of the respective random value r (n) and to use them further as a random number. In the current embodiment, 6 bits are used to generate random numbers for "scrambling" (the phase modulation) of the useful signal x (n) and 6 bits are used to generate random numbers for "scrambling" (the phase modulation) of the pilot tone p (n). used. The random number generator 34 thus delivers two random numbers r _s (n) and r _p (n) in each cycle.

After each transmission of a preamble, the random number generator 34 is reinitialized with a fixed starting value x {0).

The control values for the phase modulators 32 and 33 are represented by a data set of 64 complex values. Values are selected from this set by the random number generator 34, and a random signal for phase modulation is thus generated.

The 64 complex values are used as the data record

_α . ₌ eJ2πi / 64 _{i = l f2 64 (} 3 ₎

used. The control or input values z _s (n) and z _p (n) ^' all have them

Amplitude "1", but have different phases. The random number-controlled phase modulators 32, 33 are explained in more detail below.

In the transmission part of the SV module (FIG. 6), two phase modulator units 32 and 33 are required. A phase modulator 33 is required for concealing the useful signal x (n) by a key signal z _s (n) supplied by the random number generator 34. The other phase modulator 32 is used to generate the pilot signal q (n) from the pilot tone p (n) supplied by the pilot tone generator using the other key signal z _p (n). Since the

Key signals z _s (n), z _p (n) random sequences of complex values with the same

Amplitude, but different phases, each phase modulator 32, 33 performs a complex multiplication of the respective input signal -fe-

value with the respective key signal value.

If, as illustrated in FIG. 6, the signal values of the analytical filter output signal are denoted by x (n) and the signal values of the associated key signal by z _s (n), the following applies to the signal values of the phase-modulated useful signal:

y (n) = x (n) • z _s (n) (4)

The phase-modulated useful signal y (n) has a noise signal-like character. The information contained in the useful signal is completely distributed over a frequency band of 2,667 kHz width.

It should be mentioned at this point that the phase modulation according to the invention bears a certain similarity to a 64-stage PSK modulation as used in digital transmission technology. In the present case, however, the purpose is completely different: In digital data transmission with PSK modulation, the phase of a carrier signal is switched in the sampling cycle (phase shift keying). The phase of the carrier signal thus contains the digital information to be transmitted. The phase of the carrier is determined on the receiving side at defined sampling times. A decision maker assigns the corresponding digital information to each determined phase and thus wins the transmitted message.

However, in the phase modulation proposed here according to the invention, it is not the modulation signal but the signal to be modulated that carries the information to be transmitted. This information is predetermined by its quasi-continuous signal course. The phase modulation is only used to change the signal to be transmitted in such a way that the original signal curve can no longer be inferred. This makes a speech signal completely incomprehensible. The useful information is obscured by the phase modulation. On the receiving side, the useful information can be obtained by the operation inverse to equation (4)

z _s (n) -n-

win back. Complete recovery is only possible if two conditions are met. First, the received signal y (n) must match the (phase-modulated) transmit signal y (n). Second, the modulation signal, ie the key signal z _s (n), must be known on the receiving side.

The first requirement requires equalization of the transmission channel on the receiving side. The second requirement requires knowledge of the key signal and exact synchronization on the receiving side.

10

While the number of values of the key signal z _s (n) is determined by the number of stages of the modulation (here 64), the number of possible values for x (n) and y (n) is determined by the word length in the signal processing. 15 agrees.

If the signal values of the generated pilot tone are designated p (n) and the signal values of the associated key signal are designated Z _p (n), the signal values of the pilot signal result from the relationship

20 q (n) = p (n) ^• z _p (n) (6)

Due to the properties of the selected random number generator 34 _2t - the pilot signal q (n) thus generated is white noise.

In order to be able to transmit the analytical signal generated with the clock frequency of 2,667 kHz, the transmission signal must be adapted to the transmission channel. Since in the example shown the analog

30 front end 22 predetermined sampling frequency is 8 kHz, the sampling rate must first be increased to 8 kHz.

The increase in the sampling rate by a factor of 3. i.e. from 2,667 kHZ to 8 "_ kHz, is achieved by inserting two signal values with the value 0 between two existing signal values, i.e.

d _s (v) = ..., w (n - l), 0, 0, w (n), 0, 0, w {n + l), ... (7) The sampling rate is increased in connection with a first complex output filter 35 for adapting the analytical transmission signal to the transmission channel. The real part of the analytical output signal of this complex output filter 35 is fed to the analog front end 22.

The first complex output filter 35 first generates an analytical signal from a complex input signal d _s (v), the real and imaginary part of which is phase-shifted by 90 ° for any frequency, and from this a real output signal c _s (v). At the same time spectral components outside the usable bandwidth of the transmission channel are suppressed.

The output-side first complex filter 35 is preferably a (second) Hilbert filter, i.e. a recursive filter, the structure of which is shown in FIG. 9.

As mentioned, the input signal d _s (v) of this second Hilbert filter 35 is ^an analytical signal; the output signal c _s (v), however, is a real signal.

The design of the filter is based on the design of an elliptical low-pass filter. The low pass is then converted into a Hilbert band pass by a transformation in the frequency range.

10 illustrates the frequency response of the output (second) Hilbert filter 35 on the transmission side.

The conversion of the digital output signal c _s (v) of the second Hilbert filter 35 into an analog output signal takes place in the output part of the analog front end 22 (reference note 22b in FIG. 3). This change also includes level adjustment.

In the implementation best _c of the D / A conversion part ht 3 (Fig. 1) of the analog front end 22 (without individual display) of a D / A converter, an ana¬ lied smoothing filter, a programmable amplifier and a Dif¬ conference amplifier. The following specifications apply to the output of the analog front end 22 in the illustrated exemplary embodiment of the invention:

Clock frequency: 8 kHz Word length: 16 bits

Gain: Adjustable in the range of

- 15 dB to + 6 dB interpolation filter

Frequency response: 0 to 3.7 kHz ripple: ± 0.2 dB

Attenuation: 65 dB

With regard to further detailed information on the transmission-side output on the analog front end 22, reference is again made to Ref. [L] and Ref. [2] directed.

The preamble generator 24 is used to generate a preamble at the start of a transmission via radio or telephone channels. In order to enable switching to an ongoing transmission on the reception side, the generation of a preamble is triggered at fixed time intervals.

The preamble used consists of two successive signal sections. The first signal section is a so-called CPFSK signal (Continuous Phase Frequency Shift Keying). The second section is a noise-like signal. The first part is used in the receiver to detect the preamble and to synchronize the receiver. The second signal part serves to equalize the transmission channel.

The CPFSK signal is generated by the CPFSK modulation of a special data frequency. The length of this sequence is, for example, 240 bits. The transmission rate is 1,778 kbit / s. The structure of the data sequence is chosen so that a very reliable detection of the preamble is possible with a special method on the receiving side. For further details, reference is again made to the publication DE-Cl 41 08 806 (ref. [4]) and to ref. (5).

The total length of the preamble in this example is approximately 230 ms. On the receiving side, two different operating modes of the SV module can be distinguished. On the one hand, this is the phase of preamble detection, during which the SV module is in the clear position, and on the other hand, this is the unveiling phase. As on the transmission side, three types of signal processing can be distinguished, namely analog signal processing, digital signal processing in the 8 kHz cycle and digital signal processing in the cycle of 2,667 kHz. The calculation of the equalizer coefficients runs in the background without being connected to a specific sampling clock.

After switching on the device, the SV module is always in the preamble detection phase. Figure 11 illustrates the functional block diagram of signal processing. In this phase, the received signal only passes through the analog front end 52 with its filter. The received signal remains essentially unaffected by the SV module.

The sampled received signal (8 kHz sampling frequency, 16 bit word width) is fed to the preamble detection block 55 after filtering with a second complex input filter 40 on the reception side, in particular a third Hilbert filter (bandpass) and a sampling rate reduction 43 to 2,667 kHz. At the same time, the samples of the received signal are buffered in the buffer 41. The preamble detection block 55 automatically and very reliably detects the reception of the preamble. Notes are Ref. [4] (DE-Cl-41 08 806) and Ref. [5] refer to.

The function and structure of the second complex input filter 40 essentially corresponds to that of the first complex input filter 30 described on the transmission side.

The preamble detection has two functions: On the one hand, this is the detection of the reception of the preamble and the switchover to unveiling. On the other hand, the preamble provides an exact time reference. This is necessary for the initialization and synchronization of the unveiling process.

Thus, when the preamble is recognized, in particular the initialization of a random number generator 34 on the receiver side and a pilot signal generator 50 takes place. In addition, a process for determining equalizer coefficients is initiated. With the calculated coefficient set, an equalizer 51 is set, which is required for the unveiling operation. -ZJ -

To determine the equalizer coefficients, the second section of the preamble, ie the noise signal, is evaluated. That is, it is waited until a certain part of this section is in the buffer 41. The impulse response or the coefficient set for the equalizer filter 51 is then calculated with the aid of an FFT (Fast Fourier Transformation) and a target spectrum present in the receiver and stored in the program RAM 5 (FIG. 1).

After recognizing the preamble, the SV module is in the unveiling mode. FIG. 12 shows the signal processing in this phase. The flowchart for the functional subsequent steps of signal processing on the receiving side is illustrated in FIG. 14.

The received signal is converted by the analog front end 52 into a digital signal with, for example, 8 kHz sampling frequency and 16 bit word width. This signal passes through the equalizer 51, whose task is to equalize the transmission channel, which will be explained in more detail below. After filtering via the second complex input filter 40 (in particular third Hilbert filter; bandpass; also described in more detail below) and a sampling rate reduction 43 by a factor of 3, an analytical signal with the sampling frequency 2,667 kHz is present. This signal s (n) consists of the veiled useful signal and the superimposed pilot signal. The pilot signal is a phase modulated signal as described above. The pilot signal is evaluated in the clock synchronization block 45 and separated from the useful signal. The useful signal is then decoupled by a phase demodulator (descrambler) 59.

After a subsequent increase in the sampling rate 61 to 8 kHz and a subsequent filtering with a second complex output filter 62, in particular a fourth Hilbert filter (bandpass), the conversion into an analog signal takes place in the analog front end 52 on the receiver side.

The function and structure of the second complex output filter 62 essentially corresponds to that of the first complex output filter 35.

The evaluation of the pilot signal in the clock synchronization block 55 also provides a manipulated variable for the regulation of fluctuations in the sampling clock (clock correction). The regulation of the sampling clock is necessary due to the high demands on the synchronicity during the unveiling. lent. Fluctuations in the sampling clock are caused by sample scatter and drifts in the crystal oscillators used.

To evaluate the pilot signal, the received-rate signal s (n) reduced in sampling rate passes through a phase demodulator (descrambler) 58. The output signal q (n) of this phase modulator 58 consists of a carrier signal component and a superimposed noise signal-like signal component which is generated by the useful signal. With the signal generated by the pilot tone generator 50, the carrier signal is converted into the DC signal position. After averaging 56, an analytical DC signal is available, the real part of which is a measure of the level of the pilot signal and the imaginary part of which is used as a manipulated variable for controlling the sampling clock.

With the determined level of the pilot signal, the pilot signal generator 50 and a phase demodulator (scrambler) 57, a pilot signal q (n) is generated at the receiving end and subtracted from the receiving terminal (s). Ideally, the generated pilot signal q (n) corresponds exactly to the received pilot signal, so that the useful signal is completely separated from the pilot signal by the subtraction. If the equalization is optimal, the signal y (n) obtained from the subtraction process is correct. except for a possibly superimposed interference signal, with the signal y (n) at the output of the phase modulator 33 on the transmission side (cf. FIG. 6).

The phase modulator 57 and the two phase demodulators 58, 59 are controlled by two (pseudo) random number generators 54. A random number generator controls the phase modulator 57 and the phase demodulator 58 of the clock synchronization block 55, the other controls the phase modulator 59 for the unveiling of the useful signal y (n). The random number generators correspond to those on the transmission side; like the pilot signal generator 50, they are synchronized with the detection of a preamble to the received signal.

The tasks and the implementation of the individual function blocks of FIG. 12 are described in detail below.

The input section of the analog front end 52 is responsible for the level adjustment, the sampling of the analog received signal and the conversion into a digital signal. The AD28msp02 module from Analog Devices is again used as the analog front end 52 in the prototype implementation (cf. Ref. [3]). This module corresponds exactly to the analog front end used in the signal processor ADSP-21msp55.

The analog front end 52 in turn consists of two analog input amplifiers, a switchable 20 dB preamplifier and an A / D converter.

The following specifications apply to the A / D converter part of the analog front end 52:

Sampling frequency: 8 kHz

Word length: 16 bits

Decimation filter

Passband: 0 to 3.7 kHz

Ripple: ± 0.2 dB

Attenuation: 65 dB

The equalizer 51 is used to equalize the frequency response of the transmission channel in the range of the transmission bandwidth of z. B. 300 Hz to 3 kHz. The transmission channel includes all modules from the first complex output filter 35 of the transmitting part to the second complex input filter 40 of the receiving part (both inclusive).

The equalizer 51 is by eir. transversal digital filter realized with 128 steps. The transfer function is:

127

E (z) - / ^■ z (8)

7-0

The coefficients & are determined during the reception of a preamble.

The second complex input filter 40 (Hilbert filter) serves to suppress the lower sideband of the input signal and to limit the bandwidth of the input signal (received speech signal) to a bandwidth of approximately 2.66 kHz.

The second complex input filter 40 (Hilbert filter) is a recursive filter, the structure of which corresponds to that of the first complex filter 30 on the input side, so that reference can be made to FIG. 7 in this respect.

The input signal of the second complex input filter 40 is the real output signal c (v) of the equalizer 51.

The design of this filter is based on the design of an elliptical low-pass filter. The low pass was converted into a Hilbert band pass by a transformation in the frequency domain.

Analogously to the transmitting part, a sampling rate reduction 43 is carried out in the receiving part to reduce the sampling clock in the example shown by a factor of "3" to 2,667 kHz. A suitable dimensioning of the second complex input filter 40 ensures that no aliasing effects occur.

The combination of complex input filter 40 and sampling rate reduction 43 means that any frequency band with a bandwidth of 2,667 kHz can contain the complete useful information.

In practice, the processing of every third output value of the second complex input filter 40 is realized in that the transverse part of this filter is operated at 8/3 kHz. This means that the filter output values are only calculated and processed in every third cycle of the 8 kHz sampling cycle.

The pilot tone generator 50 delivers an identical signal to the pilot signal generator 37 on the transmission side. This signal is required in the clock synchronization block 55 for converting the received and demodulated pilot signal q (n) into the DC signal position and for generating a phase-modulated pilot signal p (n) at the receiving end.

As already mentioned above, the averaging 56 serves to average the analytical signal q (n) transformed into the DC signal position, so that the real part is the level of the received pilot tone and the imaginary part is a manipulated variable for the sampling clock tracking (clock correction). * r-

The averaging is implemented in such a way that the average over the last 128 input signal values q (n) transformed into the DC signal position is formed every 128 sampling cycles.

The random number generator 54 has the task of generating evenly distributed numbers in the range from 1 to 64, quite analogously to the random number generator 34 on the transmission side. These numbers are used to select random values from a field of 64 complex values. Again, two key signals z _p (n) and z _s (n) are generated from the selected values, one of which (z _s (n)) for phase demodulation, ie for uncovering the useful signal y (n) and the second (z _p ( n)) is used in the clock synchronization block 55 on the one hand for uncovering the received pilot signal and on the other hand for generating the pilot signal on the receiver side. Due to the clock synchronization, the key signals are of course identical to the key signals z _p (n) and z _s (n) on the transmission side.

The implementation of the random number generator 54 is otherwise identical to the implementation in the transmission part, so that reference can be made to the above statements.

The random numbers supplied to the phase modulator 57 and the phase demodulators 58 and 59 consist of a set of 64 complex values from which discrete values are selected by the random number generator 54. The same 64 complex values are used as data records, analogous to the transmission side

_ai = e,> 2π ^π ; ^, 7 ^ι 6 ^w 4 ι = l, 2, ..., 64 (9)

used.

The two phase modulators 58, 59 already mentioned are required in the receiving station of the SV module. One phase demodulator 59 is used to unveil the useful signal y (n) by means of the one key signal z _s (n). The other phase demodulator 58 is used to recover the Pilots used from the received pilot signal. As already mentioned, these key signals must be identical to the key signals on the transmission side.

If the signal values of the analytical input signal after the sampling reduction 60 are denoted by s (n) and the signal values of the key signal of the pilot tone by z _p (n), the following applies to the signal values at the output of the phase modulator 58 in the clock synchronization block 55:

If the veiled useful signal is denoted by y (n) and the key signal for the veiling is denoted by z _s (n), the following applies to the unveiled signal at the output of the phase demodulator 59:

x {) = —— (1 1)

Z _s (n)

The phase demodulator 57 is used to generate the pilot signal from the pilot tone supplied by the pilot tone generator 50.

If the signal values of the generated pilot tone are denoted by p (n), the signal values of the phase-modulated pilot tone result from the relationship:

q {n) = p (n) _{: Zp} {n) (12) In order to be able to convert the digital analytical signal x (n) generated with a clock frequency of 2,667 kHz into an analog signal, the sampling rate must first be increased to 8 kHz.

The sampling rate is increased by a factor of 3 - in the example shown from 2,667 kHz to 8 kHz - by inserting two signal values with the value "0" between two signal values according to the following relationship:

i (v) = ..., x (n - \), 0, 0, x (n), 0, 0, x (n + l), (13)

Another (second) complex output filter 62, preferably a (fourth) Hilbert filter, is used to convert the analytical output signal into a real output signal. This serves to limit the bandwidth of the output signal (speech signal) to approx. 2,667 kHz.

The second complex output filter 62 is again a recursive filter, the structure of which corresponds to that of the first complex output filter 35 on the transmission side and is illustrated in FIG. 9.

The input signal of the second complex output filter 62 (fourth Hilbert filter) is again an analytical signal. The output signal is a real signal.

The design of the filter in the tested embodiment of the invention is based on the design of an elliptical low-pass filter. The low pass is converted into a Hilbert band pass by a transformation in the frequency domain.

The task of the analog front end 52 on the output side is to convert the digital output signal into an analog output signal (audio signal). This also includes level adjustment.

The D / A converter part of the analog front end 52 (output) (not shown in detail) consists of a D / A converter, an analog smoothing filter, a programmable amplifier and a differential amplifier. The following specifications apply to the output of the analog front end 52:

Clock frequency: 8 kHz

Word width: 16 bit gain: adjustable in the range of

- 15 dB to +6 dB interpolation filter

Frequency response: 0 to 3.7 kHz

Ripple: ± 0.2 dB Attenuation: 65 dB

The idea of the invention is in no way limited to the described embodiment of an SV module. Expansion options, especially with regard to the security of the covering, are recognizable to the person skilled in the art on the basis of the invention. In the described embodiment, only a simple (pseudo) random number generator is used to generate the key signals. The use of separate, different generators lends itself to further improving the security against obfuscation.

In the exemplary embodiment described, it is also assumed that the random number generator 54 used begins with each resynchronization at the same starting point. The security of obfuscation can be increased if the starting point is changed with every resynchronization. This can be achieved by transmitting the starting point of the random number generator 54 in the preamble.

-

LITERATURE

[1] Analog Devices: ADSP-2100 Family User's manual. Prentice Hall, 1993.

[2] Analog Devices: ADSP-21msp50 / 55/56 Datasheet, Mixed Signal Processor.

[3] Analog Devices: AD28msp02 Datasheet, Voiceband Signal Port.

[4] DE-Cl 41 08 806 ^ US-5,267,264

[5] E. Schlenker: A method for determining the signal-adapted receive filter and the initial synchronization of a digital receiver. Dissertation, University of Stuttgart, Institute for Network and System Theory, 1993.

[6] D.E. Knuth: TheArt of Computer Programming: Volume 2 / Semineralical Algorithms. Second edition. Reading, MA: Addison-Wesley Publishing Company, 1969.

Claims

-J -PATENT REQUESTS

1. A method for voice obfuscation and unveiling in voice transmission, characterized in that the transmission side

- The digitized speech signal c (υ) by a first complex input filter (30) with a bandwidth that corresponds to the bandwidth of the transmission channel, is converted into a complex signal x (n), which is controlled by a key controlled by pseudo random numbers signal (z _s (n)) is phase modulated,

- the phase-modulated speech signal (y (n)) is combined with a pilot signal (q (n)) which is also phase-modulated in pseudo random distribution to form a veiled useful signal (s (n)) to be transmitted and

- The useful signal (s (n)) in a sequential sequence, together with a preamble used for receiver-side synchronization and useful signal equalization, as a complex signal (w (n)) passes through a first complex output filter (35) which produces a real output signal (c _s (υ)) generated, which after digital-to-analog conversion is sent to a transmit signal processor, and that on the receiver side

the digitized received signal (c (υ)) is converted into a complex signal (s (n)) by a second complex input filter (40) with a bandwidth that corresponds to the bandwidth of the transition channel,

- This complex signal (s (n)) during a preamble detection phase on the one hand forces a clock synchronization for a pilot signal (q (n)) generated in the pseudo-random distribution initiated by the preamble and on the other hand equalizer coefficients for a receiver side Equalizer (51) is calculated and then the phase of the useful signal decoupling is initialized. . the veiled useful signal (s (n)) is separated from its phase-modulated pilot signal superimposed on the transmitter side by linking to the synchronized pilot signal (q (n)) generated on the receiver side, and

the phase-modulated, veiled digital speech signal (y (n)) obtained in this way by inverse phase modulation by means of the receiver -5ι-

generated by the preamble clock-controlled key signal (z _s (n)) and unveiled as a complex signal (x (n)) passes through a second complex output filter (62) which produces a real output signal (c _s (υ)) generated, which after digital analog-to-analog conversion is delivered to a received signal processing.

2. The method according to claim 1, characterized in that Hilbert filters of higher order are used as complex input or output filters (30, 40 or 35, 62).

3. The method according to claim 1 or 2, characterized in that both a transmission and reception side) is carried out following a band-limiting complex input filtering, a sampling rate reduction and a corresponding sampling rate increase before the complex output filtering, which is adapted to the sampling rate increase.

4. The method according to claim 3, characterized in that the sampling rate reduction in an integer ratio, in particular in a ratio of 1: 3 and the sampling rate increase accordingly also in an integer ratio, in particular in a 3: 1 ratio, and that as a complex filter (30. 35, 40, 62) recursive filters of higher order can be used.

5. The method according to any one of the preceding claims, characterized ge indicates that the preamble is transmitted periodically in a fixed time frame and the veiled speech signal is hidden for the duration of the preamble.

6. The method according to claim 5, characterized in that the fixed time grid of several seconds, in particular 3 to 10 s and the duration of the preamble is a few 10 ms, in particular about 200 ms.

7. The method as claimed in claim 6, characterized in that the properties of the transmission channel are checked during the reception of the preamble and the filter coefficients for the receiver-side equalizer (51) are determined therefrom. -J2L-

8. The method according to claim 7, characterized in that for re-synchronization the end of each transmitted preamble is detected on the receiver side and a pseudo-random number generator (54) for a key generator for unveiling the useful signal is started with the signal obtained.

9. The method according to any one of claims 1 to 7, characterized gekennzeich¬ net that the random number controlled phase modulation of the digitized speech signal or the pilot signal is carried out by different random number generators.

10. The method according to any one of the preceding claims, characterized ge indicates that in order to increase the security against obfuscation, the starting point for the random number generator (s) on the receiver side (s) (54) is variably adjustable within the preamble.

1 1. Device for voice concealment and unveiling in devices for voice transmission, which with a front end unit (22, 52) for digitalizing a voice signal and adapting a transmit signal to a predetermined transmission channel on the one hand and / or for digitizing one Receiving signal and on the other hand are equipped to adapt the processed reception signal to a speech reproduction device, characterized in that on the transmission side - a controlled by a (pseudo) random number generator (34)

Key generator (23) acts on a digital phase modulator (33) which phase modulates the digitized speech signal,

the phase-modulated speech signal (y (n)) is combined with a pilot signal (q (n)), which is supplied by a pilot signal generator (20) and is also randomly phase-modulated, to form a useful signal (s (n)),

- A preamble generator (24) generates a preamble (v (n)) for receiver-side synchronization and useful signal equalization, which, together with the useful signal, is sent to the front-end unit sequentially via a changeover switch (25) which can be actuated in a defined clock sequence

(22) for transmission signal processing, and that on the receiving side

- There is a digital equalizer filter (51) for equalizing the transmission channel of the digitized received signal, the equalizer coefficient of which is calculated during the reception of the preamble. net and be set

- A device (44) for detecting the preamble within the received useful signal is provided which, depending on a defined section of the preamble, triggers the calculation of the filter coefficients for the equalizer filter (51) in a higher-level computing unit and then the Unveiling of the useful signal by activating a clock synchronization device (55) initiates a control signal for sampling clock correction on the one hand from the received, demodulated pilot signal by complex multiplication (63) with a pilot tone (50) generated on the receiving side and, on the other hand, also under control by one the clock synchronization initialized random number generator (54) from the pilot tone supplied by the receiving-side pilot tone generator (50) via a modulator (57) delivers a phase-modulated pilot signal (q (n)) which, together with the equalized useful signal (s (n)) Separation of the transmitted pilot signal subtractively from and then converted as a phase-modulated speech signal in a phase demodulator (59) under the control of the synchronized reception-side random number generator (54) into the unmodulated, digital speech signal, which is transmitted to the front-end unit (52) for conversion into an audible signal becomes.

12. The device according to claim 1 1, characterized by a transmission-side (first) device (31) for sampling rate reduction, the digitized voice signal supplied by the transmission-side front-end unit (52) after band limitation via an input-side first complex input filter (30) outputs a reduced sampling rate to the phase modulation device.

13. Device according to claim 1 1 or 12, characterized by a transmission-side (first) device (36) for increasing the sampling rate, which is composed of the useful signal (s (n)) and preamble (v (n)), Sprachver¬ veiled transmission signal (w (n)) increased by signal values determined by a fixed factor and emitted via a first complex output filter (35) to the front-end unit (22) for the transmission signal processing. - -V-

14. A device according to claim 12 or 13, characterized by a reception-side (second) device (60) for sampling rate reduction, which receives the digitized reception signal delivered by the reception-side front-end unit (52) after equalization and band limitation via a second complex input filter (40 ) with a reduced sampling rate to the phase modulation device (55, 59).

15. Device according to claim 14, characterized by a receiving (second) device (61) for increasing the sampling rate, which increases the demodulated received signal (x (n)) by signal values determined by a fixed factor and via a second complex Output filter (62) to the front end unit (52) at the receiving end for audio signal processing.

16. Device according to claims 12 and 13 or claims 14 and 15, characterized in that the factor for the sampling rate reduction and the factor for the sampling rate increase are chosen to be the same and an integer.

17. The device according to claim 16, characterized in that both factors are selected for "3".

18. Device according to one of the preceding claims 1 1 to 17, da¬ characterized in that the transmission-side or reception-side random number generator (34 or 54) according to the linear congruence method random values (r (n) according to the regulation

r (n) = (a • r (n- l) + c) mod m

returns integer with n = 1,2, where a and c denote integer constants and m denotes a selectable number.

19. The device according to claim 18, characterized in that the integer constants for a = 1664525 and c = 32767 are determined and m = 2 ^{32 is} selected.

20. The device according to claim 1 1, characterized in that the control signal for the clock correction and a manipulated variable for the level of the pilot signal generated at the receiving end is obtained from averaging (56) of the demodulated received pilot signal over a predetermined number of samples.

21. Device according to one of the preceding claims 11 to 20, characterized in that for the statistical phase modulation of the speech signal on the transmission side or for the demodulation (59) of the reception signal after separation of the pilot signal and for the phase modulation of the transmission side Pilot tones or the demodulation of the pilot signal at the receiving end each use different key signals.

22. Device according to one of the preceding claims 11 to 21, characterized in that Hilbert filters (30, 35, 40, 62) are used as complex filters in the function as higher-order recursive filters.