EP0696409A1

EP0696409A1 - Process for producing printed circuit boards

Info

Publication number: EP0696409A1
Application number: EP93909840A
Authority: EP
Inventors: Sandro Bezzetto
Original assignee: Pac Di Bezzetto Sandro & Csnc
Current assignee: Pac Di Bezzetto Sandro & Csnc
Priority date: 1993-04-26
Filing date: 1993-04-26
Publication date: 1996-02-14
Also published as: WO1994026081A1; TW234234B

Abstract

A process is disclosed for producing a printed circuit board with a first and a second face. A plurality of connections (pads) for soldering electronic components and a plurality of tracks which interconnect the pads are applied on at least the first surface. A layer of solder (6) is applied on the pads by means of a first photoresist layer (3); the tracks are structured thereon by etchants by means of a second photoresist layer (7) which remains on the tracks and on the layer of solder (6) applied on the connections (10) of the pads (4). A solder resist (8) may then be applied on the printed circuit board outside of the pads (4). A process is also disclosed for manufacturing a mask suitable for implementing this printed circuit board production process. According to said process, said masks are produced in a simple manner from known base masks.

Description

Process for the production of a printed circuit board

The invention relates to a method for producing a printed circuit board with a first and second surface, with at least a plurality of connection contacts (pads) for soldering electronic components and a plurality of interconnects connecting the pads being applied to the first surface . Furthermore, the invention relates to a method for the production of masks for the exposure of photoresist layers, which can be used in the production of a printed circuit board according to the preceding method. Finally, the invention relates to a printed circuit board with pads arranged on at least one surface and conductor tracks made of a metal applied to an insulating substrate of the printed circuit board, with a solder layer applied at least to the pads, and with one on the printed circuit board except on the Pads of applied solder layer. Such a circuit board can be produced using the first-mentioned method. 2

It is generally known that microelectronic circuits are predominantly made up of electrically insulating plates provided with structured conductor tracks. The printed circuit board generally forms the lower level of electronic structures in circuit levels. The size of the circuit boards can be up to several d 2, whereby the circuit board bei.spi.elswei.se made of polymers, such as epoxy resin, and usually coated with a copper metallization. In the case of two-layer and multi-layer wiring, connection holes have to be punched in the printed circuit board and metallized throughout so that the electrical connections pass through the connection hole. The microelectronic circuits are constructed on the printed circuit boards by correspondingly soldering the individual microelectronic components. In the case of a technology, the components on one side of the circuit board are used their connections placed on contact points (pads) provided with a solder layer and soldered accordingly. This technology is referred to as SMD technology (Service Mount Devices).

In another technique, the components with their connections are inserted into connection bores in the circuit board and are soldered on a soldering side of the circuit board opposite the component side for connection to corresponding conductor tracks.

For the production of such a printed circuit board, for example, a method is known from the hobby field, which, however, cannot be used for higher-integrated circuits. In this method, the entire circuit of pads, conductor tracks and the like is transferred to the circuit board from copper, metallization, for example by printing (screen printing process) or lithographic process. Subsequently, connection bores for connecting the component side and solder side in the printed circuit board are produced by drilling or punching. A copper coating in the interior of the connection bores creates a conductive connection between the two sides of the printed circuit board. Subsequently, a solder layer, in particular also as an etching protection, is applied galvanically to the entire circuit. The solder layer is also applied within the through holes. The exposed copper metallization is then removed by etching, and the structured circuit remains, which is formed by copper coated with the solder layer.

Finally, a solder mask is applied to the circuit by screen printing or a photo process, this lacquer not being arranged on the pads and the connecting bores. Finally, the electronic components on the pads or in the connection holes are soldered through the applied solder layer on the circuit board. ___,

A disadvantage of the above method is that by applying the solder layer on the conductor tracks when the electronic components are soldered, heat is transported along the conductor tracks and solder layer, as a result of which the solder layer takes on an uneven, wavy structure on the conductor tracks. Because of the waviness of the solder layer on the conductor tracks, this method cannot be used for more highly integrated circuits.

In a further method known from practice, which can also be used in particular for higher-integrated circuits in microelectronics, a circuit design for printed conductors, pads and the like is produced by CAD methods. The circuit design is, for example, transferred to a photographic negative (or positv) as a mask via a photoplotter. The structuring of the metallization on the printed circuit board is then carried out by exposing a light-sensitive photoresist layer by means of the mask. After the photoresist layer has been partially removed, the desired structure is transferred to the metallization (copper layer). The entire circuit is structured using a mask. This is followed, as in the above-mentioned method, by drilling or punching connection bores, metal coating the connection bores on the inside, galvanically applying a solder layer as a protection against etching and removing the exposed metallization.

In contrast to the previously mentioned method, the entire solder layer is now removed from the circuit, so that a circuit remains only formed from the metal layer applied to the circuit board. This is mechanically polished to prepare it for the application of a solder resist. This varnish is applied to the entire circuit except for the pads and the connection holes. The pads are then chemically polished and the so-called HAL (hot air leveling) process is used. In this method, the printed circuit board is immersed in a bath with the liquid solder layer. At the When the printed circuit board is removed, the solder layer adheres mainly to the pads. Excess material of the solder layer is removed from the pads and from the rest of the circuit board by blowing with hot air. The solder layer is usually made of an alloy of lead and tin. The solder layer can be melted again, in particular to form a shiny surface. This is usually done by infrared radiation.

The electronic components can then be soldered on in a conventional manner.

A disadvantage of the latter method is that the solder layer applied to the entire circuit must be removed as a whole. This is done by a chemical process using acids. This, as well as the etched-off solder layer, has to be disposed of in a complex manner and, if necessary, recovered. Since the solder layer is also etched away from the pads, the solder layer must be applied to the pads again in an additional process step. In the H.A.L. process, the solder layer is applied hot, whereby the toxicity of a lead component in the solder layer must be observed and appropriate measures taken. In particular, it should be noted that some countries, such as the USA, for example, want to consider banning the use of liquid lead in production processes or at least want to impose strict requirements.

Another disadvantage of the latter method is that when hot excess solder layer is blown off in the HAL method, small, hot droplets of the solder layer can remain on the solder-stop layer and can lead to a defect in the solder-stop layer there. This can lead to short circuits in the conductor tracks. Another disadvantage of the HAL method is that the layer thickness of the solder layer is uneven. When the circuit board is pulled out of the liquid solder layer and when excess material is subsequently blown off, the solder layer does not solidify with a uniform layer thickness, but is thrown up unevenly. As a result, poor contact can be made when the electronic components are soldered on, since a connecting line of the electronic component is arranged, for example, in an area of the solder layer where the thickness is too small. Even when the solder layer is melted to produce a shiny surface of the solder layer, its layer thickness is not improved with regard to its uniformity. Instead, due to its surface tension, the solder layer can contract on melting and solidify, for example, in a hemispherical manner. If the solder layer "shrunk" in this way is not hit exactly by a connecting line of the electronic component, a poor or possibly no conductive connection results.

The invention is therefore based on the object of providing a simplified method for producing a printed circuit board, in which a solder layer of uniform layer thickness is applied only once to the contact points of the printed circuit board required for soldering.

This object is achieved by the method steps listed in claim 1. In the method according to the invention, the pads are first structured using a first mask. If, after appropriate exposure to the first mask, the pads are freed from the associated photoresist layer, a solder layer is only applied to the pads with a predetermined layer thickness. The remaining part of the first photoresist layer can then be removed. Subsequent removal of the solder layer as in the HAL process is not necessary because this layer was only applied to the contact points (pads) of the circuit board required for soldering. Before removing the superfluous metallization of the circuit board, a second photoresist layer is applied using a second mask for structuring the conductor track. After exposure, the second photoresist layer remains on the conductor tracks and at least partially on the pads, the transition region of pads and associated conductor track also being covered by the second photoresist layer. If the exposed metallization is now removed, the conductor tracks are protected by the second photoresist layer and the pads by the solder layer, so that the metallization is not removed in these areas. It should be noted that the pads are protected both by the solder layer and at least partially by the second photoresist layer. The method according to the invention cannot interrupt the connection of the connector and the conductor track, since the metallization is protected from being removed by the second photoresist layer and the solder layer. In the following, a solder resist can be applied to the circuit board outside the pads in the usual way.

According to a preferred embodiment of the invention, the pads are produced with connecting pieces when structured. The connecting pieces point essentially in the direction of the conductor tracks to be subsequently structured and serve to connect pads and conductor tracks. In addition to the conductor tracks, the second photoresist layer is applied in particular to the parts of the pads forming the connecting pieces, as a result of which an overlap of the solder layer and the second photoresist layer occurs.

In the method according to the invention, there is no need to remove the solder layer from the conductor tracks. This eliminates the corresponding chemical treatment and waste disposal or recovery of the chemical agents (acids) and the solder layer. This also does not apply to the method according to the invention reapplying the solder layer, in particular no toxic, liquid solder layer being required. Hot blowing off excess solder layer is just as little necessary in the method according to the invention. As a result, no defects in the solder mask due to hot droplets of the solder layer can occur. Since the solder layer is applied with a uniform layer thickness, soldering of the electronic components in the entire area of the pad is ensured.

The method described in claim 1 can be used in particular for SMD, the electrical contacts of the electronic components being placed on the contact or connection surfaces (pads) of the printed circuit boards and then being soldered, for example by wave soldering. To connect both sides of a printed circuit board, the method according to the invention being used at least on the component side, in process step ii) according to claim 1, additional pads forming bore points with corresponding connecting pieces for producing connecting bores for connecting both sides of the printed circuit board be structured. After drilling or punching the connecting holes, these are provided with a metalization, at least in their interior. In the following, the connection bores metallized in this way are treated further in the same way as the pads in claim 1, that is, a solder layer is applied with a uniform thickness within the connection bores and on their connecting pieces, a second photo-resist layer is applied, exposed and then closed ¬ at least partially removed. If the connecting bores are also used for inserting connecting wires of electronic components, then according to method step vi) from claim 1, no solder mask is applied in an analogous manner to the connecting bores. The solder resist can be applied in accordance with the previously known methods by screen printing or a photo process. In order to achieve a very uniform layer thickness of the solder layer in a simple manner, it is advantageous if the solder layer is applied galvanically. This type of application achieves a very flat surface of the solder layer with a controlled layer thickness.

Depending on whether a positive or negative photoresist layer is used as the first or second photoresist layer, the corresponding masks are designed as negative or positive masks. In a preferred embodiment, in steps ii) and v) from claim 1, a positive mask is used as the first mask and a negative mask as the second mask, the first photoresist layer outside the pads / bore points and associated connecting pieces and the second photoresist layer on the conductor tracks is exposed. In this case, the unexposed part of the first photoresist layer is removed before the solder layer is applied. The unexposed part is likewise removed from the second photoresist layer, the exposed part remaining above the conductor tracks to be structured.

Although subsequent melting of the solder layer is not necessary to produce an easily solderable alloy, the melting can be carried out. This gives the solder layer, which essentially has a matt surface, a glossy surface. The layer thickness is not changed during the melting.

It is also advantageous if the melting is carried out by appropriate infrared radiation.

In the method according to the invention, the solder resist can be applied both by a photo process and by screen printing or the like. In the case of very fine conductor tracks, it is expedient if the connection piece is structured with a width that is greater than that of the conductor track in step ii) in claim 1. In the case of wider conductor tracks, the connecting piece generally has the same width as the conductor track, it being essentially formed from an end piece of the conductor track connecting two pads, for example. In the case of conductor tracks which are not too fine, there are no difficulties in overlapping the second photoresist and connector, so that after removal of the metalization, the conductor track is contacted below the second photoresist and connector over the entire width of the conductor track or of the connector. In the case of finer conductor tracks, there is the possibility that the second photoresist layer for structuring the conductor tracks only partially overlaps the connecting piece. If the metallization not covered by the second photoresist layer is removed in this case, the contact between the conductor track covered by the second photoresist and the connecting piece could only take place over part of the width of the conductor track or possibly not at all. However, if the connector is wider than the conductor track, there is good contact between the connector and the conductor track even when the second photoresist layer is slightly misaligned for structuring the conductor tracks.

In a simple embodiment of the invention, the circuit board is metallized by applying a copper layer and the solder layer is formed by a PbSn layer.

In the method according to the invention, an overlap is produced in the contact area of conductor tracks and pads / connection bores, in particular to avoid an interruption in the connection between pads / connection bores and conductor tracks when the unnecessary metallization of the circuit board is removed. The overlap takes place in the contact area covering solder layer and second photoresist layer. The solder layer prevents etching of the metallization in the area of the pads / connecting bores and the second photoresist layer prevents etching of the metallization in the area of the conductor tracks to be structured. The overlap can be produced in the area of a connecting piece of the pads or the connecting bore. Analogously to the invention, a corresponding overlap can also be produced in that, for example, after structuring the pads and applying a corresponding solder layer, they are produced by vapor deposition, sputtering or the like so that they overlap the pads at least partially. In this case, a metallization applied to the printed circuit board can be removed in a conventional manner before the printed conductors are applied. In this case there is a direct overlap between the pad and the conductor track.

In the method according to the invention for producing a printed circuit board, a first and a second mask are used for successively coating a first and a corresponding second photoresist layer. In contrast, the printed circuit board produced with the H.A.L. process is exposed through a mask as a whole. In the case of a simple method for producing masks for use in the method according to the invention for producing the printed circuit board, this method has the method steps according to claim 12. In the mask production method, the first and second mask are produced in a simple manner from a first basic mask with an overall layout of the circuit and a second basic mask only with pads / bore points. The second basic mask is used in particular to remove the solder stop layer from the pads / bore points.

The first auxiliary mask is produced from the second basic mask by enlarging pads and / or bore points by a first enlargement factor. It should be noted, that the distances from the centroids or center points of the pads and / or bore points are not increased, but only the cross section of these structures is increased. If the first basic mask is overlaid with the first auxiliary mask, the enlarged structures on the first auxiliary mask transfer a certain area of pads and / or bore points to the first mask. The area around the pads and / or bore points of the first basic mask is chosen so large that neighboring pads and / or bore points are not detected. However, part of the conductor track connected to the pads and / or bore points is also transferred to the first mask as a connector mentioned in claim 2. Consequently, the layout of the first mask shows the arrangement of all pads and / or drilling points together with end regions of the conductor tracks adjoining them as connecting pieces.

A second auxiliary mask is produced from the second basic mask by enlarging the pads and / or bore points as in the first auxiliary mask. In this case, the magnification is carried out using a second magnification factor that is smaller than that of the first magnification factor. The second mask is produced by superimposing the second auxiliary mask and the first basic mask. This only has the conductor tracks from the first basic mask, since the second auxiliary mask in particular hides the pads and / or bore points from the first basic mask. Since the second magnification factor is smaller than the first magnification factor, a conductor track shown on the second mask, for example between two selected pads, is longer than the distance between the corresponding connecting pieces of the first mask. As a result, the connecting pieces produced by means of the first mask and the areas of a photoresist layer exposed by means of the second mask overlap to form the conductor tracks. In this method according to the invention for producing the masks, it is particularly advantageous that by enlarging the pads and / or bore points on the first or second auxiliary mask, the geometry of pads, bore points and conductor tracks or other components of the circuit is retained. This means that in the case of a circular pad, a circular environment of this pad is generated together with the pad on the first mask by means of the first auxiliary mask. The same applies to pads and / or bore points of any shape. In any case, the pads and / or bore points on all masks are geometrically similar to one another.

In this context, it is also advantageous if the first and second auxiliary masks are superimposed on the first basic mask in such a way that the centroids of pads and / or bore points on the auxiliary mask and basic mask lie one above the other. In this way, the one transferred to the first mask is transferred or the surroundings of pads and / or bore points hidden by the second mask are formed symmetrically around pads and / or bore points.

The design and manufacture of basic masks, first and second masks and associated auxiliary masks is particularly simplified if this is done using a CAD method. As a result, the entire circuit can be produced in a simple manner on a computer as a design. The design is transferred in a known manner to a mask, the first and second auxiliary masks being easily produced by means of the computer using appropriate software in the CAD method from the basic masks formed in this way. The first and second auxiliary masks can be superimposed in an equally simple manner with the first basic mask for producing the first and second masks.

In this context, it is also advantageous if, in particular in the case of fine conductor tracks, at a connection point of Conductor track and pad and / or bore point is formed on these a connection piece widened compared to the conductor track. The connecting piece can be produced in a simple manner by widening a conductor track end adjoining the pad or bore point. Furthermore, a so-called "teardrop" function, which is implemented in CAD processes, can be used to form the connecting pieces. In this case, for example, the connection piece present in the first mask is replaced by the "teardrop". This forms an extension of the pad or bore point pointing in the direction of the conductor tracks, wherein it extends so far in the direction of the conductor track that the conductor track structure shown on the second mask at least partially overlaps the "teardrop".

In the case of a printed circuit board produced by the method according to the invention for producing a printed circuit board, deviating from printed circuit boards produced by known methods, the solder layer is applied to these in a contact area of pads and conductor tracks. This serves to protect the conductor track when etching off the metallization of the circuit board. In the prior art, see H.A.L. process, the conductor tracks are also covered by a solder layer when etching off the metallization.

It is furthermore advantageous if the contact area is formed by a connector designed to connect the pad and the associated conductor track, on which the solder layer and on which the photoresist layer is applied. The overlap of the photoresist layer and the solder layer ensures the connection of the conductor track to the connector and thus to the pad when etching off the metallization. An interruption by removing the metallization between the pad or connection piece and the conductor track cannot take place. In this context, it is advantageous if the connection piece is formed by an end piece of the conductor track. In this way, the connector and conductor track are designed with the same width. It can also be advantageous here, in particular in the case of fine conductor tracks, if the connecting piece has a greater width than the conductor track.

If the photoresist layer ends at a greater distance from the pad compared to the solder stop layer, the advantage is that the solder layer is largely melted only in its exposed area on the pad when electronic components are soldered on. Consequently, there is no melting of the solder layer up to the photoresist layer.

If the printed circuit board has connection bores for electrical connection from opposite sides of the printed circuit board, the connection bores being able to be connected to printed conductors on both sides, it is advantageous if a metal and the solder layer are applied to at least one inside of the connection bore and at least on On one side of the printed circuit board, a corresponding connection piece with applied solder layer and photoresist layer and solder stop layer protrudes from the connection bore. Cu or PbSN in particular can be used as the metal or material of the solder layer.

In the method according to the invention for producing a printed circuit board or in the printed circuit board manufactured by this method, it is also advantageous that the uniform layer thickness of the applied solder layer simplifies an optical control of the printed circuit board. This control takes place in that the light reflected by the solder layers is detected and evaluated to check the arrangement of at least the pads. Such an optical inspection of the circuit board is only possible with the known method using HAL 1 o

difficult or not possible at all, since the light is reflected in many directions by the uneven, wavy surface of the solder layer. Instead, in the printed circuit board produced according to the invention, the light is essentially only reflected perpendicular to the solder layer. In this way, a more precise localization, in particular of the pads on the printed circuit boards, can take place during the optical control, as a result of which the control can be carried out more easily and precisely. In this context, it should also be noted that the optical control is particularly reliable on matt surfaces of the solder layer. Such surfaces are naturally present in the method according to the invention for producing the printed circuit boards unless the solder layer is additionally melted, for example by infrared radiation. As stated above, such melting serves only to produce shiny surfaces of the solder layers, which are of no importance for the functionality of the solder layer or the printed circuit board.

In the following, advantageous exemplary embodiments of the invention are explained and described in more detail with reference to the figures enclosed in the drawing.

Show it:

Fig.l to 4 successive steps of the method according to the invention for producing a circuit board;

5 shows a plan view of a section of a printed circuit board, FIG. 4 corresponding to a section along the line IV-IV from FIG. 5;

6 shows a second basic mask;

7 shows a first auxiliary mask; 8 shows a second auxiliary mask;

9 shows a first basic mask;

10 shows a first mask;

11 shows a second mask;

12 shows a detail of a circuit formed on a circuit board; and

13 shows a further section of a circuit formed on a printed circuit board with a “teardrop”.

A longitudinal section through a printed circuit board is shown in FIG. One side of the printed circuit board for the application of electronic components is visible, the side opposite this side not being shown for the sake of simplicity. The method described below can be carried out in a corresponding manner on both sides of the circuit board.

The circuit board is essentially formed from an insulating substrate 1. This substrate can be an epoxy resin optionally containing glass fibers, polyimide, PTFE, a metal core carrier with an electrophoretically applied and baked ceramic insulating layer or the like. A copper metallization 2 and a first photoresist layer 3 are applied to the surface of the substrate 1. Copper metallization 2 and first photoresist layer 3 essentially cover the entire surface of the substrate 1.

To form connection areas (pads) 4 and connection bores 5, the first photoresist layer 3 is exposed through a corresponding first mask and the exposed areas this layer is removed, the removal being carried out in the usual way by means of appropriate chemical solvents, acids, plasma etching or the like. In the areas on the copper metallization 2 in which the exposed, first photoresist layer 3 has been removed, a solder layer made of PbSn is later applied galvanically. First, the connection hole 5 is punched or drilled, see Figure 2.

In order to establish a conductive connection of circuits and components arranged on both sides of the substrate 1 or the printed circuit board by means of the connecting bore 5, a copper metallization 2 is applied within the bore, which is connected to the corresponding copper metallizations on the surfaces of the substrate 1 stands. In addition, the solder layer 6 is applied to the copper metallization 2 within the connection hole 3, wherein it additionally frames the hole on the surface of the substrate 1.

After the galvanic application of the solder layer 6 in the area of the pads 4 and the connecting bore 5, the remaining first photoresist layer 3 is removed and a second photoresist layer 7 is applied to the entire surface of the printed circuit board, see FIG. 3. The second photoresist layer 7 can also be applied within the Connection hole 5 may be applied to the solder layer 6.

The second photoresist layer 7 is exposed by means of a second mask and in particular removed from the solder layers 6 of pads 4 and connecting bores 5. The second photoresist layer 7 remains for structuring conductor tracks between the pads, between connecting holes 5 to be connected and between pads 4 to be connected and connecting holes 5, see FIG. 4. Subsequently, the copper metallization 2 is removed in all areas on the surface of the printed circuit board in which it not covered by the second photoresist layer 7 or the solder layer 6 is covered. Consequently, the copper metallization remains under the pads, within the connection bore 5 and, to form conductor tracks, under the remaining second photoresist layer 7. Finally, a layer 8 of solder mask is applied to the entire surface of the circuit board, the solder mask not the solder layer 6 covered in the area of the pads 4 and the connecting bore 5, see FIG. 4.

FIG. 5 shows a plan view of a section of the printed circuit board produced according to FIGS. 1 to 4. FIG. 4 corresponds to a section along the line IV-IV, the layer 8 of solder mask being omitted in FIG. 5 for simplification.

The pads 4 have an essentially square shape, wherein they are covered with the solder layer 6. A copper metallicization 2, which is covered by the remainder of the second photoresist layer 7, runs between the two pads shown on the substrate 1. This is also arranged below the solder layer 6 to form the pads and inside the connecting bore 5. The ends of the second photoresist layer 7 are formed at a distance from the pads 4. Below end pieces of the second photoresist layer 7, connecting pieces formed by the solder layer 6 extend in an overlap region 10. These protrude from the essentially square pads in the direction of the conductor tracks and, together with the second photoresist layer 7, cover the copper metallicization 2 which forms the conductor tracks, see FIG. 4. The distance between the two connecting pieces of the adjacent pads 4 which are to be pointed towards one another is less than the distance between the ends 9 of the second photoresist layer 7, so that it covers the solder layer 6 in the overlap region 10.

In an analogous manner, a second photoresist layer 7 with a corresponding one is between the connection bore 5 and the one pad 4 Overlap area 10 is applied to the connection pieces of pad 4 and connecting bore 5 formed by solder layer 6.

The connection hole 5 is surrounded in a ring on the substrate 1 by a solder layer 6, the connector projecting from this in the direction of the pad 4.

FIGS. 6 to 11 show the production of the first and second mask for use in the method according to the invention for producing a printed circuit board. For simplification, the circuit structure shown on the masks has only two pads 14 and 15 spaced apart from one another and a conductor track 18 running straight between them. The pads 14 and 15 are substantially circular. A first basic mask 17 with the simplified circuit arrangement is shown in FIG. 9. The first basic mask 17 is designed as a negative mask. For precise alignment relative to other masks and to the printed circuit board, each of the masks shown in FIGS. 6 to 11 has an index hole 16 at the same location.

FIG. 6 shows a second basic mask 11, in which only the pads 14 and 15 shown in the first basic mask 17 are present.

FIG. 7 shows a first auxiliary mask 13 in which the pads 14 and 15 of the second basic mask 11 are shown enlarged by a first magnification factor. It should be noted that the centroids of the pads 14 and 15 have the same distance in both masks 11 and 12.

The first auxiliary mask 13 is a negative mask, only areas outside the pads 14 and 15 being exposed through these masks. FIG. 8 shows a second auxiliary mask 12 in which the pads 14 and 15 of the second basic mask 11 are enlarged by a second enlargement factor. The second enlargement factor is smaller than the first enlargement factor. The second auxiliary mask 12 is designed as a positive mask.

If the first auxiliary mask 13 and the first basic mask 17 are arranged one above the other and used to produce a further mask, the first mask 19 shown in FIG. 10 results. The first auxiliary mask 13 is arranged relative to the first basic mask 17 such that the Center of gravity of the pads 14 and 15, in this case the center points, one above the other, which are arranged. As a result, the first mask 19 in the vicinity of the pads 14 and 15 has connecting pieces 21 and 22, which are formed by the ends of the conductor track 18 from FIG. 9, which lie within the pads 14 and 15 of the first auxiliary mask 13.

To produce the second mask 20 from FIG. 11, the second auxiliary mask 12 and the first basic mask 17 are arranged one above the other. Again, the centroids of the pads 14 and 15 of the second auxiliary mask 12 are arranged above or below the centroids of the pads 14 and 15 from the first basic mask 17.

Since the first magnification factor for producing the second auxiliary mask 12 is smaller than the second magnification factor for producing the first auxiliary mask 13, the pads 14 and 15 of these two masks have different radii. Correspondingly, when the second auxiliary mask is superimposed on the first basic mask 17, a conductor track connecting piece 24 is produced, the length 25 of which is greater than a distance 23, see FIG. 10, of the connecting pieces 21 and 22. Consequently, when the first mask 19 is overlaid with the second mask 20, there is an overlap between the conductor track connecting piece 24 and connecting pieces 21 and 22. The first mask 19 is used to expose the first photoresist layer using the method according to the invention. Since the first mask 19 is a positive mask, the unexposed part of the first photoresist layer is removed after exposure in order to apply the solder layer 6, see FIG. 3, to the pads 4, see FIG. 2. The second mask 20 is a negative mask. Therefore, in the method according to the invention for producing the printed circuit board, the unexposed part of the second photoresist layer is removed, which results in the arrangement of the second photoresist layer 7 according to FIG. 4. Due to the overlap of conductor track connector 24 according to FIG. 11 and the connecting pieces 21 and 22 according to FIG. 10, the overlap areas marked with "X" in FIG. 4 or the overlap areas marked with "10" in FIG. 5 result.

The masks 19 and 20 shown in FIGS. 10 and 11 are simplified basic representations of the masks actually used in the method according to the invention.

A more complex circuit structure is shown in FIGS. 12 and 13. This is produced in an analogous manner using corresponding first and second masks.

FIG. 12 shows a section 26 of a circuit arranged on a circuit board. This comprises a plurality of pads 29, 30 and 31. The pads 29 have a circular cross section, the pads 30 have a rectangular cross section and the pads 31 have a substantially square cross section. Some of the circular pads 29 can, for example, be formed with a connection bore, so that a connection bore 32 results. In addition to relatively fine conductor tracks 27, coarser conductor tracks 28 are formed. The overlap of solder layer 6 and second photoresist layer 7 shown in FIGS. 4 and 5 takes place in each case in the contact area between conductor tracks 27, 28 and pads or connecting bore 29, 30, 31 and 32. FIG. 13 shows a further section 26 of a circuit shown on the circuit board. In this case too, corresponding conductor tracks 27, 28 and pads or connecting bores 29, 30, 31 and 32 are formed. A so-called "teardrop" is arranged in their contact area, that is to say in the area where the overlap according to FIGS. 4 and 5 takes place, for connecting the fine conductor tracks 27 to the pads or connecting bores. This has a greater width than the fine conductor tracks, which facilitates a corresponding overlap of solder layer applied, for example, to pad 29 and teardrop 34 with a second photoresist layer applied to conductor track 27. The superimposition of "teardrop" and second photoresist layer for structuring the conductor tracks for the correct connection of pads / connecting bores and conductor tracks is less critical in this case than in the case of the fine conductor tracks 27 and associated pads without "teardrop" shown in FIG.

According to the invention, it can be summarized that the overlap of the solder layer and the second photoresist layer means that an interruption between pads / bore points and conductor tracks when the unnecessary metallization layer is removed from the circuit board is excluded. The superimposition is facilitated by arranging so-called "teardrops" with very thin conductor tracks. Small inaccuracies when structuring the conductor tracks are tolerated in this way.

In the method according to the invention, a number of complex process steps of the known manufacturing method of printed circuit boards are no longer necessary, such as removing the solder layer from conductor tracks and pads, the HAL process and all associated chemical and mechanical treatments of the printed circuit board. Furthermore, the solder layer can be applied to the pad with a controlled layer thickness and with a flat surface. The additional liquid solder used in the HAL process Layer for reapplying the solder layer on the pads is no longer necessary, which means that the environmental pollution caused by lead vapors, corresponding etching solutions and the like is eliminated at the same time. Finally, the method according to the invention is considerably less expensive than the manufacturing method using the HAL method, since the expensive HAL devices are no longer necessary.

Claims

EXPECTATIONS

1. A method for producing a printed circuit board with a first and a second surface, wherein at least on the first surface a plurality of connection contacts (pads) (6; 29, 30, 31) for soldering electronic components and a plurality of interconnects connecting the pads (27, 28) is applied, characterized by the following process steps:

i) applying a first photoresist layer (3) on at least a first metallized surface (2) of the printed circuit board;

ii) exposure of the first photoresist layer (3) by means of a first mask (19) and removal of regions of the first photoresist layer (3) for structuring the pads (4; 29, 30, 31);

iii) applying a solder layer (6) to the pads and removing the remaining, first photoresist layer (3);

iv) applying a second photoresist layer (7) on the first surface;

v) exposure of the second photoresist layer (7) by means of a second mask (20) for structuring the conductor tracks, the second photoresist layer (7) overlapping the solder layer (6) remaining on the conductor tracks and at least partially on the pads;

vi) removing the exposed metallization (2) of the printed circuit board and applying a solder stop layer (8) on the circuit board outside the pads (4; 29, 30, 31).

2. The method of claim 1, characterized in _/ that the pads (4; 29, 30, 31) in step ii) substantially in the direction of the conductor tracks facing terminal pieces (10; 21, are structured 22), where v in step) the second photo-resist layer (7) remains at least partly on the connecting pieces except on the conductor tracks.

3. The method according to claim 2, characterized by

Structuring additional bore points with corresponding connection pieces in step ii), drilling or punching connection bores (5, 32) at least in the bore points for connecting both surfaces of the printed circuit board and applying a metallization (2) at least within the connection bores.

4. The method according to any one of the preceding claims, characterized by a galvanic application of the solder layer (6) in step iii).

5. The method according to any one of the preceding claims, characterized in _/ that ii in steps) and v) as the first mask (19) tivmaske a positioning and a negative mask is used as the second mask (20), wherein the first photoresist layer (3) outside the pads / hole points and. associated connectors and the second photoresist layer (7) is exposed on the conductor tracks.

6. The method according to at least one of the preceding claims, characterized by

Melt the solder layer (6) on pads with connectors and / or connecting holes with connectors after step vi).

7. The method according to claim 6, characterized in _/ that the melting is performed by infrared irradiation.

8. The method according to at least one of the preceding claims, characterized in _/ that the solder resist (8) is applied photographically or by screen printing.

9. The method according to at least one of the preceding claims, characterized in that the structuring of the connecting pieces (10, 21, 22) with a larger width in comparison to the conductor tracks in step ii).

10. The method according to at least one of the preceding claims, characterized in _/ that the metallization of the circuit board by applying a

Copper finishing (2) takes place.

11. The method according to at least one of the preceding claims, characterized in _/ that a PbSn layer is applied as a solder layer (6).

12. A method for producing masks (19, 20) for the exposure of photoresist layers (3, 7) for use in the method according to one of the preceding claims, characterized by the following method steps:

a) producing a first basic mask (17) with an overall layout of all pads (4; 14, 15, 29, 30, 31) and / or bore points (5, 32) and / or conductor tracks (4, 14, 15, 29) 18, 24, 27, 28);

b) producing a second basic mask (11) with a layout for forming pads and / or bore points;

c) producing a first auxiliary mask (13) with a representation of pads and / or bore points of the first auxiliary mask enlarged by a first enlargement factor;

d) producing the first mask (19) by superimposing the first auxiliary mask (13) and the first basic mask (17);

e) producing a second auxiliary mask (12) with a representation of pads and / or bore points of the second basic mask (11) which is enlarged by a second enlargement factor which is smaller than the first enlargement factor;

f) producing the second mask (20) by superimposing the second auxiliary mask (12) and the first basic mask (17).

13. The method according to claim 12, characterized in _/ that, upon superposition of first and second auxiliary mask (12 _«Ft

13) with the first basic mask (17), centroids of pads and / or bore points of auxiliary masks (12, 13) and first basic mask (17) lie one above the other.

14. The method of claim 12 or 13, characterized in _/ that the draft of basic masks (11, 17) and auxiliary masks (12, 13), enlargement of the structures of the first base mask and the superposition of the first and second auxiliary mask (12, 13) with the first basic mask (17) is carried out by a CAD method.

15. The method according to claim 12 to 14, characterized in _/ that the first mask (19) at a junction of the conductor track and pad and / or bore point there has a widened connector compared to the conductor track.

16. Printed circuit board with pads (4, 29, 30, 31) arranged on at least one first surface and conductor tracks (27, 28) made of a metal (2) applied to an insulating substrate (1) of the printed circuit board at least on the pad-applied solder layer (6) and having a plate on the printed conductor except the pads coated solder resist layer (8), characterized in _/ that in a contact region (10) of pads (4, 29, 30, 31) and conductor tracks (27 , 28) the solder layer (6) is applied thereon.

17. Printed circuit board according to claim 6, characterized in that the contact area is formed by a connecting piece (10, 21, 22, 34) designed to connect the pad and assigned conductor track, on which the solder layer (6) and on it at least partially the photoresist layer (7) is applied.

18. Printed circuit board according to claim 17, characterized in _/ that the connecting piece (10, 21, 22, 34) is formed by an end portion of the conductor track (27, 28).

19. Printed circuit board according to any one of claims 16 to 18, characterized in _/ that the connecting piece has a larger in comparison with the track width.

20. Printed circuit board according to one of claims 16 to 19, characterized in that the photoresist layer (7) compared to the solder stop layer (8) ends at a greater distance from the pad (4, 14, 15, 29, 30, 31).

21. Printed circuit board with at least partially interconnected connecting bores (5, 32) for connecting ge opposite surfaces of the printed circuit board according to one of claims 16 to 20, characterized in that at least on an inner surface of a connecting hole (5, 32) is a metal ( 2) and the solder layer (6) are applied and at least on the first surface of the printed circuit board from the connecting bore the connector (10, 21, 2-2, 34) with solder layer (6) and photoresist layer (7) protrudes.

22. Printed circuit board according to one of claims 15 to 20, characterized in that the solder layer (6) made of PbSn and the metal (2) is copper.