Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
  • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
  • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
  • H01L29/70—Bipolar devices
  • H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
  • H01L29/744—Gate-turn-off devices
  • H01L29/745—Gate-turn-off devices with turn-off by field effect
  • H01L29/7455—Gate-turn-off devices with turn-off by field effect produced by an insulated gate structure

Definitions

• the present invention relates generally to the field of four-layer, latching semiconductor devices, and particularly to methods for controlling the conduction characteristics of such devices by modulating the voltage applied to the gate electrode of a MOSFET portion of the device.
• the gate structure of the power MOSFET has a very high steady-state impedance. This allows control of the device by a voltage source, since only relatively small gate drive currents are required to charge and discharge the input gate capacitance. Unfortunately, the ease of gating the power MOSFET is offset by its high on-state resistance arising from the absence of minority carrier injection. Hence, a combination of low-resistance bipolar-type current conduction with MOS gate control would provide the desired features of high operating forward current density and low gate drive power.
• a device known as an insulated gate bipolar transistor (IGBT) illustrates one approach to combining these features.
• a regenerative device known as MOS-controIled thyristor (MCT) exhibits less forward voltage drop than does the IGBT.
• This P-N-P-N structure can be regarded as two transistors - an upper NPN transistor and a lower PNP transistor - that are internally connected in such a fashion as to obtain regenerative feedback between each other.
• a thyristor may be considered as a combination of PNP and NPN bipolar transistors connected such that the base of each is driven by the collector current of the other. Once the thyristor is turned on via the gate electrode such that the requisite transistor turn- on current is supplied each transistor then drives the other into saturation.
• the thyristor is no longer under the control of its gate electrode and continues to operate even in the absence of gate drive current - a phenomenon known as regenerative latch-up.
• the large current flow characteristic of regenerative on-state operation may be extinguished by appropriate modification of the gate voltage, the current produced by the MCT may not be adjusted (i.e., "fine-tuned") during regenerative operation through modulation of the gate voltage.
• the MCT device of Fig.2 is turned off by reversing the polarity of the applied gate voltage so as to create an inversion layer at the surface of the N-region embedded between ' the P and P+ regions underlying the gate. In this way a p-channel field-effect transistor (FEET) within the device forms an active short circuit between the N+ cathode and P-base regions.
• FEET field-effect transistor
• the device will cease regenerative operation when the short-circuit current increases to the extent that the voltage across the N+/P junction falls below 0.7V.
• the maximum current which can be switched off by the MCT markedly decreases with increasing anode voltages at elevated temperatures. As a consequence, the current handling capability of the MCT has proven to be inadequate for particular circuit applications.
• Fig.3 shows a perspective view of a segment of a depletion-mode thyristor (DMT) device having a pair of entrenched MOS gate regions.
• Each trench region includes an elongated polysiiicon gate G insulated from the remainder of the device by an encapsulating oxide sleeve S.
• Practical implementations of DMT devices will typically include a plurality of the segments depicted in Fig. 3, with the polysiiicon gates from each segment being connected to a common gate contact (not shown). Regenerative operation within the thyristor section of the device (see Fig.
• 3) is instigated by applying a positive voltage to the common gate contact so as to form conductive channels at the interfaces between the vertical segments of the oxide sleeve S and the P-type semiconductor layer.
• the conductive channels facilitate electron flow from the upper N+ region at the top of the device into the N-type drift region upon application of a positive voltage to the anode contact.
• the electrons injected from the upper N+ layer into the drift region provide the base current required to turn-on the PNP transistor inherent within the thyristor section of the device. Actuation of the PNP transistor leads to the regenerative feedback described above, thus precipitating thyristor latch-up.
• In the regenerative on-state holes flow from the P+ anode into the upper P-type region via the N-type drift region. The hole current is collected by the cathode contact after flowing laterally through the P-base and P+ cathode diffusions.
• Regenerative operation within the device may be halted by applying a negative voltage to the gate contact.
• the negative voltage applied to the gate serves to extinguish the N-type conductive channels existing along the surfaces of the oxide adjacent the P-type layer.
• the negative gate voltage depletes the regions R between adjacent entrenched MOS gates of electrons.
• the resulting barrier to electron flow effectively formed between the P-type region and the N-type drift region breaks off regenerative current flow, thereby terminating thyristor-mode operation.
• the DMT device is capable of acceptable thyristor-mode operation, the entrenched gate structures make fabrication of the device relatively complicated and expensive.
• FIG 4 shows a three-dimensional representation of a segment of a base resistance controlled thyristor (BRT).
• the BRT depicted in Figure 4 may be characterized as a conventional thyristor in combination with a MOSFET device, with the MOSFET serving to decrease base resistance and base current when the thyristor is in the on-state.
• a positive voltage applied to the anode is supported across junction J1 between an N-drift region and a P-base region.
• the BRT may be turned on by applying a positive bias to the gate to create an N-type conductive channel at the surface of the P-base region. Electron flow is initially from the N+ emitter region through the conductive channel to the N-type base region.
• the complementary hole current originates within the P+ anode region and traverses the N-base to the P-base. As shown in Fig.4, the P-base is shorted to cathode contact #1 at a boundary B between the N+ emitter diffusion and the P-base. Accordingly, within the P-base the hole current flows laterally to cathode contact #1 , thereby creating the forward bias across the junction between the P-base and N+ emitter necessary to induce regenerative thyristor-mode operation.
• the BRT device depicted in Fig.4 is turned off by applying a negative voltage to the gate contact so as to create a P-type inversion layer along the underlying surface of the N-base region. Holes within the P-base will then tend to flow through this low-impedance inversion layer to a P+ diverter region, and then laterally through the diverter region to a P-channel MOS (PMOS) section of the device. Within the PMOS section a P-type inversion layer exists at the surface of the N-base region when the negative turn-off voltage is applied to the gate. Holes flow within this inversion layer from the P+ diverter to the P+ cathode diffusion, and are collected by cathode contact #2.
• PMOS P-channel MOS
• the P+ diverter region and PMOS region combine to form a considerable series turn-off resistance between the P-base and cathode contact #2.
• the BRT device of Fig. 4 thus has only a limited capability to extinguish large thyristor currents, since the associated large voltage drop through the series turn-off resistance will cause junction between the P-base and the N+ emitter to remain forward-biased.
• it as an object of the present invention to provide a base resistance controlled thyristor device having reduced resistance in the turn-off current path.
• the present invention addresses the foregoing objectives by providing a base controlled resistance thyristor structure having improved turn-off characteristics.
• the inventive thyristor structure includes anode and cathode electrodes, with a diverter electrode being connected to the cathode electrode.
• a multi-layer body of semiconductor material has a first surface and includes a regenerative portion operatively coupled between the anode and cathode electrodes, with a non- regenerative portion being operatively coupled between the anode and diverter electrodes.
• the regenerative portion includes adjacent first, second, third and fourth regions of alternating conductivity type arranged respectively in series between the cathode and anode electrodes, wherein the cathode electrode is in electrical contact with the first region and the anode electrode is in electrical contact with the fourth region.
• the inventive thyristor is turned on by applying an enabling voltage to an insulated gate electrode disposed adjacent the first surface such that a conductive channel is created in the regenerative portion via modulation of the conductivity therein. Impression of a non-enabling voltage upon the gate electrode extinguishes channel conductivity within the third region of the regenerative portion and forms a current path between the second region of the regenerative portion and the non-regenerative portion, thereby initiating turn-off of the device.
• the diverter electrode collects any charges remaining in the second region of the regenerative portion subsequent to application of the turn-off voltage to the gate electrode.
• FIG. 1 is a cross-sectional illustration of a conventional insulated gate bipolar transistor (IGBT) device.
• IGBT insulated gate bipolar transistor
• FIG 2 shows a prior art P-N-P-N regenerative semiconductor device generally known as a MOS-controlied thyristor (MCT).
• MCT MOS-controlied thyristor
• Figure 3 shows a perspective view of a segment of a prior art depletion-mode thyristor (DMT) device having a pair of entrenched MOS gate regions.
• DMT depletion-mode thyristor
• Figure 4 shows a perspective view of a segment of a conventional base resistance controlled thyristor (BRT).
• BRT base resistance controlled thyristor
• Figure 5 shows a cross-sectional representation of a preferred embodiment of the inventive base controlled MOS gated thyristor device.
• Figure 6 shows a simplified perspective view of a preferred embodiment of the thyristor device of the present invention in which, for purposes of clarity, the oxide and metallization layers above a substrate surface have been omitted from view.
• Figure 7 depicts a cross-sectional representation of an alternate preferred embodiment of the inventive base controlled MOS gated thyristor device.
• Figure 8 shows a simplified perspective view of the alternate preferred embodiment of the inventive thyristor device in which the oxide and metallization layers above a substrate surface have been omitted from view.
• FIG. 5 there is shown a cross-sectional representation of a preferred embodiment of the inventive base controlled MOS gated thyristor device 100.
• rapid turn-off of the device 100 is effected by diverting charge from a regenerative portion 110 to a non-regenerative portion 120 upon application of a turn-off voltage to a gate terminal 130. More specifically, applying the requisite turn-off voltage to gate terminal 130 creates a P-type conductive channel along the surface of a body of semiconductor material 140 underneath gate electrode 150.
• the conductive channel provides a low-resistance path from region 180 of regenerative portion 110 to a diverter electrode 152 coupled to cathode terminal 160.
• the resultant exodus of charge from region 180 through the electrode 152 serves to extinguish self-sustaining current flow within the regenerative portion 110, thereby expediting turn-off of the device 100.
• a single segment of the inventive thyristor 100 is depicted in Fig.5.
• the four-layer regenerative portion 110 of the semiconductor body 140 includes an emitter region 170 of N+ conductivity material, and a base region 180 of P conductivity material forming a first PN junction 190 with the emitter 170.
• a third layer of the regenerative portion of the thyristor device 100 is identified as a drift region 200, which consists of N-type semiconductor material adjacent to and forming a second PN junction 210 with the base region 180. As shown in Fig.
• the semiconductor body 140 is bounded by a substantially planar upper surface 142 defined in part by the uppermost portions of the emitter 170, base 180, and drift 200 regions.
• a set of reference coordinates are included in Fig. 5 and are used in the following description to specify direction.
• the drift region 200 separates the base 180 from a fourth layer, or anode region 220, of the regenerative portion 110.
• the drift region 200 includes an optional buffer layer 230 of N-type semiconductor, which forms a PN junction 234 with a P+ anode layer 240.
• the three-layer non-regenerative structure 120 is located adjacent to the four-layer regenerative portion 110, and is comprised of a P+ diverter diffusion 250, the drift region 200, and the anode region 240.
• Ohmic contacts exist between the lower surface of anode region 240 and an anode electrode 260, between the upper surface 142 of the P+ diffusion 250 and the diverter electrode 152, and between the N+ emitter and an emitter electrode 270
• Figure 6 shows a simplified perspective view of the thyristor device 100 in which, for purposes of clarity, the oxide and metallization layers above surface 142 have been omitted from view. However, it is noted that a metal layer (not shown) above surface 142 connects the divertor electrode 152 to the emitter electrode 270, thereby establishing an electrical connection between the divertor electrode 152 and the cathode terminal 160.
• Each region of the regenerative 110 and non-regenerative portions 120 of the device 100 forms an elongated segment in a Z-direction perpendicular to the X-Y plane of Fig. 5.
• the P-base 180 forms a well in which is disposed the N+ emitter 170.
• the cathode electrode 270 (not shown in Fig.6) extends back along the Z-direction so as to overlay both the N+ emitter 170 and the portion 272 of the P-base 180 behind the N+ emitter 170.
• the P-base 180 is electrically coupled to the cathode electrode 270, with the base resistance to the flow of holes in the Z- direction being represented by a base resistor R b (Fig. 5).
• the P+ diverter 250 extends in the X-direction and merges with the P-base diffusion 180 in a plane 280.
• the diverter and cathode electrodes 152 and 270 (Fig. 5) similarly merge at the plane 280, thus enabling holes within the P+ diverter 250 to be withdrawn through the cathode terminal 160.
• a thfn oxide layer 290 insulates the gate electrode 150 from the N+ diffusion 170, P-base diffusion 180, drift region 200, and P+ divertor region 250.
• the thickness of the thin oxide layer 290 is typically chosen such that an inversion layer may be formed in the P-type base 180 upon application of a typical gate turn-on bias to the electrode 212. For example, for a thin oxide thickness of 500 angstroms a gate voltage on the order of 5 to 15 volts will lead to creation of a conductive channel at the surface 142 of the base 180.
• the thyristor 100 With the cathode electrode 160 and gate terminal 130 held at the same (e.g., zero volt) potential, the thyristor 100 is in a forward blocking mode. In the blocking mode the device 100 behaves like an open circuit, and respectively supports positive and negative voltage differentials between the anode and cathode electrodes 260 and 270 across the PN junctions 210 and 234. The device is initially actuated by applying the requisite turn-on voltage to the gate terminal 130. The subsequent formation of a conductive channel at the surface of the P-type diffusion 180 proximate the thin oxide 290 allows electrons to be injected from the N+ region 170 into the drift region 200.
• the thyristor device 100 operates similarly to the conventional IGBT (Insulated Gate Bipolar Transistor) shown in Fig. 1.
• IGBT Insulated Gate Bipolar Transistor
• Current flow through the regenerative portion 110 has not yet become self-sustaining (i.e., latched-up) while the device 100 is in the IGBT mode, and hence the anode current remains dependent on the magnitude of the applied gate voltage.
• the electrons flowing from the N+ region 190 into the drift region 130 serve as base current for the PNP transistor inherent within the four layer regenerative portion 110.
• the resulting current flow is adequate to induce regenerative thyristor action (i.e. latch up) within the four layer portion 110.
• the onset of regenerative action (on- state) is precipitated by the flow of hole current laterally through the base 180 in the Z direction perpendicular to the plane of Fig. 5.
• the hole current produces a voltage drop which develops a forward bias across the junction 190, thereby causing electrons to be injected from the emitter 170 into the drift region 200.
• the hole current is collected by the cathode electrode 270 proximate the plane 280 (Fig. 6) after longitudinally traversing the base region 180 underneath the emitter 170.
• the anode current density at the onset of regenerative action will, for example, typically be approximately 25 Acm 2 for a Z-direction emitter length of 100 microns and a P-base sheet resistance of 3000 ohms/square.
• the regenerative portion 110 latches up and the device 100 operates in a regenerative mode.
• the device 100 includes a P-channel turn-off MOSFET 310 which incorporates the gate electrode 150 and underlying thin oxide 290, as well as the surface areas of the P-base 180, drift region 200, and diverter region 250 adjacent thereto.
• a negative voltage e.g., -15V
• the P+ diverter region and PMOS region included within the conventional BRT device of Figure 4 facilitate turn-off but combine to form a considerable series turn-off resistance. This limits the magnitude of thyristor current which may be extinguished, since the associated large voltage drop through the series turn-off resistance will cause the P-base to remain forward-biased relative to the N+ emitter.
• the inventive thyristor 100 is capable of terminating relatively high thyristor currents as a consequence of the low-impedance path created between the diverter electrode 152 and the P-base 180 during device turn-off.
• FIG. 7 there is shown a cross-sectional representation of an alternate preferred embodiment of the inventive base controlled MOS gated thyristor device 400.
• the device 400 operates in substantially the same manner as the device 100, with rapid turn-off being effected by diverting charge from a regenerative portion 410 to a non-regenerative portion 420 upon application of a turn-off voltage to a gate terminal 430. More specifically, applying the requisite turn-off voltage to gate terminal 430 creates P-type conductive channels along the surface of a body of semiconductor material 440 underneath first and second gate electrodes 450 and 454.
• the conductive channels in conjunction with a floating P+ region 458, provide a low-resistance path from the regenerative portion 420 to a diverter electrode 450 coupled to cathode terminal 460.
• the flow of charge from the regenerative portion 410 through the electrode 450 serves to extinguish self-sustaining current flow within the regenerative portion 410, thereby expediting turn-off of the device 400.
• FIG 8 shows a simplified perspective view of the thyristor device 400 in which, for purposes of clarity, the oxide and metallization layers above surface 440 have been omitted from view.
• each region of the regenerative 410 and non- regenerative portions 420 of the device 400 forms an elongated segment in a Z-direction perpendicular to the X-Y plane of Fig.7.
• Inspection of Figures 6 and 8 reveals that the embodiments 100 and 400 of the inventive thyristor are substantially similar in structure, with the exception that the device 400 includes the P+ floating emitter region 458 as well as a first and a second P-channel MOSFET 480 and 484 (Fig. 7).
• the P+ floating region 458 extends longitudinally in the Z-direction and is buffered from P-base region 490 and P+ diverter region 500 by N-type drift region 510.
• the gate structures of the first and second MOSFETs 480 and 484 merge in an area G between the rear boundary of P+ floating region 458 and the P+ diverter 500.
• the floating region 458 provides a low-impedance path between the first and second MOSFETs 480 and 484 during device turn-off.
• the P+ diverter region 500 initially extends in the Z-direction from the cross-section depicted in Figure 7, and then bends in the X-direction to merge with the P-base region 490 in a plane 530.
• the diverter electrode 450 and a cathode electrode 550 similarly merge at the plane 530, thus enabling holes within the P+ diverter 500 to be withdrawn through the cathode terminal 160 during device turn-off.
• thyristor devices incorporating the teachings of the present invention may be embodied in semiconductor structures which differ from those depicted in the Figures.
• the diverter region need not be realized using the specific diffusion geometry specified herein.
• Those skilled in the art may be aware of other device geometries disposed to collect holes from the regenerative portion of the thyristor during device turn-off.

Landscapes

• Engineering & Computer Science (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Physics & Mathematics (AREA)
• Ceramic Engineering (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Computer Hardware Design (AREA)
• Thyristors (AREA)

Applications Claiming Priority (3)

Publications (1)

Family

ID=25366307

Family Applications (1)

Country Status (4)

Families Citing this family (5)

Family Cites Families (4)

• 1993
  • 1993-04-21 WO PCT/US1993/003789 patent/WO1993022798A1/en not_active Application Discontinuation
  • 1993-04-21 CA CA 2133585 patent/CA2133585A1/en not_active Abandoned
  • 1993-04-21 EP EP93910724A patent/EP0638204A1/de not_active Withdrawn
  • 1993-04-21 JP JP5519372A patent/JPH07506933A/ja active Pending

Non-Patent Citations (1)

Also Published As

Similar Documents

Legal Events