EP0524243A4 - - Google Patents

Info

Publication number
EP0524243A4
EP0524243A4 EP19910907882 EP91907882A EP0524243A4 EP 0524243 A4 EP0524243 A4 EP 0524243A4 EP 19910907882 EP19910907882 EP 19910907882 EP 91907882 A EP91907882 A EP 91907882A EP 0524243 A4 EP0524243 A4 EP 0524243A4
Authority
EP
European Patent Office
Prior art keywords
panel
voltage
direct current
relative luminance
luminance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19910907882
Other languages
English (en)
French (fr)
Other versions
EP0524243A1 (en
Inventor
Leonid Shapiro (Nmi)
William K. Bohannon
Randall S. Farwell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Proxima Corp
Original Assignee
Proxima Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/506,621 external-priority patent/US5089810A/en
Application filed by Proxima Corp filed Critical Proxima Corp
Publication of EP0524243A1 publication Critical patent/EP0524243A1/en
Publication of EP0524243A4 publication Critical patent/EP0524243A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/12Picture reproducers
    • H04N9/31Projection devices for colour picture display, e.g. using electronic spatial light modulators [ESLM]
    • H04N9/3102Projection devices for colour picture display, e.g. using electronic spatial light modulators [ESLM] using two-dimensional electronic spatial light modulators
    • H04N9/312Driving therefor
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/57Control of contrast or brightness
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/12Picture reproducers
    • H04N9/31Projection devices for colour picture display, e.g. using electronic spatial light modulators [ESLM]
    • H04N9/3179Video signal processing therefor
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/64Circuits for processing colour signals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/02Composition of display devices
    • G09G2300/023Display panel composed of stacked panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0247Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0271Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/74Projection arrangements for image reproduction, e.g. using eidophor
    • H04N5/7416Projection arrangements for image reproduction, e.g. using eidophor involving the use of a spatial light modulator, e.g. a light valve, controlled by a video signal
    • H04N5/7441Projection arrangements for image reproduction, e.g. using eidophor involving the use of a spatial light modulator, e.g. a light valve, controlled by a video signal the modulator being an array of liquid crystal cells
    • H04N2005/745Control circuits therefor

Definitions

  • the present invention relates, in general, to a stacked display panel system and a method of making it, in an improved manner. More particularly, the present invention relates to a stacked liquid crystal display panel system and method of making it, to improve the quality of the light images produced thereby.
  • a series of display panels and associated polarizers or filters are arranged along an optical path.
  • the relative luminance of the individual panels is also effected by the order in which the panel assemblies are disposed within a stacked arrangement; i.e., a panel disposed more closely to the light source generally exhibits greater light transmittance characteristics as compared to a panel which is disposed more remotely from the light source along the common optical path because of the induced heating by the light source.
  • a liquid crystal color filter which includes a set of differently colored dichroic polarizers interposed with an equal number of voltage responsive twisted nematic liquid crystal cells, and a neutral polarizer.
  • Each of the above described elements are arranged along an optical path in a predetermined manner for modifying the spectral content of visible light incident to the filter to produce any one of eight predetermined colors. Shades of the predetermined colors are achieved by varying the voltage applied to the individual liquid crystal cells.
  • the principal object of the present invention is to provide a new and improved display panel system, and a method of making it, to produce improved light image characteristics, and yet be able to manufacture such a system according to modern mass production techniques.
  • Another object of the present invention is to provide such a new and improved display panel system, and a method of making it, wherein the system includes a stacked display panel construction, and wherein the display panel stages or assembles are balanced optically from assembly to assembly.
  • a new display panel system includes a stacked display panel and drive units therefor.
  • the drive units include a computer for adjusting for the individual gamma characterics of each one of the display panels for color balancing purposes and for causing the luminance of each panel to be maximized, or at least greatly increased for each intensity level or shading of each color.
  • FIG. 1 is a block diagram of a display panel system, which is constructed in accordance with the present invention
  • FIG. 2 is a symbolic block circuit diagram of a voltage level control unit of the system of FIG. 1;
  • FIG. 3 is a diagrammatic and block diagram view of a display panel construction of the system of FIG. 1, illustrating it being used in a conventional overhead projector as controlled by a computer; and
  • FIGS. 4-10 are graphs useful in the understanding of the present invention.
  • Fig. 1 there is shown display panel system 9, which is constructed in accordance with the present invention, and which produces multicolored display images.
  • the display panel system 9 generally comprises a liquid crystal display panel assembly 10, which includes a liquid crystal display panel construction, shown generally at 11 and a video processing unit 12 which are more fully described in copending U.S. patent application Serial No. 07/506,429 filed concurrently herewith, and foregoing mentioned U.S. patent application Serial No. 07/472,668 which are incorporated herein by reference.
  • the panel construction 11 includes a set of liquid crystal display panels 13, 14, and 15 which are disposed along a common optical path, which includes a collimating unit 20 and focusing unit 21 for directing light along the common optical path.
  • the panel construction 11 also includes a set of spaced apart polarizers 16, 17, 18, and 19 which are also interleaved with, and optically aligned withthe display panels 13, 14, and 15 along the common optical path.
  • the gamma curve adjustment system 10 generally comprises a linearization network 50 having a set of voltage level control circuits 52, 54, and 56 connected to the respective ones of the display panels 13, 14, and 15, for adjusting the initial direct current voltage applied to each one of the respective liquid crystal display panels to utilize substantially the full gamma curve characteristic for each respective panels, as will be explained hereinafter in greater detail.
  • the linearization network 50 also tracks or follows the respective gamma curves characteristic for each one of the panels 13, 14, and 15, to permit the contrast level of the panel assembly 11 to be adjusted, without color distortion as will be explained hereinafter in greater detail.
  • Each of the voltage level control circuits 52, 54, and 56 is coupled between the individual liquid crystal display panels 13, 14, and 15 respectively, and a set of associated video drive units 23, 24, and 25 respectively.
  • the drive units 23, 24, and 25 form part of the video processing unit 12.
  • Each of the video drive units 23, 24, and 25 are also coupled to their respective liquid crystal display panels 13, 14, and 15 by suitable means (not shown) , and are more fully described in the foregoing mentioned copending U.S. patent application Serial No. 07/472,668.
  • Each one of the liquid crystal display panels is used for a different color, and exhibits a different relative luminance as a function of the voltage applied to the respective liquid crystal display panels, such as panels 13, 14, and 15.
  • FIGS. 4, 5, and 6 show three typical gamma curves 28, 30, and 32 for panels 13, 14, and 15 respectively. As each of these curves is substantially identical in form, only gamma curve 28 will be described hereinafter in greater detail.
  • the individual voltage level control circuits 52, 54, and 56 are adjusted to provide an initial direct current reference voltage (V f ) for their respective liquid crystal display panels 13, 14, and 15, to enable a maximum amount, if not a high percentage of relative luminance to be produced by each of the panels 13, 14, and 15.
  • V f initial direct current reference voltage
  • the assembly 10 enables a high percentage, if not a maximum percentage, of luminance to be achieved for each level of color intensity displayed for each pixel.
  • each of the voltage level control circuits 52, 54, and 56 are similar to one another, except as will be explained hereinafter in greater detail. Accordingly, with reference to FIG. 2, only control circuit 56 will now be described.
  • the voltage level control circuit 56 is responsive to digital signals supplied by a microprocessor 38 disposed within the video drive unit 25. As more fully explained in the foregoing mentioned pending patent applictions, each one of the digital signals supplied by the microprocessor 38 is indicative of a given shading or color level for a displayable pixel forming part of the image produced by the panel assembly 10.
  • the voltage level control circuit 56 supplies a selected operating voltage level to the panel 15, which,m in turn, enables each displayable pixel to be displayed with a maximum, if not a relative high percentage of relative luminance for helpting to contrast one shading level from another.
  • the voltage level control circuit 56 includes a digital to analog converter 58 for converting digital signals from the computer 38, into analog voltage levels indicative of the different panel operating voltage levels for each color intensity level, to maximize, or at least to increase greatly the luminance of contrasting shading levels.
  • the voltage level control circuit 56 also includes a differential amplifier 60 for amplifying the analog voltage signal supplied by digital to analog converter 58 into an appropriate operating voltage level for the panel 15.
  • the control circuit 56 also includes a feedback gain control arrangement 62 for determining the amount of gain for the input signal to the amplifier 60.
  • the voltage level control circuit 56 also includes a direct current voltage offset arrangement 70.
  • the digital to analog converter 58 tend to maximize the number of discrete operating voltage levels between the threshold voltage level V ⁇ and the saturation voltage level V SAT .
  • the digital to analog converter 58 is also selected to have discrete voltage level steps or increments, which are balanced with the voltage increment levels produced by the digital to analog converters in each of the other control circuits 52 and 54. It should, therefore, be understood that the digital to analog converters of each one of the control circuits perform similar functions but will necessarily have different voltage increment step capabilities to compensate for the individual operating characteristics of their corresponding display panels 13, 14, and 15 respectively.
  • the feedback gain arrangement includes two current limiting resistors 67 and 72 which are selected to cause the differential amplifier 60 to amplify the output voltage from the digital to analog converter 58, to an appropriate voltage.
  • the resistance values of the resistors in the other feedback gain arrangements for control circuits 52 and 54 may be different than the resistance values of resistors 67 and 72, although they perform a similar function.
  • the resistor 72 connects the output of the digital to analog converter at 81 to the negative or inverting input 82 of the differential amplifier 60.
  • the negative or inverting input 82 of the amplifier 60 is also coupled through resistor 67 via conductors 83 and 84 to an output 85 of the amplifier 60.
  • Resistor 72 is a 5 kohm resistor while resistor 67 is a 10 kohm resistor.
  • the output 85 of the amplifier 60 is connected to the liquid crystal display panel 15 to provide a selected operating voltage for attempting to maximize contrasting shading or color levels, so that each pixel energized at one level will be easily distinguished from every other pixel energized at different shading levels of the same basic color.
  • the noninverting or positive input of the amplifier 60 is coupled to the offset adjustment arrangement 70 by a conductor 86.
  • the offset arrangement 70 consist of a manually adjustable potentimeter 75 which has its wiper or tap connected to the noninverting input of amplifier 60 by the conductor 86.
  • the offset arrangement also includes a pair of voltage divider resistor 74 and 76 for providing the proper reference voltage to the amplifier 60 as a function of the resistance setting of potentimeter 75.
  • Resistor 74 is coupled to ground by conductor 90 and the potentimeter 75 by conductor 89.
  • the resistor 76 is coupled to a negative voltage source (not shown) by conductor 87 and the opposite terminal of potentimeter 75 by conductor 88.
  • Resistor 74 is a 1.5 Kohm resistor
  • resistor 76 is a 10 Kohm resistor
  • potentimeter 75 is a 2.0 Kohm potentimeter.
  • the gamma curve 28 illustrates the relative luminance of panel 13 as a function of the voltage applied by the voltage level control circuit 52 to the panel 13.
  • the gamma curve 28 is developed by positioning the liquid crystal display panel assembly 10 on an overhead projector 40 and focusing the light output of the system 10 into the projection lense of the overhead projector 40 to display an image (not shown) on a viewing screen or surface 43.
  • the light source of the overhead projector 30 directs light into the collimating unit 20 for collimating the light.
  • the system 10 is then electrically activated so that each panel (and all the associated displayable pixels within the panels) 13, 14, and 15 is placed in a saturated state by their associate voltage level control circuits 52, 54, and 56 respective, thus, enabling the panel construction 11 to pass noncolored light or light exhibiting the maximum relative luminance.
  • This maximum relative luminance has an associated direct current reference or saturation voltage (V jj ..) which is measured by a user and record to form part of the gamma curve 28.
  • a processor program 100 is then activated by a user to cause the microprocessor 30 to generate a test pattern for displaying on the screen 43.
  • the test pattern consists of three sets of discrete shading or color level setting, one set for each respective panel. Each set is substantially identical so only one will be described hereina ter.
  • a computer 35 (FIG. 3) is capable of producing at least 8 different shades of color where each shade is represented by a discrete digital code. These discrete colors are capable of being combined either in graphic or text form by the computer 35 to produce a display image which may be displayed on the screen of an associated video monitor; such as monitor 36 or on the viewing screen 43. Ideally the shading or contrast levels in the displayed images should be substantially the same as between the image displayed on the monitor 36 and the image displayed on the screen 43.
  • the processor program 100 enables the system 9 to be adjusted so that the full gamma curve 28 can be utilized so the system 9 can produce a full spectrum with colors.
  • a user manually adjusted the reference potentimeter, such as potentimeter 75, to vary the direct current voltage applied to the panel 13 and using a photometer 45 measures the relative luminance with calibraated red, blue and photic filters of the panel 13 as a function of the applied voltage.
  • the program 100 generates a test pattern of 8 discrete shading or color levels and causes the drive units to generate signals for producing on a screen by screen basis each individual discrete level within the 8 discrete levels.
  • the program code for program 100 is assembled in 870451 assembly language and is attached to this application as appendix A and represents the actual relative luminance of the panel 13 for each of the individual 8 shading or color levels as measured by a user.
  • the selected level is displayed and then using the photometer the relative red, green, or blue luminance of the screen 43 is measured as the potentimeter 75 is varied between V ⁇ and V SAT .
  • the measured relative luminance is recorded.
  • maximum color level level 0
  • VT threshold voltage
  • levels 0 to 7 should be equally spaced apart on the gamma curve 28 between V ⁇ and V SAT .
  • the gamma curve in FIG. 3 part of the gamma curve as a function of the applied voltage that permitted the maximum luminance for the displayed level to be distinguished from the next lowest level.
  • the above disclosed process is repeated until all 8 levels of shading have been recorded to produce the gamma curve 28.
  • the process is then repeated for the other panels to produce the other gamma curves 30 and 32. It should be noted that when recording the relative luminance level of the panels 13, 14, and 15, blue, red, and green filters (not shown) are used in the photometer 34 for recording the relative luminance as a function of applied voltage.
  • the digital signals generated by the microprocessor 38 correspond to the discrete shading levels. Accordingly, after determining the gamma curve response of the panels 13, 14, and 15, the microprocessor 38 is programmed by the user via a direct current voltage default program 200 to adjust the operating voltage to utilize the full gamma curve. More particularly, for example, with reference to the blue panel, an offset of 18 levels is established to better use the gamma curve 28.
  • a level 1 shading signal is received by the microprocessor 38 from the computer 35, the microprocessor which convey the level 1 shading signal into a psuedo level signal indicative of level 19 so that the output voltage of amplifier 60 will correspond to a level 19 applied voltage as opposed to the actual level 1 signal.
  • microprocessor 38 generates a series of pseudo signal that increment and decriment the applied voltage to maximum relative luminance between the discrete shading or color levels.
  • FIGS. 7-9 illustrate the respective gamma curve 28A, 30A, and 32A and the relative luminance for the discrete shading levels when the microprocessor 38 has been programmed to offset the digital signals as described above.
  • the gamma curves 28A, 30A, and 32A in greater detail with reference to FIG. 10, it will be noted that when the three gamma curves are superimposed on the same graph that they have substantially different discrete level shifts over the full 8 discrete levels.
  • the relative luminance of the red panel varies between 5.5 cd/m 2 and 19.7 cd/m 2 , as the applied voltage varies between -17.5 volts (V ⁇ ) and -20.5 volts
  • the relative luminance varied between 5.0 cd/m 2 and 10.5 cd/m 2 .
  • step voltage changes vary substantial between different panels.
  • each of the d/a converters associated with the voltage level control circuits, such as d/a converter 58 have different step voltage responses that are selected to balance the color contrast between the panels 13, 14, and 15.
  • the user may press a selected function key on a keyboard or utilize other equivalent means such as a remote control infrared transmitter coupled to the microprocessor 38 by an infrared link.
  • Appendix A is a source code listing of a firmware computer program stored in the microprocessor 38 for controlling the operation of the system 9.
  • the source code for controlling the tracking operation is disclosed.
  • the system 9 enables eight optimum operating levels for each one of the three color stages.
  • the microprocessor 38 provides a direct current bias signal for the given panel to bias the operation of the panel at the top of the luminance curve, so that when the computer 38 calls for a given intensity level, that designated level is optimized, since the intensity level voltage supplied to the panel is off-set by the d.c. bias voltage from the amplifier 60, thereby providing an optimized image display.
  • the optimized image display is one where the luminance is of a sufficiently high relative value, and the contrast is also of a sufficiently high value.
  • This voltage values corresponding the given bias level for a given computer 35 and a given panel are stored in the gamma curve look ⁇ up table found in the firmware to cause the amplifier 60 to generate the desired bias voltage level, for the top portion of the gamma curve.
  • the contrast consideration takes into account that a manual contrast input (not shown) for the system 9 provides only a single decrement or increment, and yet the firmware determines three corresponding decremental or incremental changes in the voltage levels for the three different color panels of the system 9.

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Transforming Electric Information Into Light Information (AREA)
  • Picture Signal Circuits (AREA)
  • Overhead Projectors And Projection Screens (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
EP91907882A 1990-04-09 1991-04-08 Stacked display panel construction and method of making same Withdrawn EP0524243A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US506621 1990-04-09
US07/506,621 US5089810A (en) 1990-04-09 1990-04-09 Stacked display panel construction and method of making same

Publications (2)

Publication Number Publication Date
EP0524243A1 EP0524243A1 (en) 1993-01-27
EP0524243A4 true EP0524243A4 (enExample) 1994-01-05

Family

ID=24015344

Family Applications (1)

Application Number Title Priority Date Filing Date
EP91907882A Withdrawn EP0524243A1 (en) 1990-04-09 1991-04-08 Stacked display panel construction and method of making same

Country Status (4)

Country Link
EP (1) EP0524243A1 (enExample)
JP (1) JPH04251219A (enExample)
AU (1) AU7684191A (enExample)
WO (1) WO1991015931A1 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3116472B2 (ja) * 1991-11-18 2000-12-11 ソニー株式会社 ホワイト・バランス調整方法
JPH06138849A (ja) * 1992-10-30 1994-05-20 Sharp Corp 液晶映像表示装置
JPH10133163A (ja) * 1996-10-31 1998-05-22 Sony Corp 映像投射装置およびその調整方法
US6388648B1 (en) 1996-11-05 2002-05-14 Clarity Visual Systems, Inc. Color gamut and luminance matching techniques for image display systems
US6043797A (en) * 1996-11-05 2000-03-28 Clarity Visual Systems, Inc. Color and luminance control system for liquid crystal projection displays
JP4518623B2 (ja) * 2000-05-10 2010-08-04 三菱電機株式会社 投写型液晶表示装置
NZ517713A (en) * 2002-06-25 2005-03-24 Puredepth Ltd Enhanced viewing experience of a display through localised dynamic control of background lighting level

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58209716A (ja) * 1982-05-31 1983-12-06 Mitsubishi Electric Corp 液晶表示装置
US4868668A (en) * 1986-08-21 1989-09-19 Electrohome Limited System and method for image adjustment in an optical projection system
JPH0666018B2 (ja) * 1987-01-09 1994-08-24 株式会社日立製作所 液晶プロジェクション装置
JP2651164B2 (ja) * 1987-11-10 1997-09-10 シチズン時計株式会社 カラー液晶表示装置
JPH01281497A (ja) * 1988-05-09 1989-11-13 Seiko Epson Corp 液晶表示装置
US4921334A (en) * 1988-07-18 1990-05-01 General Electric Company Matrix liquid crystal display with extended gray scale

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
No further relevant documents have been disclosed. *

Also Published As

Publication number Publication date
AU7684191A (en) 1991-10-30
EP0524243A1 (en) 1993-01-27
WO1991015931A1 (en) 1991-10-17
JPH04251219A (ja) 1992-09-07

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