EP0499657B1 - Integratable shunt regulator - Google Patents

Integratable shunt regulator Download PDF

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Publication number
EP0499657B1
EP0499657B1 EP91102283A EP91102283A EP0499657B1 EP 0499657 B1 EP0499657 B1 EP 0499657B1 EP 91102283 A EP91102283 A EP 91102283A EP 91102283 A EP91102283 A EP 91102283A EP 0499657 B1 EP0499657 B1 EP 0499657B1
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EP
European Patent Office
Prior art keywords
transistor
shunt regulator
supply voltage
transistors
terminals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP91102283A
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German (de)
French (fr)
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EP0499657A1 (en
Inventor
Günter Dipl.-Ing. Donig
Bruno Dipl.-Ing. Scheckel
Karl-Reinhard Dipl.-Ing. Schön
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Siemens AG
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Siemens AG
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Filing date
Publication date
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Priority to DE59105528T priority Critical patent/DE59105528D1/en
Priority to EP91102283A priority patent/EP0499657B1/en
Priority to ES91102283T priority patent/ES2071849T3/en
Priority to US07/837,278 priority patent/US5229708A/en
Publication of EP0499657A1 publication Critical patent/EP0499657A1/en
Application granted granted Critical
Publication of EP0499657B1 publication Critical patent/EP0499657B1/en
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/613—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in parallel with the load as final control devices
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

Description

Die Erfindung betrifft einen integrierbaren Shunt-Regler mit einem steuerbaren Halbleiterbauelement, dessen Laststrecke zwischen die Pole einer Versorgungsspannungsquelle geschaltet ist, und dessen Steuereingang mit dem Ausgang eines Differenzverstärkers verbunden ist.The invention relates to an integrable shunt regulator with a controllable semiconductor component, the load path of which is connected between the poles of a supply voltage source and the control input of which is connected to the output of a differential amplifier.

Ein derartiger Shunt-Regler dient als Spannungsregler und ist z.B. aus der GB-A-2226664 auch als sogenannter Parallelregler bekannt. Die Laststrecke eines Halbleiterbauelementes z. B. eines Leistungstransistors liegt dabei zwischen den Polen der zu regelnden Versorgungsspannung. Der Leistungstransistor wird durch einen Operationsverstärker gesteuert, welcher wiederum von einer Referenzspannungsquelle gespeist wird. Als Referenzspannung dient dabei meist eine sogenannte Bandabstands-Referenz. Diese ist z. B. aus Halbleiterschaltungstechnik, Tietze Schenk, 8. Auflage 1986, Seite 534 ff bekannt.Such a shunt regulator serves as a voltage regulator and is e.g. from GB-A-2226664 also known as a so-called parallel regulator. The load path of a semiconductor device z. B. a power transistor lies between the poles of the supply voltage to be regulated. The power transistor is controlled by an operational amplifier, which in turn is fed by a reference voltage source. A so-called bandgap reference usually serves as the reference voltage. This is e.g. B. from semiconductor circuit technology, Tietze Schenk, 8th edition 1986, page 534 ff known.

Einen eine Bandabstands-Referenz sowie einen Parallelregler aufweisender Shunt-Regler ist aus dem Linear Circuits Data Book von Texas Instruments, 1984 auf S. 6-99 ff bekannt. Dieser einstellbare Shunt-Regler weist drei Anschlüsse auf, wobei Anode und Kathode des Shunt-Reglers mit den Polen einer Versorgungsspannung zu verbinden sind und dem Referenzeingang beispielsweise eine Referenzspannung über einen Spannungsteiler zugeführt werden muß. Der in der Schaltung auf S. 6-99 gezeigte Shunt-Regler ist relativ kompliziert aufgebaut und weist eine geregelte Bandabstands-Referenz, deren Spannungswert von außen einstellbar ist sowie einen mit ihr verkoppelten Operationsverstärker auf. Diese Lösung hat den Nachteil einer erhöhten Schwingneigung durch die beiden verkoppelten Operationsverstärker.A shunt controller having a bandgap reference and a parallel controller is known from the Linear Circuits Data Book by Texas Instruments, 1984 on pp. 6-99 ff. This adjustable shunt regulator has three connections, the anode and cathode of the shunt regulator being connected to the poles of a supply voltage and a reference voltage, for example, having to be supplied to the reference input via a voltage divider. The shunt controller shown in the circuit on p. 6-99 has a relatively complicated structure and has a regulated bandgap reference, the voltage value of which can be adjusted from the outside, and an operational amplifier coupled to it. This solution has the disadvantage of an increased tendency to oscillate due to the two coupled operational amplifiers.

Speziell bei der Verwendung eines derartigen Shunt-Reglers in Chip-Karten oder in Chip-Schlüsseln ist weniger eine hohe Genauigkeit der Ausgangsspannung als ein möglichst platzsparender einfacher Aufbau des Shuntreglers gefordert. In derartigen Systemen ist zur genauen Ausregelung der Betriebsspannung meist ein Serienregler dem Shunt-Regler nachgeschaltet. Der Shunt-Regler dient hier also nur zur Vorstabilisierung.Especially when using such a shunt regulator in chip cards or in chip keys, less high accuracy of the output voltage is required than a simple, space-saving design of the shunt regulator. In systems of this type, a series regulator is usually connected downstream of the shunt regulator for precise regulation of the operating voltage. The shunt controller is only used for pre-stabilization.

Aufgabe der Erfindung ist es daher einen integrierbaren ShuntRegler anzugeben, der mit möglichst wenig Aufwand die Ausgangsspannung in einem definierten Bereich hält.The object of the invention is therefore to provide an integrable shunt regulator which keeps the output voltage in a defined range with as little effort as possible.

Diese Aufgabe wird durch folgende Merkmale gelöst:

  • ein erster und ein zweiten Transistor 4, 5 vorgesehen, deren Basisanschlüsse und Kollektoranschlüsse miteinander und mit dem einen Pol (1) der Versorgungsspannungsquelle verschaltet sind,
  • drei Widerstände 6, 7, 8 sind vorgesehen,
  • der Emitteranschluß des ersten Transistors 4 ist zum einen über den ersten Widerstand 6 mit dem anderen Pol 2 der Versorgungsspannungsquelle und zum anderen mit dem ersten Eingang 20 des Differenzverstärkers 9 verbunden,
  • der Emitteranschluß des zweiten Transistors 5 ist über eine Reihenschaltung aus zweitem und drittem Widerstand 7, 8 mit dem anderen Pol 2 der Versorgungsspannungsquelle verbunden,
  • die Reihenschaltung der beiden Widerstände 7, 8 weist einen Verbindungsknoten auf, der mit dem zweiten Eingang (19) des Differenzverstärkers (9) verbunden ist.
This task is solved by the following features:
  • a first and a second transistor 4, 5 are provided, the base connections and collector connections of which are connected to one another and to one pole (1) of the supply voltage source,
  • three resistors 6, 7, 8 are provided,
  • the emitter connection of the first transistor 4 is connected on the one hand via the first resistor 6 to the other pole 2 of the supply voltage source and on the other hand to the first input 20 of the differential amplifier 9,
  • the emitter connection of the second transistor 5 is connected to the other pole 2 of the supply voltage source via a series connection of second and third resistors 7, 8,
  • the series connection of the two resistors 7, 8 has a connection node which is connected to the second input (19) of the differential amplifier (9).

Vorteil des erfindungsgemäßen Shunt-Reglers ist, daß er lediglich zwei Versorgungsspannungsanschlüsse ohne Steuer- oder Referenzeingang aufweist. Die Referenzspannungserzeugung geschieht mittels einer Bandabstands-Referenz derart, daß die Ausgangsgröße des Regelverstärkers die zu regelnde Spannung selbst ist.The advantage of the shunt regulator according to the invention is that it has only two supply voltage connections without a control or reference input. The reference voltage is generated by means of a bandgap reference in such a way that the output variable of the control amplifier is the voltage to be controlled itself.

Die Erfindung wird nachfolgend anhand von zwei Figuren näher erläutert. Es zeigen:

FIG 1
ein erstes Ausführungsbeispiel eines erfindungsgemäßen Shunt-Reglers,
FIG 2
eine Ausführungsform einer Bandabstands-Referenz.
The invention is explained in more detail below with reference to two figures. Show it:
FIG. 1
a first embodiment of a shunt controller according to the invention,
FIG 2
an embodiment of a bandgap reference.

Der in FIG 1 gezeigte Shunt-Regler weist zwei Anschlußklemmen 1, 2 auf, an denen die Versorgungsspannungsquelle anschließbar ist. Im gezeigten Beispiel liegt der positive Pol der Versorgungsspannungsquelle am Anschluß 1 und der negative Pol der Versorgungsspannungsquelle am Anschluß 2. Als Parallelregler ist ein Halbleiterbauelement, z. B. ein MOSFET 3 vorgesehen, dessen Laststrecke zwischen den Anschlußklemmen 1 und 2 geschaltet ist. Zur Ansteuerung des MOSFET 3 dient ein Operationsverstärker 9, dessen Ausgang mit dem Gate des MOSFET 3 verbunden ist. Der Operationsverstärker weist einen positiven und einen negativen Eingang auf. Desweiteren sind zwei npn-Transistoren 4, 5 vorgesehen. Die Basisanschlüsse und die Kollektoranschlüsse der beiden Transistoren 4, 5 sind miteinander verbunden und mit der Eingangsklemme 1 verschaltet. Der Emitteranschluß des ersten Transistors 4 ist über einen Widerstand 6 mit dem zweiten Anschluß 2 verschaltet. Außerdem ist der Emitteranschluß des ersten Transistors 4 mit dem negativen Eingang 20 des Operationsverstärkers 9. Weiterhin ist der Emitteranschluß des zweiten Transistors 5 über die Reihenschaltung eines zweiten und dritten Widerstandes 7, 8 mit dem Anschluß 2 verbunden. Die Reihenschaltung der beiden Widerstände 7, 8 weist einen Verbindungsknoten auf, der mit dem positiven Eingang 19 des Operationsverstärkers 9 verschaltet ist.The shunt regulator shown in FIG. 1 has two connection terminals 1, 2 to which the supply voltage source can be connected. In the example shown, the positive pole of the supply voltage source is at connection 1 and the negative pole of the supply voltage source at connection 2. As a parallel regulator, a semiconductor component, for. B. a MOSFET 3 is provided, the load path between the terminals 1 and 2 is connected. To control the MOSFET 3, an operational amplifier 9 is used, the output of which is connected to the gate of the MOSFET 3. The operational amplifier has a positive and a negative input. Furthermore, two NPN transistors 4, 5 are provided. The base connections and the collector connections of the two transistors 4, 5 are connected to one another and connected to the input terminal 1. The emitter connection of the first transistor 4 is connected to the second connection 2 via a resistor 6. In addition, the emitter connection of the first transistor 4 is connected to the negative input 20 of the operational amplifier 9. Furthermore, the emitter connection of the second transistor 5 is connected to the connection 2 via the series connection of a second and third resistor 7, 8. The series connection of the two resistors 7, 8 has a connection node which is connected to the positive input 19 of the operational amplifier 9.

Die Bandabstands-Referenz wird durch die Transistoren 4, 5 sowie die Widerstände 6, 7, 8 gebildet. Die Ausgangsspannung dieser Bandabstands-Referenz wird dem Operationsverstärker 9 zugeführt, welcher wiederum den MOSFET 3 steuert. Es wird also die Regelung der Differenz-Ausgangsspannung der Bandabstands-Referenz mit der Versorgungsspannungregelung verbunden. Der Wert der Ausgangsspannung kann über die Wahl der Widerstandswerte der Widerstände 6 und 8 erfolgen. Entspricht die Ausgangsspannung an den Klemmen 1 und 2 dem durch die Widerstände 6 und 8 definierten Wert, so wird die Eingangsreferenzspannung des Operationsverstärkers zu 0.The bandgap reference is formed by transistors 4, 5 and resistors 6, 7, 8. The output voltage of this bandgap reference is fed to the operational amplifier 9, which in turn controls the MOSFET 3. The regulation of the differential output voltage of the bandgap reference is thus connected to the supply voltage regulation. The value of the output voltage can be selected by selecting the resistance values of resistors 6 and 8. If the output voltage at terminals 1 and 2 corresponds to the value defined by resistors 6 and 8, the input reference voltage of the operational amplifier becomes 0.

Ein Nachteil der in FIG 1 dargestellten Bandabstands-Referenz ist, daß der Temperaturgang der Ausgangsspannung an den Anschlüssen 1 und 2 im gleichen Maße schlechter wird, wie die Ausgangsspannung von der Bandabstands-Referenzspannung abweicht. Außerdem ist die Arbeitspunkteinstellung des Operationsverstärkers 9 wegen der kleinen Schwellspannung der bipolaren Transistoren schwierig.A disadvantage of the bandgap reference shown in FIG. 1 is that the temperature response of the output voltage at terminals 1 and 2 deteriorates to the same extent that the output voltage deviates from the bandgap reference voltage. In addition, the operating point setting of the operational amplifier 9 is difficult because of the small threshold voltage of the bipolar transistors.

FIG 2 zeigt hier eine Verbesserung der in FIG 1 gezeigten Bandabstands-Referenzschaltung.FIG. 2 shows an improvement of the bandgap reference circuit shown in FIG. 1.

Die in FIG 2 gezeigte Bandabstands-Referenz weist zu der in FIG 1 gezeigten zusätzlich vier weitere Transistoren 10, 11, 12, 13 auf. Der Emitter des ersten zusätzlichen Transistors 10 ist mit den beiden Basisanschlüssen des ersten und zweiten Transistors 4, 5 verbunden. Der Emitter des zweiten zusätzlichen Transistors 11 ist mit der Basis des ersten zusätzlichen Transistors 10, der Emitter des dritten zusätzlichen Transistors 12 mit der Basis des zweiten zusätzlichen Transistors 11 und der Emitter des vierten zusätzlichen Transistors 13 mit der Basis des dritten zusätzlichen Transistors 12 verbunden. Die Kollektoren aller vier zusätzlichen Transistoren 10, 11, 12, 13 sind mit den Kollektoren des ersten und zweiten Transistors 4, 5 verschaltet. Weiterhin ist die Basis des vierten zusätzlichen Transistors 13 mit seinem Kollektor verschaltet. Es sind weiterhin ein vierter, fünfter und sechster Widerstand vorgesehen, wobei der vierte Widerstand 14 zwischen den Emitter des zweiten zusätzlichen Transistor 11 und dem Emitter des ersten zusätzlichen Transistors 10, der zweite Widerstand zwischen dem Emitter des dritten zusätzlichen Transistors 12 und dem Emitter des ersten zusätzlichen Transistors 10 und der dritte Widerstand 16 zwischen dem Emitter des vierten zusätzlichen Transistors 13 und dem Emitter des ersten zusätzlichen Transistors 10 geschaltet ist. Schließlich liegt zwischen den verschalteten Basisanschlüssen des ersten und zweiten Transistors 4, 5 und dem Anschluß 2 eine Reihenschaltung eines siebten und achten Widerstands 17 und 18. Die übrigen in FIG 2 dargestellten Bauelemente entsprechen den in FIG 1 gezeigten und haben die gleiche Bezeichnung. Mit 19 und 20 sind wiederum die Anschlüsse bezeichnet, die zu den beiden Eingängen des Operationsverstärkers 9 aus FIG 1 führen.The band gap reference shown in FIG. 2 has four additional transistors 10, 11, 12, 13 in addition to that shown in FIG. The emitter of the first additional transistor 10 is connected to the two base connections of the first and second transistors 4, 5. The emitter of the second additional transistor 11 is connected to the base of the first additional transistor 10, the emitter of the third additional transistor 12 to the base of the second additional transistor 11 and the emitter of the fourth additional transistor 13 to the base of the third additional transistor 12. The collectors of all four additional transistors 10, 11, 12, 13 are connected to the collectors of the first and second transistors 4, 5. Furthermore, the base of the fourth additional transistor 13 is connected to its collector. A fourth, fifth and sixth resistor are also provided, the fourth resistor 14 between the emitter of the second additional transistor 11 and the emitter of the first additional transistor 10, the second resistor between the emitter of the third additional transistor 12 and the emitter of the first additional transistor 10 and the third resistor 16 is connected between the emitter of the fourth additional transistor 13 and the emitter of the first additional transistor 10. Finally, there is a series connection of a seventh and eighth resistor 17 and 18 between the connected base connections of the first and second transistors 4, 5 and the connection 2. The other components shown in FIG. 2 correspond 1 and have the same designation. 19 and 20 in turn denote the connections which lead to the two inputs of the operational amplifier 9 from FIG. 1.

Durch Hinzufügen der vier Basis-Emitter-Spannungen der zusätzlichen Transistoren 10, 11, 12, 13, die in Reihe zur ursprünglichen Bandabstands-Referenz geschaltet sind, wird zum einen die Differenzeingangsspannung des nachfolgenden Operationsverstärkers 9 in günstiger Weise von dem am Anschluß 1 anliegenden Potential verschoben, zum anderen wird der Punkt der vollständigen Temperaturkompensation hier um den ca. 5-fachen Wert verschoben. Gegenüber der in FIG 1 gezeigten Schaltung, in der der Wert der Bandabstands-Referenzspannung bei ca. 1,2 V liegt, weist hier die Bandabstands-Referenzspannung einen Wert von ca. 6V auf. Abweichungen von dieser fallen also weniger ins Gewicht.By adding the four base-emitter voltages of the additional transistors 10, 11, 12, 13, which are connected in series to the original bandgap reference, on the one hand, the differential input voltage of the subsequent operational amplifier 9 is favorably reduced by the potential present at terminal 1 shifted, on the other hand the point of complete temperature compensation is shifted by approx. 5 times. Compared to the circuit shown in FIG. 1, in which the value of the bandgap reference voltage is approximately 1.2 V, the bandgap reference voltage here has a value of approximately 6V. Deviations from this are less significant.

Eine Erweiterung wie sie in FIG 2 dargestellt ist, ist nicht auf vier Transistoren beschränkt, sondern kann beliebig innerhalb eines sinnvollen Rahmens vergrößert oder verkleinert werden. Erfindungswesentlich ist die Erhöhung der Bandabstands-Referenzspannung durch n in Serie geschaltete Transistoren, deren Kollektoren am positiven Versorgungspotential liegen. Die Ausgangsspannung ist dann beim n+1-fachen Wert der Bandabstands-Referenzspannung temperaturkompensiert.An expansion as shown in FIG. 2 is not limited to four transistors, but can be enlarged or reduced as desired within a reasonable range. Essential to the invention is the increase in the bandgap reference voltage by means of n transistors connected in series, the collectors of which are connected to the positive supply potential. The output voltage is then temperature compensated at n + 1 times the bandgap reference voltage.

Aus Gründen leichterer Einstellbarkeit von Widerstandswerten wurden in FIG 2 zwei Widerstände 17 und 18 gewählt. Diese können beliebig durch einen oder eventuell mehrere Widerstände ersetzt werden.For reasons of easier adjustability of resistance values, two resistors 17 and 18 were chosen in FIG. These can be replaced by one or possibly several resistors.

Die Schaltung incl. der bipolaren npn-Transistoren läßt sich besonders in einer CMOS-Technologie mit n-Substrat realisieren. Die Kollektoranschlüsse der bipolaren npn-Transistoren werden durch das gemeinsame Substrat gebildet. Dies ist möglich, da nur bipolare Transistoren verwendet werden, die als Emitterfolger geschaltet sind. Derartige Transistoren werden auch als parasitäre "Substrat-npn-Transistoren" bezeichnet.The circuit including the bipolar npn transistors can be implemented particularly in CMOS technology with an n-substrate. The collector connections of the bipolar npn transistors are formed by the common substrate. This is possible because only bipolar transistors are used that are connected as emitter followers. Such transistors are also referred to as parasitic "substrate npn transistors".

Die gezeigte Schaltung eignet sich insbesondere für transportabble Datenträger, z. B. sogenannte Chip-Karten und Chip-Schlüssel, die keine eigene Stromversorgung aufweisen und deren Energiezuführung mittels zweier Spulen erfolgt.The circuit shown is particularly suitable for transportable data carriers, for. B. so-called chip cards and chip keys, which do not have their own power supply and whose energy is supplied by means of two coils.

Claims (4)

  1. Integral shunt regulator having a controllable semiconductor component (3) whose load path is connected between the poles (1, 2) of a supply voltage source and whose control input is connected to the output of a differential amplifier (9), characterized in that
    - a first and a second transistor (4, 5) are provided, whose base terminals and collector terminals are interconnected and are connected to one pole (1) of the supply voltage source,
    - three resistors (6, 7, 8) are provided,
    - the emitter terminal of the first transistor (4) is connected, on the one hand, via the first resistor (6) to the other pole (2) of the supply voltage source, and is connected, on the other hand, to the first input (20) of the differential amplifier (9),
    - the emitter terminal of the second transistor (5) is connected to the other pole (2) of the supply voltage source via a series circuit composed of second and third resistors (7, 8),
    - the series circuit of the two resistors (7, 8) has a connection node which is connected to the second input (19) of the differential amplifier (9).
  2. Integral shunt regulator according to Claim 1, characterized in that
    - n (n ≧ 1) further transistors (10, 11, 12, 13) are provided which are connected between the base terminals and collector terminals of the first and second transistor (4, 5),
    - the emitter terminal of the first of the further transistors (10) is connected to the base terminals of the first and second transistor (4, 5),
    - the emitter terminal of the (n+1)-th of the further transistors (11, 12, 13) is respectively connected, on the one hand, to the base terminal at the n-th of the further transistors (10, 11, 12) and, on the other hand, via respectively one resistor (14, 15, 16) to the base terminals of the first and second transistor (4, 5),
    - the base terminal of the last of the further transistors (13) is connected to its collector terminal,
    - the collector terminals of the n further transistors (10, 11, 12, 13) are connected to the collector terminals of the first and second transistor (4, 5),
    - a resistor (17, 18) is connected between the base terminals of the first and second transistor (4, 5) and the other pole (2) of the supply voltage source.
  3. Integral shunt regulator according to Claim 1 or 2, characterized in that the shunt regulator is constructed using CMOS technology, the bipolar transistors being formed by parasitic structures.
  4. Integral shunt regulator according to one of the preceding claims, characterized in that the shunt regulator is provided in a chip card or in a chip key.
EP91102283A 1991-02-18 1991-02-18 Integratable shunt regulator Expired - Lifetime EP0499657B1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DE59105528T DE59105528D1 (en) 1991-02-18 1991-02-18 Integrable shunt regulator.
EP91102283A EP0499657B1 (en) 1991-02-18 1991-02-18 Integratable shunt regulator
ES91102283T ES2071849T3 (en) 1991-02-18 1991-02-18 INTEGRABLE SHUNT REGULATOR.
US07/837,278 US5229708A (en) 1991-02-18 1992-02-18 Integrable shunt regulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP91102283A EP0499657B1 (en) 1991-02-18 1991-02-18 Integratable shunt regulator

Publications (2)

Publication Number Publication Date
EP0499657A1 EP0499657A1 (en) 1992-08-26
EP0499657B1 true EP0499657B1 (en) 1995-05-17

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EP91102283A Expired - Lifetime EP0499657B1 (en) 1991-02-18 1991-02-18 Integratable shunt regulator

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US (1) US5229708A (en)
EP (1) EP0499657B1 (en)
DE (1) DE59105528D1 (en)
ES (1) ES2071849T3 (en)

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US5701071A (en) * 1995-08-21 1997-12-23 Fujitsu Limited Systems for controlling power consumption in integrated circuits
US5949212A (en) * 1997-06-05 1999-09-07 The Boeing Company Integrated solar cell array and power regulator
JP3488054B2 (en) * 1997-09-12 2004-01-19 Ｎｅｃエレクトロニクス株式会社 LCD drive device
US6134130A (en) * 1999-07-19 2000-10-17 Motorola, Inc. Power reception circuits for a device receiving an AC power signal
JP2001101364A (en) * 1999-10-01 2001-04-13 Fujitsu Ltd Lsi for non-contact ic card
US6259324B1 (en) * 2000-06-23 2001-07-10 International Business Machines Corporation Active bias network circuit for radio frequency amplifier
WO2004107077A1 (en) * 2003-05-28 2004-12-09 Koninklijke Philips Electronics N.V. Circuit for a data carrier having reference parameter generation means with supply voltage limiting means
KR100812086B1 (en) * 2006-11-30 2008-03-07 동부일렉트로닉스 주식회사 Voltage regulator of semiconductor device
US7969127B1 (en) 2008-04-25 2011-06-28 National Semiconductor Corporation Start-up circuit for a shunt regulator

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DE59105528D1 (en) 1995-06-22
US5229708A (en) 1993-07-20
ES2071849T3 (en) 1995-07-01
EP0499657A1 (en) 1992-08-26

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