Classifications

• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
  • H02J1/00—Circuit arrangements for dc mains or dc distribution networks
  • H02J1/14—Balancing the load in a network

Definitions

• This invention relates to circuits with switching protection and parts therefor, and relates particularly but not exclusively to arrangements for the protection of such circuits having switching devices which are switched under load conditions.
• Semiconductor devices used in power circuits can be considered as forming two specific groups.
• the first group comprises devices such as SCR's or Triacs which can be switched into an on-state via a control electrode, but can not be switched into an off, or blocking state through the same electrode, rather, require natural or forced commutation.
• the second group comprises devices such as GTO's, Power Transistors and IGFET's which can be switched into both the on-state and the off-state via a control electrode.
• Such semiconductor power devices find greatest usage in rectifier, chopper and inverter circuits, where their switching capabilities are used to synthesize waveforms supplying electrical loads.
• these types of circuits * there are a number of design performance criteria which must be considered.
• the device In the off-state, the device will have some finite principal voltage withstand characteristic, above which avalanche breakdown will occur. Avalanche breakdown occurs when minority carriers dislodge further minority carriers thereby transforming the device into the on-state.
• the time rate of change of voltage rating, dv/dt is also important. If the off-state voltage increases too rapidly with time, there may be a spontaneous change to the on-state.
• PWM pulse width modulation
• an electrical circuit with switching protection comprising: a controlled circuit having an input of fixed frequency and including switching devices, the controlled circuit being adapted to produce one or more outputs of a frequency different to the input by the switching devices; an electrical load connected to the one or each outputs &£ the controlled circuit; and a resonant circuit connected to the one or each outputs of the controlled circuit, wherein, the resonant circuit is operable to cooperate with the load to provide the controlled circuit in an advantageous condition for activation of the switching devices at a change of state.
• the controlled circuit is operable using a pulse width modulation technique.
• a resonant circuit for use with a controlled circuit having a load connected to one or more outputs thereof, the resonant circuit being adapted for connection to the one or each outputs and comprising: anti-parallel connected controllable semiconductor devices in combination connected in series with at least one inductive element; and capafcitive elements connected between an output and a reference voltage; the resonant series circuit being formed by at least one of the capacitive elements, at least one of the inductive elements and the load, whereby the controlled circuit can be placed in an advantageous condition for switching between states.
• a method for protecting a controlled circuit having an input of fixed frequency and including switching devices the controlled circuit supplying a load and being adapted to produce one or more outputs of a frequency different to the input of the switching devices, the method comprising the steps of: providing a resonant circuit connected to the one or each outputs; and operating the resonant circuit in cooperation with the load to provide the controlled circuit in an advantageous condition for activation of the switching devices at a change of state.
• Figure 1 shows one form of an idealised pulse width modulation generated waveform in accordance with the prior art
• Figure 2 shows a single phase inverter disposed in one particular state and constructed in accordance with the invention
• Figure 3 shows the single phase inverter of Figure 2 in another state
• Figure 4 shows details of current and voltage waveforms during turn-on of one limb of the bridge as shown in Figure 2;
• FIG. 5 shows a further embodiment of a three phase application for the invention.
• PWM pulse width modulation
• Figure 1 shows a simple illustration of one form of a pulse width modulation technique.
• the output waveform V 0 is synthesized in the two half-cycles by a number of voltage pulses V having magnitude V in the positive half cycle, and the magnitude V in the negative half cycle. That is, the resultant of the pulses approximates the sinusoidal representation of the output waveform V Q .
• the number and width of the various pulses V will be changed in accordance with the desired frequency of the output waveform V Q .
• a limitation on the maximum achievable output frequency will depend on how quickly the switching devices which are synthesizing the waveform can be switched on or off.
• the technique of pulse width modulation is well known.
• FIG. 2 there is shown a single phase full-wave PWM controlled inverter bridge circuit 10 connected to an inductive load 50.
• a resonant circuit 30 is connected across the output of the bridge circuit 10, with the output being identified as terminals V- and V R .
• the sources for the bridge circuit 10 are the two DC supply voltages V + and V —. It is equally possible to provide for the supply voltage to be of a frequency other than
• DC such as would be the case for a cyclo-convertor.
• the bridge circuit 10 is formed by two limbs, each of which comprises a pair of switching devices in the form of bipolar junction transistors 12.
• the first limb is
• the bridge circuit 10 is formed by two limbs, each of which comprises a pair of switching devices in the form of bipolar junction transistors 12.
• the first limb is constituted by transistors Q1A and Q2A and the second limb by transistors QlB and Q2B.
• Each of the transistors 12 is provided with a free wheeling diode 14, being variously D1A, D2A, DIB and D2B.
• transistors have been shown in the limbs of the bridge, it would be equally applicable to substitute other semiconductor devices which can be switched-off via a control electrode, such as GTO's or IGFET's.
• each limb is connected to a respective snubber circuit 18 comprising a parallel resistor and inductor combination RSA and LSA, RSB and LSB, after which is formed the respective output terminals V, and V,-,.
• a respective snubber circuit 18 comprising a parallel resistor and inductor combination RSA and LSA, RSB and LSB, after which is formed the respective output terminals V, and V,-,.
• capacitors 20 CS1 - CS4 which are components of the resonant circuit 30, and which also connect to either of the supply voltages V or
• the inductive load 50 is shown connected between the output terminals V. and V ⁇ . Also connected between the output terminals is part of the resonant circuit 30, which is symmetric and comprises two anti-parallel connected series transistor/diode configurations, in combination being in series with inductor LC.
• the transistors 22 are designated
• the snubber circuits 18 will be temporarily ignored, as they are of small value and do not significantly affect operation of the bridge circuit 10.
• FIG. 2 shows the condition of transistors Q1A and Q2B conducting. This corresponds to any particular one of the pulses V in the positive half-cycle of the output voltage waveform V Q as shown in Figure 1.
• load current I ⁇ flows from the supply V through the inductive load 50 returning to the input supply V as shown.
• the voltage appearing between the output terminals V, and V ⁇ would be close to 2*V , allowing for collector-emitter voltage drops in transistors QLA and Q2B, as well as the voltage drop across resistors RSA and RSB.
• transistors Q2A and QlB would be achieved by the appropriate switching of transistors Q2A and QlB such that the polarity of the voltage appearing between the output terminals V. and V ⁇ would be reversed.
• transistors Q1A and Q2B are conducting, and capacitors CS2 and CS3 will become charged with approximately voltage of 2*V £_ .
• transistor QC2 is activated, thereby including inductance LC in parallel arrangement with the load 50.
• Diode DC2 will be forward biased, and therefore, stored energy in capacitors CS2 and CS3 now has a second path other than through load 50.
• Figure 4 shows the near continuous load current I_ together with current through inductor LC and the load voltage between output terminals V, and V ⁇ .
• the section A-B in Figure 4 represents the increase of current through inductor LC up to a point where it is equal to the load current I ⁇ . After this point, the current through inductor LC continues to increase following a resonant trajectory B-C for a period of l/(4*7f*,/(LC*CS) ) due to the resonant circuit formed between inductor LC and capacitors CS2 and CS3.
• the current through inductor LC will then decay linearly at the rate of (V __> - V•__> ⁇ )/LC along section C-D until it reaches zero. At the zero point, the transistor QC2 can be turned off. The maximum current flowing through inductor LC will be (V + - V ⁇ >V(CS/LC) .
• the diodes DCl and DC2 provide reverse blocking for their respective transistors QCl, QC2.
• transistor QC2 is utilised in switching-on transistors QlA and Q2B; conversely transistor QCl would be used in the switch-on procedure for transistors Q2A and QlB.
• Transistors QCl and QC2 are shown as bipolar junction transistors, but could easily be other types of semiconductor devices, such as GTO's, IGFET's, or indeed, SCR's, since there is no particular need for turn-off by a control electrode.
• a single Triac could replace both transistors QCl and QC2.
• transistors 22 and diodes 24 in the resonant circuit 30 are rated with the equivalent forward current rating of the load, however the advantages of low stress switching and the elimination of commutation clamp rails are sufficient to justify the extra cost when operating at high switching frequency associated with PWM techniques.
• the switching of transistors QlA, Q2B and QC2 corresponds to the positive half cycle of the synthesized output waveform V promo.
• operation of the complementary components would take place.
• the bridge circuit 10 shown is not self starting, rather an initiating circuit must be included to charge the capacitors CS1-4, which could be achieved by a pair of relatively low current FET's or BJT's with series resistors.
• the transistors 22 and diodes 24 in the resonant circuit 30 must be rated for full load current, but it is also possible to duplicate the transistor 22, diode 24 and inductor LC structure shown and provide an interconnecting centrepoint between the duplicated sections which is at a zero voltage reference level, whereby the voltage ratings of the transistors could be halved.
• a further embodiment is the extension to a three phase application as shown in Figure 5.
• the three phase inverter 60 is shown in block diagram form, as is the inductive load 55.
• the resonant circuit 30 of the previous embodiment is provided in three equivalent circuits 70, each of which is connected to the output phases ⁇ -.
• ⁇ r _ ' Tne transistors QC5-10 are in a symmetric arrangement and are shown connected by a pair of diodes 72 between the respective phase outputs, each pair having a common connection to a neutral point, N.
• the neutral point, N is also connected to the respective third output phase via inductors LC1-3.
• the function of capacitors CS1-CS4 as discussed in the single-phase embodiment is achieved by six inter-phase capacitors provided within the inverter 60.
• This example allows one simultaneous state change from a present state to the diagonally opposite state. All other state combination must be as a result of switch-off of the bridge transistors in the three phase inverter 60 from the opposite state.

Landscapes

• Engineering & Computer Science (AREA)
• Power Engineering (AREA)
• Inverter Devices (AREA)
• Interface Circuits In Exchanges (AREA)
• Electronic Switches (AREA)
• Burglar Alarm Systems (AREA)

Applications Claiming Priority (2)

Publications (2)

Family

ID=3773860

Family Applications (1)

Country Status (5)

Families Citing this family (3)

Citations (4)

Family Cites Families (6)

• 1990
  • 1990-04-18 CA CA002051668A patent/CA2051668A1/en not_active Abandoned
  • 1990-04-18 WO PCT/AU1990/000152 patent/WO1990013177A1/en not_active Application Discontinuation
  • 1990-04-18 AU AU54497/90A patent/AU631861B2/en not_active Ceased
  • 1990-04-18 JP JP2506287A patent/JPH04506895A/ja active Pending
  • 1990-04-18 EP EP19900906060 patent/EP0469003A4/en not_active Withdrawn

Patent Citations (4)

Non-Patent Citations (1)

Also Published As

Similar Documents

Legal Events