EP0464807B1 - Schaltungsanordnung zur Erzeugung von Anzeige-Treibersignalen - Google Patents

Schaltungsanordnung zur Erzeugung von Anzeige-Treibersignalen Download PDF

Info

Publication number
EP0464807B1
EP0464807B1 EP91111067A EP91111067A EP0464807B1 EP 0464807 B1 EP0464807 B1 EP 0464807B1 EP 91111067 A EP91111067 A EP 91111067A EP 91111067 A EP91111067 A EP 91111067A EP 0464807 B1 EP0464807 B1 EP 0464807B1
Authority
EP
European Patent Office
Prior art keywords
signal
display
circuit generating
elements
matrix display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP91111067A
Other languages
English (en)
French (fr)
Other versions
EP0464807A3 (en
EP0464807A2 (de
Inventor
Fabio Zuliani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SELECO SpA
Original Assignee
SELECO SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SELECO SpA filed Critical SELECO SpA
Publication of EP0464807A2 publication Critical patent/EP0464807A2/de
Publication of EP0464807A3 publication Critical patent/EP0464807A3/en
Application granted granted Critical
Publication of EP0464807B1 publication Critical patent/EP0464807B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • G09G3/3651Control of matrices with row and column drivers using an active matrix using multistable liquid crystals, e.g. ferroelectric liquid crystals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3622Control of matrices with row and column drivers using a passive matrix
    • G09G3/3629Control of matrices with row and column drivers using a passive matrix using liquid crystals having memory effects, e.g. ferroelectric liquid crystals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms

Definitions

  • the present invention relates to a circuit generating signal for a matrix display of elements, in particular a display employing elements of a ferroelectric type.
  • ferroelectric crystals present interesting characteristics, such as high resolution and memory (infact these elements are of a flip-flop type).
  • the aim of the present invention is therefore that of indicating a circuit generating driving signals for a matrix display of elements, particularly of a ferroelectric crystal type, that is both simple and flexible, and therefore easy to modify.
  • a further aim of the invention is to indicate a circuit generating signal for a display that easily permits to be compensated in temperature.
  • the present invention has as its object a circuit generating driving signals for a matrix display of elements, particularly a display of ferroelectric elements, characterised by the fact that the generator comprises a digital memory for a multiplicity of signals apt of creatinging a driving signal of a predetermined form and a selection device of said signals.
  • Figure 1 represents an example of driving signals obtainable with the signal generator according to the invention:
  • Such signal has as its base a fundamental sinusoid, to which waves of a higher frequency and lower amplitude are superimposed.
  • said driving signal presents a range of 2x48 volt and a period of 38 microseconds, and a fundamental frequency of 100Khz; as can be observed the slope varies; the interval of maximum slope lasts 5 microseconds.
  • the form of the signal represented in figure 1 is of a typical type, adapt for the driving of the various lines of the display; although the type of form and the optimum frequency may vary, as has already been said; for this reason an easily flexible and adaptable generator for eventual variations is needed.
  • FIG. 2 schematically represents a signal generator according to the invention.
  • the reference letter C represents a meter; this supplies the memory R (preferably of the type ROM or EPROM) with the increasing addresses (for example from 0 to N-1); the meter C is naturally driven by a clock generator CK.
  • the memory R supplies the signals apt to re-establish the desired form of driving wave to a digital/analogic convertor D at its output, that in turn drives an amplifyer A1, at the output of which the driving OUT signal for the display is available.
  • Figure 3 schematically represents the interlocking circuit.
  • the reference letter S indicates a temperature sensor placed in the display; it controls, through an amplifyer A2, an oscillator 0, of the voltage control type (V.C.O.), whose frequency varies with the variation of the temperature, for example if the temperature increases, the frequency of the oscillator also increases and vice versa.
  • the signal generated by the oscillator 0, amplified by the amplifyer A3 supplies the clock signal for the generator.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Liquid Crystal (AREA)
  • Illuminated Signs And Luminous Advertising (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Selective Calling Equipment (AREA)
  • Electric Clocks (AREA)
  • Liquid Crystal Display Device Control (AREA)

Claims (4)

  1. Schaltungsanordnung zum Erzeugen von Signalen für eine Matrixanzeige von Elementen, insbesondere eine ferroelektrische Elemente verwendende Anzeige, mit einem digitalen Speicher (R) für eine Vielzahl von Signalen, welche geeignet sind, ein Ansteuerungssignal einer vorbestimmten Form zu bilden, einer Selektionseinrichtung (C), welche Adressen an den Speicher (R) abgibt und durch ein Taktsignal (CK) gesteuert wird,
    dadurch gekennzeichnet, daß die Frequenz des Taktsignales (CK) durch einen Temperatursensor (S) gesteuert wird, so daß sie als eine Funktion der Temperatur veränderbar ist.
  2. Schaltungsanordnung zum Erzeugen eines Signales für eine Elementen-Matrixanzeige nach Anspruch 1,
    gekennzeichnet durch die Tatsache, daß das Taktsignal (CK) durch einen Oszillator (O) erzeugt wird, welcher durch eine Spannung von einem Temperatursensor (S) gesteuert wird, welcher innerhalb der Anzeige angeordnet ist.
  3. Schaltungsanordnung zum Erzeugen eines Signales für eine Elementen-Matrix anzeige nach Anspruch 1,
    gekennzeichnet durch die Tatsache, daß der Speicher (R) eine Vielzahl von digitalen Werten (z.B. 256) enthält, welche unterschiedliche Werte entsprechend den Schwingungsformen aufweisen, welche durch die zu erzeugenden Ansteuerungssignale vorbestimmt sind.
  4. Schaltungsanordnung zum Erzeugen von Signalen für eine Elementen-Matrixanzeige nach Anspruch 3,
    gekennzeichnet durch die Tatsache, daß die Vielzahl digitaler Werte zum Bilden eines Multi-Sinus-Signales vorgesehen ist, insbesondere eines Signales, das als Basis eine Sinuskurve aufweist, welcher Schwingungen höherer Frequenz und niedrigerer Amplitude überlagert sind.
EP91111067A 1990-07-06 1991-07-04 Schaltungsanordnung zur Erzeugung von Anzeige-Treibersignalen Expired - Lifetime EP0464807B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IT67501A IT1240381B (it) 1990-07-06 1990-07-06 Circuito generatore di segnali di pilotaggio per display
IT6750190 1990-07-06

Publications (3)

Publication Number Publication Date
EP0464807A2 EP0464807A2 (de) 1992-01-08
EP0464807A3 EP0464807A3 (en) 1992-07-01
EP0464807B1 true EP0464807B1 (de) 1995-10-18

Family

ID=11302951

Family Applications (1)

Application Number Title Priority Date Filing Date
EP91111067A Expired - Lifetime EP0464807B1 (de) 1990-07-06 1991-07-04 Schaltungsanordnung zur Erzeugung von Anzeige-Treibersignalen

Country Status (4)

Country Link
EP (1) EP0464807B1 (de)
DE (1) DE69113879T2 (de)
ES (1) ES2081394T3 (de)
IT (1) IT1240381B (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2313223A (en) * 1996-05-17 1997-11-19 Sharp Kk Liquid crystal device
GB2313224A (en) * 1996-05-17 1997-11-19 Sharp Kk Ferroelectric liquid crystal device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4414544A (en) * 1981-06-12 1983-11-08 Interstate Electronics Corp. Constant data rate brightness control for an AC plasma panel
US4622549A (en) * 1983-06-29 1986-11-11 International Business Machines Corporation Repetition rate compensation and mixing in a plasma panel
US4819186A (en) * 1987-01-30 1989-04-04 Casio Computer Co., Ltd. Waveform generating apparatus for driving liquid crystal device
GB2207272B (en) * 1987-07-18 1991-08-14 Stc Plc Addressing liquid crystal cells
JPH0310217A (ja) * 1989-06-07 1991-01-17 Seiko Epson Corp 液晶装置の駆動方法
JPH0331817A (ja) * 1989-06-29 1991-02-12 Seiko Epson Corp 液晶装置の駆動方法

Also Published As

Publication number Publication date
EP0464807A3 (en) 1992-07-01
IT9067501A0 (it) 1990-07-06
IT9067501A1 (it) 1992-01-06
DE69113879D1 (de) 1995-11-23
ES2081394T3 (es) 1996-03-01
DE69113879T2 (de) 1996-04-11
IT1240381B (it) 1993-12-10
EP0464807A2 (de) 1992-01-08

Similar Documents

Publication Publication Date Title
US4727752A (en) Pseudosinusoidal oscillator drive system
FR2413822A1 (fr) Generateur d'impulsions
JPS5652936A (en) Digital type phase lock loop circuit
EP0464807B1 (de) Schaltungsanordnung zur Erzeugung von Anzeige-Treibersignalen
KR840007638A (ko) 디지탈 제어기
JPS5481879A (en) Electronic watch
JPS5725171A (en) Pulse width modulation type inverter
EP0173158A3 (de) Flüssigkristallanzeigeeinheit
EP0908735A3 (de) Verfahren zur Bestimmung der Frequenz eines Signals
KR930010455B1 (ko) 액정구동회로
EP0166705A3 (de) Verfahren zur Messung von Kapazitäten, insbesondere niedriger Kapazitäten
US4682362A (en) Generating narrowly-separated variable-frequency clock signals
EP0219604A3 (de) Gerät und Verfahren zur Erzeugung von Signalen in Phasenbeziehung mit einem Taktsignal
JPS5592597A (en) Adjustable speed control system for motor
JPS6477023A (en) Liquid crystal electro-optic device
SU1287031A1 (ru) Анализатор спектра вибраций
KR960706710A (ko) 협대역 임의적 hf 변조 및 노이즈 발생기(narrow band, arbitrary hf modulation and noise generator)
WO1997005501A3 (en) Apparatus for and method of controlling and calibrating the phase of a coherent signal
KR920001832A (ko) 디지탈빗형 필터
JPS5480163A (en) Electronic watch
EP0284285A3 (de) Zeugmatographie im rotierenden Bezugsrahmen
JPS5767341A (en) Phase synthesizing space diversity system
SU1677845A1 (ru) Генератор частотно-модулированных сигналов
JPS6016999Y2 (ja) 発音機能付電子機器
SU1051506A1 (ru) Устройство дл управлени синусоидальными колебани ми виброустановки

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): BE DE ES FR GB NL SE

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): BE DE ES FR GB NL SE

17P Request for examination filed

Effective date: 19921217

17Q First examination report despatched

Effective date: 19940729

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): BE DE ES FR GB NL SE

REF Corresponds to:

Ref document number: 69113879

Country of ref document: DE

Date of ref document: 19951123

ET Fr: translation filed
REG Reference to a national code

Ref country code: ES

Ref legal event code: FG2A

Ref document number: 2081394

Country of ref document: ES

Kind code of ref document: T3

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 19970619

Year of fee payment: 7

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 19970716

Year of fee payment: 7

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: ES

Payment date: 19970718

Year of fee payment: 7

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: SE

Payment date: 19970723

Year of fee payment: 7

Ref country code: BE

Payment date: 19970723

Year of fee payment: 7

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: NL

Payment date: 19970724

Year of fee payment: 7

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 19970820

Year of fee payment: 7

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19980704

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19980705

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: ES

Free format text: LAPSE BECAUSE OF EXPIRATION OF PROTECTION

Effective date: 19980706

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19980731

BERE Be: lapsed

Owner name: SELECO S.P.A.

Effective date: 19980731

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19990201

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 19980704

EUG Se: european patent has lapsed

Ref document number: 91111067.4

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19990331

NLV4 Nl: lapsed or anulled due to non-payment of the annual fee

Effective date: 19990201

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19990501

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

REG Reference to a national code

Ref country code: ES

Ref legal event code: FD2A

Effective date: 20010201