EP0447536B1

EP0447536B1 - Image processing work station

Info

Publication number: EP0447536B1
Application number: EP90915675A
Authority: EP
Inventors: Jacques Ferrer; Jean-Jacques Videcoq
Original assignee: Unisys Corp
Current assignee: Unisys Corp
Priority date: 1989-10-11
Filing date: 1990-10-10
Publication date: 1995-08-02
Anticipated expiration: 2010-10-10
Also published as: US5204668A; GB8922897D0; EP0447536A1; DE69021368T2; WO1991006169A1; GB2236928A; DE69021368D1

Abstract

An image processing station (18) displays data on a monitor (22) of images captured by an image capture work station, compressed by data compressor (12), stored in an image store (16), and retrieved. The image processor station can accept commands from a keyboard (26) or output data and images via a printer (24). A decompressor (36) decompresses retrieved data from the store (16) and a video memory (50) comprises selectable first (56) and second (62) pages each of which may be loaded with fresh image data whilst the other is being used for display. Images, on successive screens, are swapped from a first position to a second position whilst fresh images are moved into the first position.

Description

The present invention relates to an apparatus for displaying a received image. The present invention particularly relates to an apparatus for receiving data representative of an image, captured elsewhere, of a real article.
The invention is hereinafter described with reference to it's use in displaying images of documents or cheques. It is to be understood that this is an example and not a limitation to the use of the present invention.
The document processing industry includes processing of cheques, bills, invoices and other paper work relating to buying and selling, shipping and delivery of goods, as well as the normal banking processes. The prior art has shown extensive use of document encoding machines. These are cumbersome, and rely upon the difficult art of moving paper in a controlled manner, and are generally slow and impede the processing of data, from the documents, which is the true purpose of the machine.
The present invention seeks to ameliorate this process by assisting in the processing images of documents rather than the documents themselves.
GB patent application GB-A-2 150 794 discloses how it is possible to scroll an image on a screen, by shuffling alpha-numeric type data, in a memory which controls the contents of the screen after a process of expansion and conversion. The present invention addresses itself to the field of displaying and moving images of real objects, utilising already expanded, image representative data and seeks to overcome the problems posed by GB-A-2 150 794 where, in this field, the sheer volume of data to be shuffled renders the solution impractical.
US patent US-A-4 200 869 discloses how individual data memories, containing alpha-numeric type data for expansion and conversion prior to display, can be individually selected, each to provide its own, separate image on a screen. The present invention seeks to provide improvement thereover, in the field of display and manipulation of already-expanded real image data, to provide means whereby an image may be moved and updated, on a screen, apparently without delay, despite the large amount of real-image representative data that has to be accommodated.
The present invention consists in an apparatus for displaying images representative of data and comprising a first memory and a second memory each for holding data which can be converted into a form capable of generating a separate image to be displayed on a display screen; and means to select said first memory or said second memory for provision of data therein to be displayed; said apparatus being characterized by said first memory and said second memory each being loaded with data directly representative of images to be displayed; means for said first memory to be loaded, while said second memory is selected for viewing, with representation of a first image in a top half thereof and representation of a second image in a bottom half thereof; means for said second memory to be loaded, while said first memory is selected for viewing, with representation of said second image in a top half thereof and with representation of a third, or further, image in a bottom half thereof; whereby, when said second memory is selected for viewing, said second image instantaneously moves from a first part to a second part of the display screen and said third, or further, image is introduced at the first part of the display screen, and so on.
Preferable embodiments are defined in the dependent claims.
In operating such a machine, it is necessary to examine the document. When the document is a cheque, it is necessary to indicate, via a keyboard or other means, the amount. Accordingly, the present invention further provides that data, indicative of values in an image, can be stored in association with data, representative of the image.
The invention is further explained, by way of an example, by the following description, read in conjunction with the appended drawings, in which:

Figure 1 is a block diagram of the general environment which includes the present invention;
Figure 2 is a block diagram of the imaging processing station of figure 1;
Figure 3 is a block diagram of the graphics adaptor of figure 2;
Figure 4 is a block diagram of the video memory of figure 3;
Figure 5A shows a first display on the video monitor of figure 1 and figure 5B shows the next successive display on the monitor;
Figure 6 is a flow chart indicating how the graphics adaptor of figure 2 organizes data within its main memory, and;
Figure 7 is a flow chart showing how the graphics adaptor of figure 2 loads data into the video memory of figure 3 for display.

Figure 1 is a block diagram of the environment which includes the present invention. An image capture station 10 captures images of documents coupled in uncompressed form to a data compressor 12 which removes much of the redundant information from data from the image capture station 10 and reduces it dramatically in volume. Compressed data 14, for storage, is passed to an image store 16 which stores the compressed data from the data compressor 12. On demand, compressed data is passed from the image store 16 to the image processing station 18. The image processing station decompresses data from the image store 16 and sends it via a video coupling 20 to a display monitor 22. The image processing station may also send data or images to be permanently recorded by means of a printer 24. The image processing station 18 also receives data from a keyboard 26. For example, an operator, on examination of the screen of the display monitor 22, may indicate to the image processing station 18 the value recorded on the image of a cheque, invoice, or other document. Compressed data from the image store 16 is received by the image processing station 18 via a bus 28.
Figure 2 is a block diagram of the image processing station 18 of figure 1. A main processor 30, receives compressed data from the bus 28. The main processor, as is well known in the art, comprises a data bus 32 and an address bus 34. The data bus 32 and address bus 34 are coupled as controlling inputs firstly to an image data decompressor 36 and secondly to a graphics adaptor 38. The graphics adaptor 38 provides a graphics adaptor address bus 40 as an input to the data decompressor 36 and receives data from the data decompressor 36 via a graphics adaptor data bus 42. The image data decompressor 36 provides an interrupt line 44 to the graphics adaptor 38. The video coupling 20 passes from the graphics adaptor 38 to the display monitor 22 as indicated in figure 1.
Compressed data, from the image store 16 is received on the bus 28 by the main processor 30 which, by manipulation of the address on the address bus 34 addresses areas in the decompressor 36 for provision of compressed data, word by word and block by block, to the decompresser 36 via the data bus 32. This manner of provision of data to a peripheral card or board is well known in the art. In general terms, the image data decompressor 36 and the graphics adaptor 38 are cards mounted, for example, on a mother board in a processor.
When the decompressor 36 has received a predetermined amount of data, equal to half of its storage capacity, its signals to the graphics adaptor 38 via the interrupt line 44 and the graphics adaptor 38 responds by providing a succession of addresses on the graphics adaptor address bus 40 to control access to the decompressed data, now stored in the decompressor 36, and accepts the decompressed data on the graphics adaptor data bus 42 for transfer to and storage in the graphics adaptor 38. Figure 3 shows a block diagram of the graphics adaptor 38 of figure 2.
A microprocessor controller 46 provides the graphics adaptor address bus 40 and the graphics adaptor data bus 42 to a main memory 48, a video memory 50, and an interface 52 operating in conjunction with an address decoder 54. The video memory 50 directly drives the video coupling 20 to provide images on the display monitor 22. It is to be understood that the video memory 50 is automatically scanned at the required rate for display of an image on the display monitor 22 when not engaged in other operations. The microprocessor controller 46 manipulates the signals on the graphics adaptor address bus 40 and the graphics adaptor data bus 42 to store and retrieve program and image data in the main memory 48, and to transfer the data from the main memory 48 to the video memory 50. The microprocessor controller 46 also manipulates the signals on the graphic adaptor data bus 42 and the graphics adaptor address bus 40 to retrieve image representative data, as previously described, from the decompressor 36. This method of 'direct memory access' between the graphics adaptor 38 and the data decompressor 36 may be achieved by any means known in the art.
The main processor data bus 32 and the main processor address bus 34 are generally shown as being coupled to the interface 52. When the address decoder 54 detects predetermined addresses on the graphics adaptor address bus 40, it activates the interface 52 to receive data from and transfer data to the main processor data bus. By decoding the contents of the main processor data bus 32 and the main processor address bus 34 the graphics adaptor 38 is able to receive commands from the main processor 30. The exact nature and type of these commands does not form part of the present invention.
Use of the graphics adaptor data bus 42 and the graphics adaptor address bus 40 in a 'direct memory access' mode to the data decompressor 36 allows for very rapid transfer of video data to the graphics adaptor 38 avoiding use of the main processor data bus 32 and the main processor address bus 34. In this way, time and activity of the main processor 30 is better used in its housekeeping and greater utility and speed is achieved by the graphics adaptor 38.
When an image is to be stored in the main memory 48, the microprocessor controller 46 provides a sequence of addresses on the graphics adaptor address bus 40 in sympathy with the data to be stored on the graphics adaptor data bus 42, at the same time commanding the main memory 48 to store the data. Likewise, the same process is used to transfer data from the main memory 48 to the video memory 50. A sequence of addresses on the graphics adaptor address bus 40 is provided both to the video memory 50 and to the main memory 48. Data, retrieved from the main memory 48, may either be directly to the video memory 50 via the data bus, or temporarily stored in a cache memory in the microprocessor controller 46 for later transfer to the video memory 50. Either way, data is first retrieved from the main memory 48, piece by piece, and then transferred, piece by piece, to the video memory 50.
When the decompressor 36 has achieved half of its capacity for decompression and storage, its sends a signal on the interrupt line 44 directly to the microprocessor 46 which responds by receiving data according to the flow chart of figure 6, later to be described.
Figure 4 shows a block diagram of the video memory 50 of figure 3. The video memory 50 comprises a first page 56 divided into a top half 58 and a bottom half 60. The video memory 50 also comprises a second page 62 comprising in turn a top half 64 and a bottom half 66.
A multiplexer 68 selects either the first page 56 or the 2nd page 62 to recieve data from the graphics adaptor data bus 42. A diplexer 70 accepts data, selectively, either from the first page 56 or from the second page 62. A selected line 40A from the graphics address bus 40 is coupled as input to the multiplexer 68 and, via a logical inverter 72, as a controlling input to the diplexer 70. The actions of the multiplexer 68 and the diplexer 70 is so chosen, that, when the multiplexer 68 selects the first page 56 for receipt of data, the diplexer 70 selects the second page 62 for provision of data onto the video coupling 20, and when the multiplexer 68 selects the second page 62 for receipt of data from the graphics adaptor data bus 42, the diplexer 70 selects input from the first page 56 for provision to the video coupling 20. It is to be understood that the page 56, 62 selected for provision of signals on the video coupling 20 is automatically scanned for data retrieval at a rate consistent with operation of the display monitor 22 and that the full graphics adaptor address bus 40 is selected to provide addresses for data storage in that page 56, 62 selected to receive data from the multiplexer 68. Those skilled in the art will be aware how such switching is achieved using a multiplexer 68 and a diplexer 70 in a similar manner.
Figure 5A shows a first display screen on the video monitor 22 and figure 5B shows a second display screen on the video monitor 22. In the first display screen an image of a first document 74 is displayed at the bottom of that page 56,62 selected for display, and the image of a second document 76 is stored in and displayed at the top half of that page 56,62 now selected for display by the diplexer 70. At the same time, the image 76 of the second document is stored in the bottom half of that page 56,62 not selected for display and the image 78 of a third document is stored in the top half of that page 56,62 not selected for display. When the operator indicates by use of the keyboard 26 that a fresh image is required on the display monitor 22, the microprocessor controller 46 changes the logical value on the selected bit line 40A of the graphic adaptor address bus 40 to select the other page 56,62. The image then immediately reverts to that shown in figure 5B. There is no waiting.
As soon as the image of figure 5B is displayed, the microprocessor controller 46 commences to fill the page, now de-selected for display, with fresh images. The image 78 of the third document is stored in the bottom half of the non-display page 56,62 and a yet further image (not shown in figure 5A or 5B) is stored in the top half of that page.
Figure 6 is a flow chart of the activity of the graphics adaptor 38 of figure 2 in acquiring data form the decompressor 36.
From start up 80 the graphics adaptor passes to a first test 82 where it waits for an interrupt from the data decompressor 36 on the interrupt line 44. If the first test 82 detects no interrupt, control is passed to a first activity 84 where the display 22 is controlled. This first activity 84 is more fully described with reference to figure 7.
If the first test 82 detects an interrupt from the decompressor 36 on the interrupt line 44, control is passed to a second test 86 which looks to see if there is room for a new image in the main memory 48. If the operator has not requested display of a fresh image in the video memory 50, the contents of the main memory 48, should it be full, remain unchanged. Under these conditions, the second test 86 detects that there is no room for a new image and passes control back to the first test 82.
If the second test 86 detects that there is indeed room for a new image in the main memory 48, control is passed to a first operation 88 where those images, already stored in the main memory 48, are moved up the stack. The main memory 48, in this instance, is chosen to store as many as six images. If there is room in the main memory 48 for a fresh image, all of the previously stored images are moved up one place in a first-in first-out (FIFO) stack. New data, representative of a fresh image, is then put in the earliest position in the stack in the main memory 48 and that image, longest in the main memory 48 is readied for provision to the video memory 50. As earlier described, data is deposited in the main memory by manipulation of blocks of addresses on the graphic adaptor address bus 40 and the graphics adaptor data bus 42.
Figure 7 is a flow chart of the first activity 84 of figure 6 which controls the display 22.
From the first test 82 (shown in broken outline) control is passed to a second operation 90 which displays the current page 56,62, as earlier described, via the video coupling 20 and the diplexer 70, on the display monitor 22. Control is regularly passed to a third test 92 which looks for a changed command from the operator via the keyboard 26. If no change is required, control is passed back to the first test 82 of figure 6. If the third test 92 detects a requirement for change, control is passed to a third operation 94 which discards the contents of that page 56,62 previously the current page, and switches the display to the opposite page 56.64, pre-loaded as earlier described. Control is then passed to a fourth operation 96 where the page, now not selected for display, is loaded via the multiplexter 42 and the graphics adaptor address bus 40 with a fresh image. That image, stored and now displayed in the top half of that page 62, 56 currently selected for display by the diplexer 70, is stored by the microprocessor controller 46, manipulating the graphics adaptor data bus 42 and the graphics address bus 40 in the bottom half of the other page 62,56 not selected for display. At the same time, data representative of a fresh image is retrieved from the main memory 48 and stored in the top half 64,58 of that page 56,62 not selected for display.
The fourth operation 96 passes control back to the first test 82 for continuation of the flow chart of figure 6.
Fresh data, having been supplied to the video memory 50, the main memory 48 is ready to receive fresh data from the data compressor 36 should it indicate, via the interrupt line 44, that data is available. In this instance, the second test 86 of figure 6 would provide indication that there is indeed, room for a new image.

Claims

An apparatus for displaying images representative of data and comprising
a first memory (56) and a second memory (62) each for holding data which can be converted into a form capable of generating a separate image to be displayed on a display screen (22); and
means (70) to select said first memory (56) or said second memory (62) for provision of data therein to be displayed;
characterized by
said first memory (56) and said second memory (62) each being loaded with data directly representative of images to be displayed;
means (68, 46) for said first memory (56) to be loaded, while said second memory (62) is selected for viewing, with representation of a first image (74) in a top half (58) thereof and representation of a second image (76) in a bottom half (60) thereof;
means (68, 46) for said second memory (62) to be loaded, while said first memory (56) is selected for viewing, with representation of said second image (76) in a top half (64) thereof and with representation of a third, or further, image (78) in a bottom half (66) thereof;
whereby, when said second memory (62) is selected for viewing, said second image (76) instantaneously moves from a first part to a second part of the display screen (22) and said third, or further, image (78) is introduced at the first part of the display screen (22), and so on.
An apparatus according to claim 1 wherein data, representative of values, read from an image, is stored in association with data representative of the image.
An apparatus according to claim 1 or 2, wherein each image is of a document.