EP0342466A3 - Mémoire RAM statique avec immunité d'évènement singulier - Google Patents

Mémoire RAM statique avec immunité d'évènement singulier Download PDF

Info

Publication number
EP0342466A3
EP0342466A3 EP19890108234 EP89108234A EP0342466A3 EP 0342466 A3 EP0342466 A3 EP 0342466A3 EP 19890108234 EP19890108234 EP 19890108234 EP 89108234 A EP89108234 A EP 89108234A EP 0342466 A3 EP0342466 A3 EP 0342466A3
Authority
EP
European Patent Office
Prior art keywords
static ram
single event
immunity
memory device
event immunity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19890108234
Other languages
German (de)
English (en)
Other versions
EP0342466A2 (fr
Inventor
Frederick Smith
Robert Yu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of EP0342466A2 publication Critical patent/EP0342466A2/fr
Publication of EP0342466A3 publication Critical patent/EP0342466A3/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G11C11/4125—Cells incorporating circuit means for protecting against loss of information
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/005—Circuit means for protection against loss of information of semiconductor storage devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
EP19890108234 1988-05-16 1989-05-08 Mémoire RAM statique avec immunité d'évènement singulier Withdrawn EP0342466A3 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US19445588A 1988-05-16 1988-05-16
US194455 1988-05-16

Publications (2)

Publication Number Publication Date
EP0342466A2 EP0342466A2 (fr) 1989-11-23
EP0342466A3 true EP0342466A3 (fr) 1990-11-28

Family

ID=22717665

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19890108234 Withdrawn EP0342466A3 (fr) 1988-05-16 1989-05-08 Mémoire RAM statique avec immunité d'évènement singulier

Country Status (2)

Country Link
EP (1) EP0342466A3 (fr)
JP (1) JPH02103795A (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5303190A (en) * 1992-10-27 1994-04-12 Motorola, Inc. Static random access memory resistant to soft error
JP3535615B2 (ja) 1995-07-18 2004-06-07 株式会社ルネサステクノロジ 半導体集積回路装置
US7397692B1 (en) 2006-12-19 2008-07-08 International Business Machines Corporation High performance single event upset hardened SRAM cell

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0098417A2 (fr) * 1982-06-15 1984-01-18 Kabushiki Kaisha Toshiba Dispositif de mémoire semi-conductrice

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0098417A2 (fr) * 1982-06-15 1984-01-18 Kabushiki Kaisha Toshiba Dispositif de mémoire semi-conductrice

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
IBM TECHNICAL DISCLOSURE BULLETIN, vol. 29, no. 7, December 1986, pages 2826-2827, New York, US; "SRAM cell stability enhancement via DRAM technology" *
IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. SC-22, no. 3, June 1987, pages 430-436, IEEE, New York, US; P.M. CARTER et al.: "Influences on soft error rates in static RAM's" *

Also Published As

Publication number Publication date
EP0342466A2 (fr) 1989-11-23
JPH02103795A (ja) 1990-04-16

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