EP0316397A1 - Dispositif semi-conducteur - Google Patents

Dispositif semi-conducteur

Info

Publication number
EP0316397A1
EP0316397A1 EP19880904600 EP88904600A EP0316397A1 EP 0316397 A1 EP0316397 A1 EP 0316397A1 EP 19880904600 EP19880904600 EP 19880904600 EP 88904600 A EP88904600 A EP 88904600A EP 0316397 A1 EP0316397 A1 EP 0316397A1
Authority
EP
European Patent Office
Prior art keywords
switching element
transmission line
semiconductor switching
electrode
phase shift
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19880904600
Other languages
German (de)
English (en)
Inventor
Anthony Alan Lane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BAE Systems Defence Systems Ltd
Original Assignee
Plessey Overseas Ltd
Siemens Plessey Electronic Systems Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Plessey Overseas Ltd, Siemens Plessey Electronic Systems Ltd filed Critical Plessey Overseas Ltd
Publication of EP0316397A1 publication Critical patent/EP0316397A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/18—Phase-shifters
    • H01P1/185—Phase-shifters using a diode or a gas filled discharge tube

Definitions

  • the present invention relates to a semiconductor device and more specifically but not exclusively to such a device which can act as a microwave phase shift circuit.
  • the apparatus and techniques used at present for phase shift circuits for microwave signals are for the most part adaptations of designs used in lower frequency communication apparatus such as for radio. These designs because of the relatively low frequencies involved do not take a full account of the contributions of stray capacitance and inductance effects. However, with higher frequency microwave radiated signals these stray capacitance and inductance effects become highly important to the whole function of the apparatus. Some practical designs in use at the present time are in fact dependent upon the presence of parasitic or stray signal effects to achieve an effective working operation of the device.
  • Gallium arsenide (GaAs) along with other Hl-V type semiconductor materials such as indium phosphide can be useful in microwave switching applications because of their capability of high switching speeds.
  • these materials are costly and consequently the available area must be carefully employed with these devices in order to make full use of the material.
  • a phase shift circuit derived from a lower frequency design thus may tend not to maximise use of the semiconductor material.
  • some of those prior devices have been provided with a transmission line topography involving adequate spacing of the lines to prevent inductive coupling etc. and have included bends in the length of the transmission lines. These factors can make determination of "effective" electrical properties difficult and they may in addition introduce phase shift errors due to the presence of unequal transmission line lengths. It is an object of the present invention to provide a device in which some of those problems are reduced.
  • a semiconductor switching element capable of causing a phase shift in a signal which is applied to said element, the element comprising a Metal Semiconductor Field Effect Transistor (FET) having a first ohmic track electrode and a second ohmic track electrode serially connected by an ohmic electrode bridge to form a transmission line for transmission of the signal, the transmission line being arranged adjacent to an active channel region and a gate electrode of the transistor, the gate electrode being arranged for coupling to a suitable electrical potential source whereby the active channel region is controllable such that a predetermined phase shift is applied to the signal upon transmission through the transmission line.
  • FET Metal Semiconductor Field Effect Transistor
  • Figure 2 is a plan of a practical embodiment of part of the circuit illustrated in Figure 1 ;
  • Figure 3 shows symbolic representations of phase shift circuits adaptable for 22.5°, 45° and 90° phase shifts;
  • Figure 4 shows symbolic representations of phase shift circuits adaptable for a 180° phase shifts
  • Figure 5 is a plan view of a phase shift circuit element according to the present invention.
  • Figure 6 is a plan view of a practical embodiment of the element illustrated in Figure 5;
  • Figure 7 is a plan view of the embodiment illustrated in Figure 5 used in a loaded line type arrangement; and, Figure 8 illustrates in plan view several elements as illustrated in Figure 5 arranged in a delay line phase shift arrangement.
  • Typical prior phase shift circuits as shown in Figure 1 comprise several switching devices such as Metal Semiconductor Field Effect Transistors (MESFET) (a) and (b) arranged to switch in phase sequence on an incoming wave signal between effective high and low pass filter arrangements.
  • the MESFETs (a) and (b) are arranged to work in antagonistic sets wherein when MESFETs (a) are in operation the MESFETs (b) are "pinched-off" or inoperative and vice-versa. By using this phased switching sequence the incoming wave signal has its phase shifted.
  • the circuit can be considered as four distinct areas or elements (1 ,4,6, and 8).
  • Areas 4 and 6 comprise a MESFET (a) with a parallel capacitance C connected across the source and drain electrodes at the MESFET (a), these elements receive the incoming signals through an input port 2 and output the shifted signals at an output port 10 respectively and are located before and after a switching area 1.
  • the area 8 comprises a MESFET (b) and a parallel arrangement of a MESFET (a) and an inductance L2 both anchored to electrical earth.
  • the switching area 4 comprises a MESFET (b) (denoted 3) and two equal lengths of transmission line 5 with a connection to area 8 therebetween.
  • the insertion loss must be low consequently the reactance of the capacitances should be low (high capacitance) while the reactance of the inductor L 2 should be high (high inductance).
  • the reactance of the inductors Li should be low (low inductance) while the reactance of the MESFETs (a) should be high (low capacitance).
  • the only method of achieving this low inductance of Li is by having a short length of transmission line.
  • the area 1 at the centre of the phase shift circuit ( Figure 1) being a MESFET shunted by two equal lengths (electrically) of transmission line.
  • phase shift circuits can be realised as high pass low pass “T” networks for 22.5°, 45° and 90° phase bits as . seen in Figure 3 while 180° phase shifts are realised as inverted “L” "T” networks ( Figure 4).
  • the semiconductor device of the present invention utilises the parasitic capacitance and inductance effects by combining two passive circuit elements, that is the transmission lines with a MESFET device. This allows a circuit to be constructed which has a phase bit as low as 22.5°.
  • FIG. 5 The combination of a MESFET and the transmission lines into a continous FET (CFET) as shown in Figure 5 illustrates the present invention.
  • the design reduces the effects of the parasitics hereby improving radio frequency performance while allowing high circuit packing densities to be achieved. This can economise on the valuable GaAs area permitting a lower unit production cost with higher manufacturing yields.
  • the combination of a MESFET and the transmission line into a continuous FET (CFET) as shown in Figure 5 illustrates the present invention.
  • the CFET is constructed though depositing two parallel layers or tracks (11, 13) of metalisation on to an "active" GaAs area or mesa 15. With a gate stripe 17 placed between the two tracks (11,13) it is possible to control the resistance of the GaAs area 15 channel by application of a potential to the gate stripe 17. If two adjacent ends of the tracks (11,13) are connected by a bridge 19 then a functional transmission line is formed.
  • This transmission line (11,19,13) may be short circuited, that is with zero current passing through the transmission line, by the active GaAs mesa 15 when zero potential is applied to the gate stripe 17. However, when a negative potential of sufficient magnitude to deplete the active region of carriers in the GaAs mesa 15 is applied to the gate stripe 17 the transmission line (11,19,13) becomes operative.
  • Figure 6 illustrates the CFET of the present invention inserted into a practical circuit arrangement as mentioned previously in the description relating to Figure 5.
  • the CFET can be accommodated on a much reduced surface area of GaAs consequently substantial cost savings can be made.
  • the disclosed CFET has a symmetrical layout without the need to include specific transmission line bends or a suitable line spacing to avoid electrical coupling. Consequently, apart from making a more efficient use of surface area as indicated above this layout allows a more accurate determination of "effective" electrical path lengths and thus a greater consistency in the phase shifting operation.
  • phase shift circuits of differing degree can be constructed.
  • the CFET of the present invention may also be used in a loaded line application as shown in plan view in Figure 7.
  • the metallised tracks (31,33) have capacitance C areas attached to their length though integrated circuit layer inter-connective vias or paths such that the effective lengths of the tracks are enhanced consequently surface area can be saved.
  • Figure 8 illustrates a further application of the present CFET in a switched delay line phase shift circuit where several delay lines (51, 53, 55) of varying transmission length can be switched to alter the operating characteristics of the circuit.
  • the CFET could be used in a voltage controlled filter where the potential applied to the transmission lines may allow alteration of the filter pass characteristic.
  • III-V material has been specifically described in this embodiment it will be appreciated that alternative suitable materials may be used such as indium phosphide or silicon- on-sapphire. Whilst the embodiment herein described relates to "normally- off * MESFET devices it will be appreciated that "normally-on" MESFET devices may alternatively be used.

Landscapes

  • Junction Field-Effect Transistors (AREA)
  • Networks Using Active Elements (AREA)

Abstract

Un élément commutateur semi-conducteur comprend une ligne de transmission et de transistor à effet de champ (11, 13), la ligne de transmission étant montée autour du canal actif (15) du transistor à effet de champ, séparé de celui-ci par une grille allongée (17). La ligne de transmission (11, 13) peut ainsi être court-circuitée par mise à la terre lorsque l'on applique un potentiel électrique approprié à la grille, ce qui permet de construire un circuit de déphasage de micro-ondes qui utilise au maximum la zone disponible en matériau semi-conducteur.
EP19880904600 1987-06-09 1988-06-06 Dispositif semi-conducteur Withdrawn EP0316397A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8713403 1987-06-09
GB878713403A GB8713403D0 (en) 1987-06-09 1987-06-09 Semiconductor device

Publications (1)

Publication Number Publication Date
EP0316397A1 true EP0316397A1 (fr) 1989-05-24

Family

ID=10618576

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19880904600 Withdrawn EP0316397A1 (fr) 1987-06-09 1988-06-06 Dispositif semi-conducteur

Country Status (4)

Country Link
EP (1) EP0316397A1 (fr)
JP (1) JPH02500236A (fr)
GB (2) GB8713403D0 (fr)
WO (1) WO1988010012A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2207805B (en) * 1987-08-06 1991-12-11 Plessey Co Plc Improvements in or relating to microwave phase shifters
EP1030448B1 (fr) * 1998-05-19 2013-11-06 Panasonic Corporation Filtre a onde acoustique de surface, dispositif de partage d'antenne comprenant ce filtre et terminal de communication mobile comprenant ce filtre

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3560891A (en) * 1969-03-24 1971-02-02 Westinghouse Electric Corp Reflection phase shifter utilizing microstrip directional coupler
US4605912A (en) * 1981-12-03 1986-08-12 General Electric Company Continuously variable phase shifting element comprised of interdigitated electrode MESFET
US4471330A (en) * 1982-11-01 1984-09-11 General Electric Company Digital phase bit for microwave operation

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO8810012A1 *

Also Published As

Publication number Publication date
JPH02500236A (ja) 1990-01-25
GB2206235B (en) 1990-12-19
GB8713403D0 (en) 1987-07-15
WO1988010012A1 (fr) 1988-12-15
GB8813305D0 (en) 1988-07-13
GB2206235A (en) 1988-12-29

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Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 19890112

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): DE FR NL

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: SIEMENS PLESSEY ELECTRONIC SYSTEMS LIMITED

17Q First examination report despatched

Effective date: 19910910

STAA Information on the status of an ep patent application or granted ep patent

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18W Application withdrawn

Withdrawal date: 19920825