EP0315365B1 - Anzeigegerät - Google Patents

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Publication number
EP0315365B1
EP0315365B1 EP88310086A EP88310086A EP0315365B1 EP 0315365 B1 EP0315365 B1 EP 0315365B1 EP 88310086 A EP88310086 A EP 88310086A EP 88310086 A EP88310086 A EP 88310086A EP 0315365 B1 EP0315365 B1 EP 0315365B1
Authority
EP
European Patent Office
Prior art keywords
column
matrix
sub
row
portions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP88310086A
Other languages
English (en)
French (fr)
Other versions
EP0315365A2 (de
EP0315365A3 (de
Inventor
Graham Leslie Wright
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thorn EMI PLC
Original Assignee
Thorn EMI PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thorn EMI PLC filed Critical Thorn EMI PLC
Priority to AT88310086T priority Critical patent/ATE103092T1/de
Publication of EP0315365A2 publication Critical patent/EP0315365A2/de
Publication of EP0315365A3 publication Critical patent/EP0315365A3/de
Application granted granted Critical
Publication of EP0315365B1 publication Critical patent/EP0315365B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3622—Control of matrices with row and column drivers using a passive matrix
    • G09G3/3644—Control of matrices with row and column drivers using a passive matrix with the matrix divided into sections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix

Definitions

  • the present invention relates to a liquid crystal display.
  • EP 0105767 discloses a display device in which the column electrodes are each divided into two sections so as to form two submatrices, each having a separate set of data drives which are addressed alternately as the rows are scanned.
  • GB-A-2146478A discloses an arrangement in which two or more rows of a liquid crystal display are addressed with pulses which overlap in time.
  • the display has a switching transistor per pixel, and the duration of each row selection pulse, to switch the transistors on, is twice the line period, beginning one line period early.
  • the data pulses applied to the columns are those of row (N-1) so the LCD capacitances of row N (i.e. the capacitances of the electrodes of row N) are charged to V N-1 .
  • the data for row N is applied to change the charge to the correct V N .
  • the capacitances in row N+1 are charged to V N since the row drive N+1 overlaps row N drive.
  • the charges are corrected to V N+1 .
  • a display device comprising: a matrix of selectively settable liquid crystal display cells defined by areas of overlap between members of a set of row electrodes and members of a set of column electrodes, the column electrodes each comprising a plurality of column portions defining a corresponding plurality of sub-matrices: and drive means for driving said column electrodes and means for addressing simultaneously a row in each of more than one sub-matrix; characterised by selectively operable switching means between adjacent portions of each column electrode for permitting connection of a selected series of portions of that column electrode to the drive means.
  • a method of addressing such a display device characterised by: charging the capacitances of the portions of the column electrodes in each sub-matrix in turn by operating the switching means so as to connect a successively decreasing number of portions of each electrode to the drive means whilst driving each electrode to the voltage required for the respective connected portion furthest from the drive means in the series, and addressing a row electrode in each charged sub-matrix.
  • the display device includes means for applying the data pulse of the second furthest sub-matrix while still applying the row selection pulse to the furthest sub-matrix. This is so, because the furthest sub-matrix is now isolated from the column drives.
  • data pulses can be applied to the columns in each sub-matrix in turn while maintaining the row selection drive in all sub-matrices simultaneously. It is necessary to load all column capacitances in each sub-matrix in a time short compared with the row address period.
  • a liquid crystal display 1 is formed of a matrix of twisted nematic liquid crystal cells which are separately settable by appropriate multiplexed addressing of the information to be displayed. Each cell is defined by the overlap (as shown in Figure 1) of a column electrode strip (e.g. 2, 3 or 4) and a row electrode strip 5 to 13.
  • Each column electrode 2, 3, 4 is formed as a plurality of column portions 2a, 2b, 2c; 3a, 3b, 3c; 4a, 4b, 4c. These define a number of distinct sub-matrices 14, 15, 16 located one below another in the row addressing sequence, the sub-matrices sharing respective column electrodes 2 to 4, while having different row strips, namely 5 to 7, 8 to 10 and 11 to 13 respectively.
  • Switches 17 to 22 e.g. transistors or other electronic components
  • switches 17 to 22 actuable by the application of signals along switch lines 23 and 24.
  • the driving circuitry (not shown but located at the upper end of lines 2 to 4) drives all column portions to the voltage required on the sub-matrix 16.
  • Switches 20, 21 and 22 are then opened by application of a suitable gate voltage and the drive voltage for sub-matrix 15 applied, and so on.
  • the display can therefore be divided into a number of sub-matrices without increasing the number of external drivers, and yield should remain high since relatively few transistors are used (compared with a full active matrix). Rapid switching of the transistors is required (all of the column portions must be loaded in a short time compared with the row address time), and the time constant for the decay of charge stored on the column portions must be long compared with the row address times.
  • the RC time constants associated with the "on" resistance of the transistors and the capacitance of the column portions are kept small in order that all column portions can be loaded with charge in a time small compared with the row address time (equal to the frame period divided by the number of lines, i.e. row electrodes, in each sub-matrix).
  • FIG. 2 illustrates the detailed construction of the switching transistors 17 to 19 and their interface with, and connection, of the portions 2a, 2b; 3a, 3b; 4a, 4b of the column conductors 2, 3 and 4.
  • Each transistor has a silicon island 30 and a source/drain contact hole 31.
  • the above arrangement can be modified such as to provide a different number of rows in each sub-matrix, the minimum limit being a single row per sub-matrix.
  • the number of lines which could be addressed is somewhat limited by the high RC time constants arising from placing a large number of transistor "on" resistances in series.
  • About 30 lines of 1mm square pixels can be achieved in a twisted nematic display if the transistor "on" resistance can be limited to 5 kohms (which is typical for a poly silicon transistor having a gate width of the maximum possible, 1mm).
  • a display can be driven in two sub sectors to achieve 60 lines in total, and the total number of lines achieved if multiplexed banks are used can be much higher.
  • Figure 3 shows a variant on the matrix of Figure 1, the major distinction being that now the switching transistors 40 to 48 do not connect between adjacent strips of a given column, but instead connect column portions (e.g. A, B and C) of each full column strip to separate column address lines 49 to 51 and hence to the column drive.
  • Each column capacitance can now be charged by the closure of a single transistor switch, thereby eliminating problems resulting from the "on" resistance of several resistors in series, and consequently removing the restriction on the number of submatrices into which the display is divided.
  • the number of transistors and cross-over points is reduced as compared to that in full-active matrixing, and a reduction in the number of display defects may be achieved.
  • a display embodying the present invention may have a higher yield since the 'cross over' source of defects is eliminated.
  • a display embodying the present invention can also be used to connect adjacent multiplexed tiles through externally mounted transistors.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Liquid Crystal (AREA)
  • Control Of El Displays (AREA)
  • Control Of Gas Discharge Display Tubes (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Vehicle Body Suspensions (AREA)
  • Diaphragms For Electromechanical Transducers (AREA)
  • Measuring Pulse, Heart Rate, Blood Pressure Or Blood Flow (AREA)

Claims (2)

  1. Anzeigevorrichtung mit einer Matrix (1) aus wahlweise einstellbaren Flüssigkristall-Anzeigezellen, die durch Überlappungsbereiche zwischen Elementen einer Gruppe von Reihen-Elektroden (5 bis 13) und Elementen einer Gruppe von Spalten-Elektroden (2 bis 4) definiert werden, wobei die Spalten-Elektroden jeweils eine Vielzahl von Spaltenteilen (2a, 2b, 2c; 3a, 3b, 3c; 4a, 4b, 4c) enthalten, die eine entsprechende Zahl von Untermatrizen (14, 15, 16) definieren, mit Ansteuermitteln zum Ansteuern der Spalten-Elektroden, und mit Mitteln zum gleichzeitigen Adressieren einer Reihen-Elektrode in jeder von mehr als einer Untermatrix, gekennzeichnet durch wahlweise betätigbare Schaltermittel (17, 18, 19, 20, 21, 22) zwischen benachbarten Teilen jeder Spalten-Elektrode, um eine Verbindung einer ausgewählten Reihe von Teilen der Spalten-Elektrode mit den Ansteuermitteln möglich zu machen.
  2. Verfahren zum Adressieren einer Anzeigevorrichtung nach Anspruch 1, gekennzeichnet durch: Laden der Kapazitäten der Teile der Spalten-Elektroden in jeder Untermatrix der Reihe nach durch Betätigung der Schaltermittel, um so eine nacheinander abnehmende Zahl von Teilen jeder Elektrode mit den Ansteuermitteln zu verbinden, während jede Elektrode auf die Spannung angesteuert wird, die für den entsprechenden verbundenen Teil benötigt wird, der sich gegenwärtig am weitesten von den Ansteuermitteln weg befindet, und Adressieren einer Reihen-Elektrode in jeder geladenen Untermatrix.
EP88310086A 1987-11-04 1988-10-27 Anzeigegerät Expired - Lifetime EP0315365B1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT88310086T ATE103092T1 (de) 1987-11-04 1988-10-27 Anzeigegeraet.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB878725824A GB8725824D0 (en) 1987-11-04 1987-11-04 Display device
GB8725824 1987-11-04

Publications (3)

Publication Number Publication Date
EP0315365A2 EP0315365A2 (de) 1989-05-10
EP0315365A3 EP0315365A3 (de) 1991-03-20
EP0315365B1 true EP0315365B1 (de) 1994-03-16

Family

ID=10626416

Family Applications (1)

Application Number Title Priority Date Filing Date
EP88310086A Expired - Lifetime EP0315365B1 (de) 1987-11-04 1988-10-27 Anzeigegerät

Country Status (4)

Country Link
EP (1) EP0315365B1 (de)
AT (1) ATE103092T1 (de)
DE (1) DE3888451T2 (de)
GB (1) GB8725824D0 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5644328A (en) * 1995-03-03 1997-07-01 Motorola Apparatus and method for operating groups of led display pixels in parallel to maximize active time
TW511049B (en) * 2000-11-08 2002-11-21 Koninkl Philips Electronics Nv Display device
GB0030592D0 (en) 2000-12-15 2001-01-31 Koninkl Philips Electronics Nv Active matrix device with reduced power consumption
KR100733879B1 (ko) * 2000-12-30 2007-07-02 엘지.필립스 엘시디 주식회사 액정표시장치
KR100759974B1 (ko) * 2001-02-26 2007-09-18 삼성전자주식회사 액정 표시 장치 및 그의 구동 방법.
KR20050004175A (ko) * 2002-05-24 2005-01-12 코닌클리케 필립스 일렉트로닉스 엔.브이. 전기 이동 디스플레이 디바이스와 그 구동 방법

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2532455A1 (fr) * 1982-08-26 1984-03-02 Commissariat Energie Atomique Procede de commande d'un imageur matriciel
JPS59121391A (ja) * 1982-12-28 1984-07-13 シチズン時計株式会社 液晶表示装置

Also Published As

Publication number Publication date
DE3888451D1 (de) 1994-04-21
EP0315365A2 (de) 1989-05-10
DE3888451T2 (de) 1994-09-29
EP0315365A3 (de) 1991-03-20
ATE103092T1 (de) 1994-04-15
GB8725824D0 (en) 1987-12-09

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