EP0285417A2 - Commutateur semi-conducteur à démarrage doux - Google Patents

Commutateur semi-conducteur à démarrage doux Download PDF

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Publication number
EP0285417A2
EP0285417A2 EP88302885A EP88302885A EP0285417A2 EP 0285417 A2 EP0285417 A2 EP 0285417A2 EP 88302885 A EP88302885 A EP 88302885A EP 88302885 A EP88302885 A EP 88302885A EP 0285417 A2 EP0285417 A2 EP 0285417A2
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EP
European Patent Office
Prior art keywords
load
terminal
coupled
transistor
control terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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EP88302885A
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German (de)
English (en)
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EP0285417A3 (fr
Inventor
Peter John Carlson
Robert George Hodgins
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General Electric Co
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General Electric Co
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Priority claimed from GB878707636A external-priority patent/GB8707636D0/en
Priority claimed from US07/163,534 external-priority patent/US5015921A/en
Application filed by General Electric Co filed Critical General Electric Co
Publication of EP0285417A2 publication Critical patent/EP0285417A2/fr
Publication of EP0285417A3 publication Critical patent/EP0285417A3/fr
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B39/00—Circuit arrangements or apparatus for operating incandescent light sources
    • H05B39/02—Switching on, e.g. with predetermined rate of increase of lighting current

Definitions

  • This invention relates to control circuitry for controlling conduction through a load such as circuitry which controls current flow through a semiconductor device thereof which is coupled to an incandescent lamp, a viscous loaded motor or other similar load device whose impedance varies in a nonlinear manner as it turns on.
  • control circuitry used to control an incandescent lamp or other load which has a nonlinear impedance during turn-on or warm-up comprises a semiconductor device such as a power transistor (e.g., an n-channel Metal-Oxide-Silicon Field Effect Transistor (MOSFET)).
  • MOSFET Metal-Oxide-Silicon Field Effect Transistor
  • a single power n-channel MOSFET can be connected with its drain connected to a power supply having a positive voltage +VDD and its source connected to one terminal of an incandescent lamp.
  • a second terminal of the lamp is connected to ground potential.
  • the gate of the MOSFET is typically coupled through a switch, in many applications a hand operated switch, to a positive voltage source which typically has a potential level of +VDD or in many cases +2VDD.
  • the MOSFET When the switch is turned on the MOSFET is enabled (turned on) and a current path is created from +VDD, through the MOSFET and lamp, and then to ground.
  • the electrical characteristics of an incandescent lamp are such that while the lamp is cold its resistance (the "cold” resistance) is relatively low. As the lamp starts to conduct it heats up and its resistance increases in a nonlinear manner with its "hot” resistance being significantly greater than its “cold” resistance.
  • the MOSFET used must be designed to be able to dissipate a relatively high amount of power as the lamp is turning on since there is a large current spike generated and a significant portion of the voltage of the power supply is across the drain-source of the MOSFET during turn on since the lamp's "cold” resistance is relatively low.
  • FIG. 2 shows a graph of the junction temperature in degrees C. on the y-axis of a MOSFET in series with the lamp versus time (t) in milliseconds (mS) on the x-axis.
  • the thermal constant of the MOSFET determines the rate of rise of the temperature thereof.
  • the maximum desirable temperature of many MOSFETS is approximately 160 degrees C.
  • One solution to this problem is to increase the area of the MOSFET such that it can handle 42 amperes of peak current without its temperature exceeding 160 degrees C. This solution is undesirable from an economic view point since a larger area MOSFET requires more silicon and is therefore more expensive to produce.
  • PWM Pulse Width Modulation
  • the present invention is directed to circuitry connectable to a load whose impedance nonlinearly increases during turn-on.
  • the circuitry comprises a device (e.g., a power MOSFET) having a control terminal and first and second output terminals, a first biasing means selectively coupled to the control terminal of the device, a second biasing means selectively coupled to the control terminal of the device, and detecting and coupling/decoupling means coupled to the second output terminal of the device.
  • the first biasing means when coupled to the control terminal of the device, biases on the device so as to facilitate current flow through the device.
  • the second biasing means when coupled to the control terminal of the device, biases on the device so as to facilitate a flow of current through the device which is greater than that facilitated by the first biasing means.
  • the detecting and coupling/decoupling means effectively detects the impedance of the load and couples the first biasing means to the control terminal of the device and decouples the second biasing means from the control terminal of the device if the impedance of the load is at or below a preselected level. If the impedance of the load is above the preselected level the detecting and coupling/decoupling means couples the second biasing means to the control terminal of the device and decouples the first biasing means from the control terminal of the device.
  • the first biasing means is an essentially constant current generating means which biases the control terminal of the device such that an essentially constant current flows through the device.
  • the first biasing means is an essentially constant current means which biases the control terminal with an essentially constant current in to the control terminal of the device such that the bias of the control terminal increases with time as does the current flow through the device.
  • the second biasing means heavily biases on the device such that it is essentially fully on with its output resistance being as low as can occur.
  • the magnitude of the current spike generated by the series combination of a transistor and a load whose impedance increases nonlinearly during turn-on can be significantly reduced by first biasing the device such that a relatively low level of current flows there through.
  • the low level of current flow warms up the load (e.g., a lamp) and causes its resistance to increase.
  • the biasing is then substantially increased. This allows the load to fully turn-on and to reach its "hot" (high) resistance state which occurs during steady state operation.
  • By reducing the magnitude of the current spike it is feasible to significantly reduce the area of the transistor and thus to reduce the cost of same.
  • a soft start solid state switch 10 which comprises an n-channel Metal-Oxide-Silicon Field Effect Transistor (MOSFET) 12 (also denoted as a device), n-channel MOSFETs 14, 16 and 60 (also denoted as switching devices), an operational amplifier 18, a two input comparator 20, a logic circuit 22, a voltage multiplier circuit 24, a resistor 26, a first voltage reference source (Vref1) 28 and a second voltage reference source (Vref 2) 30.
  • a nonlinear load 32 e.g., a lamp
  • a second terminal 35 of load 32 is coupled to a power supply VSS which is typically ground potential.
  • a switch 36 is coupled to one input terminal 38 of logic circuit 22.
  • a first terminal of switch 36 is coupled to a first terminal 40 of a resistor 42.
  • a second terminal of resistor 42 is coupled to a power supply +VCC.
  • switch 10 first limits current flow through load 32 to a relatively low essentially constant level.
  • the relatively low essentially constant current flow through the load 32 causes it to warm up and for the impedance thereof to increase.
  • Switch 10 senses the impedance of the load 32 as the low level essentially constant current increases the temperature and impedance of load 32 until a preselected level of impedance exists. At this point switch 10 fully biases on transistor 12.
  • the current flow through transistor 12 and load 32 significantly increases and the impedance of load 32 continues to increase until it reaches its "hot" (high) impedance level associated with steady state operation.
  • the initial heating (denoted as preheating) of load 32 by the constant current flowing there through results in an increase in its impedance such that when switch 10 fully biases on transistor, the magnitude of the resulting current spike through load 32 and transistor 12 is substantially lower than would occur if preheating by a constant current was not used.
  • Transistor 12 is typically a large MOSFET which requires a substantial amount of silicon area compared to all other components, devices, and circuitry of switch 10. Accordingly, being able to keep the area of transistor 12 to a relatively modest level significantly reduces the overall size of a silicon integrated circuit chip in which switch 10 is fabricated and thus reduces cost.
  • the gate of transistor 12 is coupled to the sources of transistors 14 and 16, to the drain of transistor 60 and to a node 46.
  • the drain of transistor 16 is coupled to an output of operational amplifier 18 and to a node 48.
  • An output terminal of voltage multiplier circuit 24 is coupled to the drain of transistor 14 and to a node 15.
  • the source of transistor 60 is coupled to VSS and to terminal 35.
  • Voltage multiplier circuit 24 and the drain of transistor 12 are coupled to a power supply +VDD and to terminal 11.
  • Transistor 12 has two sources. The first source is coupled to terminal 34, to load 32, to a first terminal of resistor 26, to a first terminal of voltage reference source 28, and to a first (positive) terminal of comparator 20.
  • the second source of transistor 12 is coupled to a second terminal of resistor 26, to a first input (negative) terminal of operational amplifier 18 and to a node 50.
  • a second terminal of voltage reference source 28 is coupled to a second input (positive) terminal of operational amplifier 18 and to a node 52.
  • An output terminal of comparator 20 is coupled to a second input terminal of logic circuit 22 and to a node 54.
  • a first output terminal of logic circuit 22 is coupled to the gate of transistor 60 and to a node 62.
  • a second output terminal of logic circuit 22 is coupled to the gate of transistor 14 and to a node 56.
  • a third output terminal of logic circuit 22 is coupled to the gate of transistor 16 and to a node 58.
  • switch 36 Assuming that initially switch 36 is open (in the position shown in FIG. 3) and load 32 has been off for a period of time. The voltage at terminal 34 is essentially zero and the output of comparator 20 is logical "0", typically at or near ground potential. Switch 36 is then closed as is the case if one desires to turn on the head lights of an automobile. In such case switch 36 is typically a hand operated switch located in the cab of an automobile and load 32 is the head light. This results in the output of logic circuit 22 producing a "0", approximately 0 volts, at node 56 and a "1", typically above +VDD when +VDD is in the range of +12 to +16 volts (the voltage of an automobile battery)at node 58.
  • Operational amplifier 18 generates an output voltage at terminal 48 which is coupled through biased on transistor 16 and which biases on transistor 12. Current starts to flow from +VDD through transistor 12 and load 32 and into VSS. The potential existing on node 50 is compared by operational amplifier 18 with the voltage at node 52. The voltage level of Vref1 is selected to correspond to a desired current level which is to selectively flow through transistor 12 and load 32. The output voltage generated by operational amplifier 18 at node 48 assumes a level which biases on transistor 12 and results in the current flow there through being set to the desired essentially constant level. This level is one at which the power being dissipated by transistor 12 is within the limits that transistor 12 can dissipate without being damaged.
  • the resistances of transistor 12 and load 32 and the magnitude of the difference between +VDD and VSS determine the current which flows through the series combination of both. Initially there is a relatively large current spike, which is within the limits than can be safely dissipated by transistor 12, and then the current drops to a substantially lower constant level which is a function of the resistance of transistor 12 and the "hot" resistance of load 32.
  • FIG. 4 there is shown a graph of current (the solid line) in amperes and resistance (the dashed line) in ohms on the y-axis versus time (t) in milliseconds (mS) on the x-axis of a typical load 32 such as a automobile head light (a lamp).
  • a typical load 32 such as a automobile head light (a lamp).
  • the resistance of lamp 32 increases from about .2 ohms to about .4 ohms.
  • FIG. 5 there is shown a graph of the junction temperature in degrees C of the transistor 12 on the y-axis versus time (t) in milliseconds (mS) on the x-axis.
  • FIG. 6 there is shown a transconductance operational amplifier 18a and constant current source 66 which can be substituted for operational amplifier 18, resistor 26 and voltage source (Vref1) 28 of FIG. 3.
  • FIG. 7 there is shown a differential current amplifier 18c and a constant current source 70 which can be substituted for the operational amplifier 18 , resistor 26 and voltage source (Vref1) 28 of FIG. 3.
  • logic circuit 22 which comprises two input AND gates 80 and 82 and inverters 84 and 86. If switch 36 of FIG. 3 is open, the equivalent of a "0" is applied to terminal 38. Nodes 56 and 58 are “0's” and node 62 is a "1", independent of the signal level applied to terminal 54. This condition isolates the gate of transistor 12 (node 46) from any source of turn-on bias and thus transistor 12 is disabled and acts as an open circuit between terminals 11 and 34. In addition, it enables (turns-on) transistor 60 which pulls node 46 (the gate of transistor 12) to VSS which disables transistor 12.
  • terminal 54 is switched from a "0" to a "1"
  • terminals 56 and 58 switch to a "1" and a "0", respectively.
  • This condition allows transistor 12 to conduct substantially more current from +VDD since its drain-source resistance is at a low value. This point in time corresponds to when the resistance of load 32 has exceeded a preselected level which is represented by the level of Vref2.
  • Switch 200 comprises an n-channel MOSFET 202, a two input comparator 276, a two input differential amplifier 230, diodes 224, 226, 270 and 274, zener diode 302, power supply by-pass capacitors 298, 300, 344, 346, 356 and 358, potentiometers 282 and 320, capacitor 348, switching devices 306 and 322, current sensing coil (current transformer) 214, and resistors 216, 219, 220, 228, 234, 238, 240, 244, 248, 258, 264, 278, 288, 290, 294, 304, 310, 314, 324, 326, 328, and 352, two input NOR gates 254 and 260 and inverter 250.
  • a lamp 204 (typically the headlight on an automobile) whose turn-on is to be controlled by switch 10, is coupled to positive power supply +Vbat (typically the positive terminal of the automobile battery) and to a terminal 212.
  • a second terminal of lamp 204 is coupled to the drain of MOSFET 202 and to a node 206.
  • the source of transistor 202 is coupled to a negative terminal of the power supply -Vbat 208 (typically the negative terminal of the automobile battery).
  • a switch 268, typically a hand operated switch located in the cab of an automobile, is coupled by one terminal thereof to terminal 212 and to +Vbat and is coupled by a second terminal thereof to a first terminal of resistor 264 and to a terminal 266.
  • Transistor 202 controls current flow through lamp 202 such that when switch 268 is turned on (the position shown in FIG. 9), transistor 202 is weakly biased on by a source (essentially operational amplifier 330), which causes a relative low preselected essentially constant current to flow through lamp 204 and transistor 202.
  • a source essentially operational amplifier 330
  • the impedance of lamp 404 is monitored as current flows there through and when the impedance of lamp 204 reaches a preselected level, the weak bias applied to gate terminal 354 is cut off and a heavy (full on) bias is applied to terminal 354. The heavy bias facilitates substantial current flow through lamp 204 and transistor 202.
  • a relatively low level of current flow between the lamp (load) and current controlling transistor is used to first heat up the load (lamp) and to therefore cause the impedance (resistance) thereof to increase.
  • the biasing applied to the gate of the current controlling transistor is significantly increased such that the transistor is fully biased on.
  • a current spike is generated when the transistor is first fully biased on.
  • the magnitude of the current spike is significantly lower than would be the case if the transistor where not first weakly turned on. This reduces cost by allowing the area of the transistor to be significantly smaller than if the transistor had to safely carry a much higher current.
  • First terminals of each of resistors 216, 248 and 304, operational amplifier 330, lamp 204, comparator 276, two input differential amplifier 230, switch 268 and capacitors 344 and 346 are coupled to terminal 212 and to +Vbat.
  • First terminals of each of capacitors 298, 300, 356, and 358, second terminals of capacitors 344 and 346, first terminals of each of resistors 219, 240, 290, 324, 326, and 340, a second terminal of differential amplifier 230, the source of transistor 202, a first terminal of current sensing coil (current transformer) 206, the anode of zener diode 302, and second and third terminals of comparator 276 are coupled to a terminal 208 and to -Vbat.
  • a second terminal of operational amplifier 330 and second terminals of capacitors 356 and 358 are coupled to a terminal 210 and to power supply -Va.
  • a second terminal of lamp 204 is coupled to the drain of transistor 202, to a first terminal of resistor 220 and to a node 206.
  • Current sensing coil 214 is wrapped around the wire (no reference numbers shown) which couples the second terminal of lamp 204 to the drain of transistor 202.
  • a second terminal of current sensing coil 214 is coupled to a second terminal of resistor 340, to a first terminal of resistor 336 and to a node 338.
  • a second terminal of resistor 336 is coupled to a first input terminal (the negative input terminal) of operational amplifier 330 and to a node 334.
  • a second terminal of operational amplifier 330 is coupled to a first terminal of capacitor 348 and to a terminal 335.
  • a second terminal of capacitor 348 is coupled to an output terminal of operational amplifier 330, to a first terminal of resistor 352, and to a node 350.
  • a second terminal of resistor 352 is coupled to the gate of transistor 202 and to a node 354.
  • a second terminal of each of resistors 216 and 219 are coupled to a node 218, to the anode of diode 224, to the cathode of diode 226, to a positive first input terminal of differential amplifier 230 and to a node 218.
  • a second terminal of resistor 220 is coupled to the cathode of diode 224, to the anode of diode 226, to a first terminal of resistor 228 to a second negative input terminal of differential amplifier 230 and to a node 222.
  • a second terminal of resistor 228 is coupled to an output terminal of differential amplifier 230, to a first terminal of resistor 234, and to a node 232.
  • a second terminal of resistor 234 is coupled to a first terminal of resistor 238, to the anode of diode 270, to the cathode of diode 274, to a first positive input terminal of comparator 276 and to a node 236.
  • a second terminal of switch 268 is coupled to a first terminal of resistor 264 and to a node 266.
  • a second terminal of resistor 264 is coupled to first input terminals of NOR gates 254 and 260, a second terminal of resistor 258 and to a node 259.
  • a second terminal of resistor 248 is coupled to an output terminal of comparator 276, to a first terminal of resistor 244, to a first input terminal of inverter 250, to a second input terminal of NOR gate 260 and to a terminal 246.
  • a second terminal of resistor 244 is coupled to a second terminal of resistor 238, to a first terminal of resistor 240 and to a node 242.
  • An output terminal of inverter 250 is coupled to a second input terminal of NOR gate 254 and to a node 252.
  • An output terminal of NOR gate 260 is coupled to a control terminal of switch 322 and to a node 262.
  • An output terminal of NOR gate 254 is coupled to a control terminal of switch 306 and to a node 256.
  • a first terminal of resistor 278 is coupled to the cathode of diode 270, to the anode of diode 274, to a second (negative) input terminals of comparator 276 and to a node 272.
  • a second terminal of resistor 278 is coupled to the wiper arm of potentiometer 282 and to node 281.
  • a first terminal of potentiometer 286 is coupled to a first terminals of resistors 288 and 294 and to node 284.
  • a second terminal of resistor 288 is coupled to a second terminal of potentiometer 282, to a second terminal of resistor 290 and to a node 286.
  • a second terminal of resistor 294 is coupled to second terminals of capacitors 298 and 300, the cathode of zener diode 302, a second terminal of resistor 304, a first terminal of resistor 310, a first output terminal of switch 306 and to a node 296.
  • Second output terminals of switches 306 and 322 are coupled to a first terminal of resistor 328, a second terminal of resistor 326 and to a node 308.
  • a second terminal of resistor 328 is coupled to a second (positive) input terminal of operational amplifier 330 and to a node 332.
  • a first output terminal of switch 332 is coupled to a wiper arm 318 of a potentiometer 320 and to a node 319.
  • a first terminal of potentiometer 320 is coupled to a second terminal of resistor 310, to a first terminal of resistor 314 and to a node 312.
  • a second terminal of resistor 314 is coupled to a second terminal of resistor 324, to a second terminal of potentiometer 320 and to a node 316.
  • Switch 268 is shown with its wiper arm (no number shown) open such that terminals 212 and 268 are isolated from each other. This is the position of switch 268 which is used to turn on lamp 204.
  • Switches 306 and 322 are each typically an analog switch such as the Motorola MC14016 which comprises a pair of complementary MOS transistors and an inverter.
  • the input terminal (node 256) switch 306 is coupled to the gate of the n-channel transistor and an input terminal of the inverter of switch 306.
  • the output of the inverter is coupled to the gate of the p-channel transistor.
  • the drain of the n-channel transistor and the source of the p-channel transistor are coupled to node 296.
  • the source of the n-channel transistor and the drain of the p-channel are coupled to node 308.
  • the transistors and inverter of switch 322 are connected essentially in the same way as the corresponding components of switch 306 but are coupled to nodes 256, 319, and 308.
  • switch 200 acts to allow current to flow through lamp 204 and transistor 202 by, as will be clear from the below description, first weakly biasing the gate (node 354) of transistor 202 on to establish a relatively low constant current flow through lamp 204 and transistor 202 and then, after the resistance of lamp 204 reaches a preselected level, strongly biasing the gate of transistor 202 on so as to allow a substantially higher current flow through lamp 204 and transistor 202.
  • the combination of resistors 216, 219, 220, 228, and 234 and differential amplifier 230 serve to compare the voltage at node 206 with the voltage at node 218 and to provide at terminal 236 twice the difference.
  • Diodes 224 and 226 serve to clamp to voltages on nodes 218 and 222 to within approximately .8 volts of each other.
  • the voltage level appearing on node 236 serves as one input to the positive input terminal (node 236) of comparator 276.
  • a voltage divider network consisting of resistors 304, 294, 288, potentiometer 282 and resistor 290 serves to generate a reference voltage, which corresponds to a preselected resistance of lamp 204, that appears at the negative input terminal (node 272) of comparator 276. If the voltage of node 236 is less than that of node 272 then the output of comparator 276 (node 246) is a "0".
  • Node 319 is at a lower voltage level than node 296. Accordingly the lower voltage level of node 319 is coupled to node 308. After some voltage drop due to resistor 328, the voltage of node 308 is applied to the positive input terminal (node 332) of operational amplifier 330.
  • the combination of current sensing coil (transformer) 214 and resistors 340 and 336 serve to sense the amount of current flow through lamp 204 and transistor 202 and to generate a voltage at node 334 (the negative input terminal of operational amplifier 330) which corresponds to this current level.
  • Operational amplifier 330 compares the voltage levels applied to its input terminals (nodes 332 and 334) and to generate a bias level at the output terminal thereof (node 350) which causes a relatively weak bias to be applied to the gate (node 354) of transistor 202 if switch 322 is on (node 319 is coupled to node 308) or causes a relatively heavily bias to be applied to the gate (node 296 is coupled to node 308) if switch 306 is on. In either case the feedback loop containing sensing coil 214 and operational amplifier 330 attempts to control a relatively constant current flow through lamp 204 and transistor 202.
  • a negative voltage generator 648 which comprises inverters 650 and 654, a plurality of inverters 668, resistors 662 and 666, capacitors 658, 678, 688 and 690 and diodes 682 and 684.
  • Inverters 668 serve essentially as a driver which has the desired drive capability.
  • the combination of inverters 650 and 654, resistors 662 and 666 and capacitor 658 serves essentially as an oscillator. All the inverters are powered by connecting same between +Vbat and -Vbat of FIG. 9.
  • Capacitor 678 serves as an ac couple.
  • Diodes 682 and 684 serve as rectifiers with capacitors 688 and 690 serving as filters.
  • FIG. 11 there is shown a typical embodiment of operational amplifier 330 of FIG. 9.
  • the resistors shown are used to set the gain of amplifier 330 and are not shown in FIG. 9.
  • Switch 400 comprises an n-channel MOSFET 402, a two input comparator 438, a plurality of clocked two input NOR gates 464, inverters 450, 458, and 506, NAND gates 454, 494 and 496, p-n-p bipolar transistors 470, 472, 476 and 478, diodes 422 and 424, resistors 410, 414, 430, 431, 434, 436, 446 and 448, potentiometer 416 and two by-pass capacitors 502 and 504.
  • a positive terminal +Vbat 402 of a power supply is coupled to a first terminal of a lamp 404 (typically a head light of an automobile), to first terminals of resistors 410, 480, and 482, to the emitters of transistors 476 and 478 and to first terminals of capacitors 502 and 504.
  • a negative terminal -Vbat 405 of the power supply is coupled to the source of transistors 402 to first terminals of resistors 431, 436 and 448, to each of first input terminals of clocked NOR gates 464 and to second terminals of capacitors 502 and 504.
  • Clocked NOR gates 464 effectively act as clocked inverters.
  • a switch 468 typically a hand operated switch located in the cab of the automobile, has a first terminal coupled to a first input terminal of switch 400 and to a node 484, and has a second terminal 448 coupled to ground potential which is typically the same as -Vbat.
  • Transistor 402 controls current flow through lamp 404 such that when switch 486 is turned on (the position shown in FIG. 12), transistor 402 is weakly biased on by an essentially constant current supply to gate terminal 408 by a constant current source comprising transistors 470, 472, 476 and 478. As will be explained herein below, the resistance of lamp 404 is monitored as current flows there through. When the impedance level of lamp 404 reaches a preselected level, the weak essentially constant current biasing applied to gate terminal 408 is cut off and heavily (full on) biasing is applied by clocked (gated) NOR gates 464 to gate terminal 408. The control of current flow through transistor 402 and lamp 404 is very similar to the corresponding control of current flow through transistor 12 and load 32 of FIG.
  • an essentially constant current source which selectively weakly biases transistor 402 on and allows a continuing build up of current flow through transistor 402 and lamp 404 is substituted for the essentially constant generator current source of FIG. 3 which selectively biases the gate of transistor 12 so as to generate a relatively low level constant current flow through transistor 12 and load 32.
  • a relatively low level of current flow between the load (lamp) and current controlling transistor is used to first heat up the load (lamp) and to therefore cause the impedance (resistance) thereof to increase.
  • the biasing applied to the current controlling transistor is significantly increased such that the transistor is fully biased on.
  • a current spike is generated when the transistor is fully biased on.
  • the magnitude of the current spike is significantly lower than would be the case if the transistor where not first weakly turned on. This reduces cost since it allows for the area of the transistor to be significantly smaller than if the transistor had to safely carry a much higher current.
  • a second terminal of lamp 404 is coupled to the drain of transistor 402, to a first terminal of resistor 430 and to a node 406.
  • a second terminal of resistor 430 is coupled to a first terminal of resistor 434, to a second terminal of resistor 431 and to a node 432.
  • a second terminal of resistor 410 is coupled to a first terminal of resistor 414 and to a first terminal of potentiometer 416 and to a terminal 412.
  • a second terminal of resistor 414 is coupled to a second terminal of resistor 436, to a second terminal of potentiometer 416 and to a node 420.
  • a wiper member 418 of potentiometer 416 is coupled to the cathode of diode 422, to the anode of diode 424, to a first (positive) input terminal of comparator 438, to a first terminal of resistor 446 and to a node 426.
  • a second terminal of resistor 434 is coupled to the anode of diode 422, to the cathode of diode 424, to a second (negative) input terminal of comparator 438 and to a node 428.
  • An output terminal of comparator 438 is coupled to a first terminal of resistor 442, to an input terminal of a inverter 450 and to a node 440.
  • Second output terminals of resistors 442, 446 and 448 are coupled to node 444.
  • An output terminal of inverter 450 is coupled to a first input terminal of NAND gate 454 and to a node 452.
  • An output terminal of NAND gate 454 is coupled to an input terminal of inverter 458, to a first terminal of resistor 466 and to a node 456.
  • An output terminal of inverter 458 is coupled to control terminal of NOR gates 464 and to a node 460.
  • a second output terminal of resistor 466 is coupled to the bases of transistors 470 and 472, to the collector of transistor 470 and to a node 468.
  • the collector of transistor 472 is coupled to the output terminals of clocked NOR gates 464, to the gate of transistor 402 and to a node 408.
  • the emitter of transistor 472 is coupled to the collector of transistor 476, to the bases of transistors 476 and 478 and to a node 474.
  • the emitter of transistor 470 is coupled to the collector of transistor 478 and to a node 475.
  • a first input terminal of switch 400 is coupled to a second terminal of resistor 482, to a first input terminal of NAND gate 494, to a first terminal of switch 486 and to a node 484.
  • a second input terminal 492 of switch 400 is coupled to a second terminal of resistor 480 and to a first input terminal of NAND gate 496.
  • a second input terminal of gate 494 is coupled to an output terminal of gate 496 and to a node 500.
  • a second input terminal of gate 496 is coupled to an output terminal of gate 494, to a second input terminal of NAND gate 454, to an input terminal of inverter 506 and to a node 498.
  • An output terminal of inverter 506 is coupled to second input terminal of gates 464 and to a node 508.
  • NAND gates 494 and 496 are cross-coupled to form a flip-flop circuit. This helps limit bounce by switch 486. With switch 486 in the closed position, with the wiper arm contacting node 484, the output at node 498 is a "1". This "1" is coupled to an input terminal of inverter 506 and to one input terminal of NAND gate 454.
  • Inverter 506 inverts the "1" input signal and thus a "0" is applied to the second input terminals of gated NOR gates 464. Assume that a "1" signal exists at this time on node 460. Gates 464 are thus gated off and the outputs appear as a high impedance. Thus the gate 408 of transistor 402 is essentially isolated from gates 464 at this time. A “1” at node 460 corresponds to a "0" at node 456 since inverter 458 couples these two nodes. With a "0" at node 456, current flows from +Vbat through transistors 478 and 470.
  • the combination of resistors 410, 414, 436, 442, 446 and 448 and potentiometer 416 set up a reference voltage at node 426 (the positive input terminal of comparator 438) which corresponds to a preselected resistance level.
  • the combination of resistors 430, 431 and 434 sets up a voltage at node 428 (the negative input terminal of comparator 438) which corresponds to the resistance of lamp 404.
  • gates 464 are clocked on. As discussed earlier herein above, gates 464 essentially act as clocked inverters since all the second input terminals are coupled to -Vbat. Gates 464 invert the "0" input signal at each first input terminal (node 508) thereof and generate a "1" at node 408 (the gate of transistor 402). This heavily biases on transistor 402 which results in an initial current spike which then dissipates with increasing time to a steady state current flow through lamp 404 and transistor 402.
  • n-channel transistor used to control current through the lamp could be a p-channel transistor or an n-p-n or p-n-p bipolar transistor providing the correct polarity power supply and appropriate biasing is used.
  • other appropriated voltage and current sensing circuits could be used as could a variety of comparing circuits and amplifiers.
  • switches embodying the present invention can be used for example to control a motor with a viscous or inverted load or a solenoid.

Landscapes

  • Electronic Switches (AREA)
  • Circuit Arrangements For Discharge Lamps (AREA)
  • Dc-Dc Converters (AREA)
EP88302885A 1987-03-31 1988-03-30 Commutateur semi-conducteur à démarrage doux Withdrawn EP0285417A3 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
GB878707636A GB8707636D0 (en) 1987-03-31 1987-03-31 Switch
GB8707636 1987-03-31
US163534 1988-03-17
US07/163,534 US5015921A (en) 1988-03-17 1988-03-17 Soft start solid state switch

Publications (2)

Publication Number Publication Date
EP0285417A2 true EP0285417A2 (fr) 1988-10-05
EP0285417A3 EP0285417A3 (fr) 1989-03-01

Family

ID=26292081

Family Applications (1)

Application Number Title Priority Date Filing Date
EP88302885A Withdrawn EP0285417A3 (fr) 1987-03-31 1988-03-30 Commutateur semi-conducteur à démarrage doux

Country Status (3)

Country Link
EP (1) EP0285417A3 (fr)
JP (1) JPS63308409A (fr)
CA (1) CA1314070C (fr)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3839761A1 (de) * 1988-11-25 1990-05-31 Telefunken Electronic Gmbh Schaltung zur steuerung des betriebs einer gluehlampe
EP0432847A2 (fr) * 1989-12-15 1991-06-19 Koninklijke Philips Electronics N.V. Limiteur de courant à double niveau
GB2288890A (en) * 1993-10-26 1995-11-01 Brenda Elizabeth Olliver A lamp economising circuit for hazard warning devices
US6583974B1 (en) 1999-05-06 2003-06-24 Iws International Oy Control circuit for eliminating a voltage and current spike
WO2008098613A1 (fr) * 2007-02-13 2008-08-21 Osram Gesellschaft mit beschränkter Haftung Module del et procédé pour faire fonctionner au moins une del

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4390812A (en) * 1981-06-25 1983-06-28 Seidler Robert L Regulator and switching circuit for flasher units
WO1984000463A1 (fr) * 1982-07-06 1984-02-02 Stroede Aake Dispositif de protection pour ampoules electriques a incandescence

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4390812A (en) * 1981-06-25 1983-06-28 Seidler Robert L Regulator and switching circuit for flasher units
WO1984000463A1 (fr) * 1982-07-06 1984-02-02 Stroede Aake Dispositif de protection pour ampoules electriques a incandescence

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3839761A1 (de) * 1988-11-25 1990-05-31 Telefunken Electronic Gmbh Schaltung zur steuerung des betriebs einer gluehlampe
EP0432847A2 (fr) * 1989-12-15 1991-06-19 Koninklijke Philips Electronics N.V. Limiteur de courant à double niveau
EP0432847A3 (en) * 1989-12-15 1992-06-17 N.V. Philips' Gloeilampenfabrieken Bilevel current limiter
GB2288890A (en) * 1993-10-26 1995-11-01 Brenda Elizabeth Olliver A lamp economising circuit for hazard warning devices
US6583974B1 (en) 1999-05-06 2003-06-24 Iws International Oy Control circuit for eliminating a voltage and current spike
WO2008098613A1 (fr) * 2007-02-13 2008-08-21 Osram Gesellschaft mit beschränkter Haftung Module del et procédé pour faire fonctionner au moins une del
US8237382B2 (en) 2007-02-13 2012-08-07 Osram Ag LED module and method for operating at least one LED

Also Published As

Publication number Publication date
JPS63308409A (ja) 1988-12-15
EP0285417A3 (fr) 1989-03-01
CA1314070C (fr) 1993-03-02

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