EP0282202A3 - Preamble search and synchronizer circuit - Google Patents

Preamble search and synchronizer circuit Download PDF

Info

Publication number
EP0282202A3
EP0282202A3 EP88301571A EP88301571A EP0282202A3 EP 0282202 A3 EP0282202 A3 EP 0282202A3 EP 88301571 A EP88301571 A EP 88301571A EP 88301571 A EP88301571 A EP 88301571A EP 0282202 A3 EP0282202 A3 EP 0282202A3
Authority
EP
European Patent Office
Prior art keywords
clock signal
circuit
input signals
data input
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP88301571A
Other languages
German (de)
French (fr)
Other versions
EP0282202A2 (en
Inventor
Leslie Forth
Raymond S. Duley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of EP0282202A2 publication Critical patent/EP0282202A2/en
Publication of EP0282202A3 publication Critical patent/EP0282202A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/10—Arrangements for initial synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/042—Detectors therefor, e.g. correlators, state machines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/046—Speed or phase control by synchronisation signals using special codes as synchronising signal using a dotting sequence

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Small-Scale Networks (AREA)

Abstract

A preamble search and synchronizer circuit for detecting a preamble pattern within data input signals and synchronizing it with a clock signal associated with a StarLAN coded data transceiver includes a synchronizer start circuit (32), a counter circuit (34), and a pattern detector circuit (36). The synchronizer start circuit (32) is responsive to the complement of the data input signals and the clock signal for generating a start signal which is synchronized with the clock signal. The counter circuit (34) is responsive to the start signal and the complement of the clock signal for generating a gated clock signal. The pattern detector circuit (36) is responsive to the start signal, the data input signals and the gated clock signal for sampling of the data input signals and for generating a synchronized output signal upon detection of a predetermined data sequence indicative of the preamble pattern.
EP88301571A 1987-03-03 1988-02-24 Preamble search and synchronizer circuit Withdrawn EP0282202A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US21287 1987-03-03
US07/021,287 US4787095A (en) 1987-03-03 1987-03-03 Preamble search and synchronizer circuit

Publications (2)

Publication Number Publication Date
EP0282202A2 EP0282202A2 (en) 1988-09-14
EP0282202A3 true EP0282202A3 (en) 1990-04-25

Family

ID=21803372

Family Applications (1)

Application Number Title Priority Date Filing Date
EP88301571A Withdrawn EP0282202A3 (en) 1987-03-03 1988-02-24 Preamble search and synchronizer circuit

Country Status (3)

Country Link
US (1) US4787095A (en)
EP (1) EP0282202A3 (en)
JP (1) JPS63276934A (en)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2187066A (en) * 1987-02-20 1987-08-26 Plessey Co Plc Time division multiplexed signalling
GB8827733D0 (en) * 1988-11-28 1988-12-29 Storno As Radio transceiver
US5058141A (en) * 1990-03-01 1991-10-15 Ag Communication Systems Corporation Single circuit for detecting a frame synchronization pattern and generating control signals
EP0505657A1 (en) * 1991-03-27 1992-09-30 International Business Machines Corporation Preamble recognition and synchronization detection in partial-response systems
DE69230510T2 (en) * 1991-03-28 2000-09-14 Hughes Electronics Corp Bi-directional and programmable I / O driver
US5241568A (en) * 1991-12-02 1993-08-31 Motorola, Inc. Method and apparatus for synchronizing a receiver to a transmitted signal while conserving power
US5347548A (en) * 1992-06-19 1994-09-13 Motorola Inc. Circuit for simultaneous recovery of bit clock and frame synchronization
US5448571A (en) * 1994-04-26 1995-09-05 International Business Machines Corporation Method and apparatus for determining byte synchronization within a serial data receiver
US5526297A (en) * 1994-07-29 1996-06-11 Comsat Corporation Random unique word detection method and apparatus
US5570306A (en) * 1994-11-01 1996-10-29 Intel Corporation Method and apparatus for recognizing a bit pattern in a string of bits, altering the string of bits, and removing the alteration from the string of bits
US5727004A (en) * 1995-03-14 1998-03-10 Adaptive Networks, Inc. Method and apparatus for data encoding and communication over noisy media
GB2322265B (en) * 1995-03-16 1999-09-29 Texas Instruments Ltd Nibble packetiser architecture
US5812619A (en) * 1996-02-28 1998-09-22 Advanced Micro Devices, Inc. Digital phase lock loop and system for digital clock recovery
IL145548A0 (en) 1999-04-12 2002-06-30 Samsung Electronics Co Ltd Apparatus and method for gated transmission in a cdma communication system
US7006482B1 (en) * 1999-10-02 2006-02-28 Samsung Electronics Co., Ltd. Apparatus and method for gating data on a control channel in a CDMA communication system
US7542535B2 (en) * 2004-06-30 2009-06-02 Intel Corporation Method and apparatus for recovering a clock signal
DE102007008383A1 (en) * 2007-02-21 2008-08-28 Robert Bosch Gmbh Control device for personal protection and method for controlling means for personal protection
US9998276B2 (en) * 2016-09-27 2018-06-12 Nxp B.V. USBPD type-C BMC encoded receive message squelch detection

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3808367A (en) * 1971-10-25 1974-04-30 Martin Marietta Corp Method and circuit for timing signal derivation from received data
GB2069263A (en) * 1980-01-31 1981-08-19 Philips Nv Arrangement for synchronizing the phase of a local clock signal with an input signal
WO1982004515A1 (en) * 1981-06-16 1982-12-23 Beesley Graham Edgar Bit synchronization adjuster
EP0178622A2 (en) * 1984-10-15 1986-04-23 Nec Corporation Timing recovery circuit for Manchester coded data

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4541104A (en) * 1982-06-10 1985-09-10 Nec Corporation Framing circuit for digital system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3808367A (en) * 1971-10-25 1974-04-30 Martin Marietta Corp Method and circuit for timing signal derivation from received data
GB2069263A (en) * 1980-01-31 1981-08-19 Philips Nv Arrangement for synchronizing the phase of a local clock signal with an input signal
WO1982004515A1 (en) * 1981-06-16 1982-12-23 Beesley Graham Edgar Bit synchronization adjuster
EP0178622A2 (en) * 1984-10-15 1986-04-23 Nec Corporation Timing recovery circuit for Manchester coded data

Also Published As

Publication number Publication date
JPS63276934A (en) 1988-11-15
US4787095A (en) 1988-11-22
EP0282202A2 (en) 1988-09-14

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