EP0224582A1 - Appareil de calibrage pour circuits integres - Google Patents

Appareil de calibrage pour circuits integres

Info

Publication number
EP0224582A1
EP0224582A1 EP19860904232 EP86904232A EP0224582A1 EP 0224582 A1 EP0224582 A1 EP 0224582A1 EP 19860904232 EP19860904232 EP 19860904232 EP 86904232 A EP86904232 A EP 86904232A EP 0224582 A1 EP0224582 A1 EP 0224582A1
Authority
EP
European Patent Office
Prior art keywords
thin film
resistive layer
components
film components
termination
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19860904232
Other languages
German (de)
English (en)
Inventor
Ian Gregory Eddison
Brian Jeffrey Buck
John Sparrow
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Plessey Overseas Ltd
Original Assignee
Plessey Overseas Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Plessey Overseas Ltd filed Critical Plessey Overseas Ltd
Publication of EP0224582A1 publication Critical patent/EP0224582A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

Definitions

  • the present invention relates to calibration apparatus for the automated on-wafer testing of integrated circuits and in particular for the automated on-wafer testing of Gallium Arsenide (Ga As) integrated circuits.
  • Ga As Gallium Arsenide
  • Network analysis in a coaxial or waveguide medium is, conventially, achieved by using a wide range of calibration and verification components.
  • a variety of such components e.g. matched load, short circuit, open circuit etc.
  • error models for the measurement ports and thus remove the error terms from subsequent measurements.
  • This technique is known as 8 to 12 term error and is described in "Error Models " for Systems Measurements", Microwave Journal, May 1978 by J. Fitzpatrick.
  • no such components are available for variable geometry microwave probe measurements and furthermore, such components would not permit an automated calibration/test procedure to be achieved, resulting in higher production costs of the devices under test.
  • apparatus for calibrating an integrated circuit test system comprising a substrate having a substantially planar array of thin film components formed thereon, at least one of the components having contact pads arranged such that they can be engaged by a coplanar waveguide probe of the integrated circuit test system.
  • the substrate may comprise alumina and the thin film components may comprise a resistive layer haying an overlay of metallised conductors.
  • the resistive layer may comprise nichrome and the metallised conductors may comprise gold.
  • the resistive layer may be deposited to a thickness to provide a sheet resistance of 50.ilper square for the resistive layer.
  • low inductance ground connections for the components are provided by via holes containing conductive meterial, such as conductive epoxy or metal.
  • the thin film components 1 to 9 are formed on an alumina substrate, typically 1 inch square, with a thin resistive layer - NiCr for example - and plated gold conductors.
  • the resistive layer is deposited to a thickness which provides sheet resistance of 50 per square.
  • the components 1 to 9 comprise as follows:- (1) 50- ⁇ terminations for alignment check,
  • Offset short circuits low inductance short circuits displaced by a length of 50-i2-transmission line;
  • the components 1 to 9 achieve low inductance local grounding by the use of via holes which may be filled with conductive material, such as conductive epoxy or metal or a metal plating on the wall of the via holes.
  • conductive material such as conductive epoxy or metal or a metal plating on the wall of the via holes.
  • the components are arranged to have the same width as the IC to be tested to remove the need for adjustment of the measuring probes between calibration and measurement and to permit auto-stepped execution of the calibration procedure.
  • the particular example illustrated is designed for an IC having one input and two output RF ports, but other designs may be used for alternative input/output port combinations.
  • Calibration using such a substrate allows the use of error correction under computer control resulting in S-parameter measurements with reference planes at the •probe tips, i.e. the IC RF contact pads. This removes the need for sophisticated but error-prone de-embedding techniques and is particularly valuable in individual IC component element characterisation.

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Measurement Of Resistance Or Impedance (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Measuring Leads Or Probes (AREA)

Abstract

Appareil destiné à calibrer un système d'analyse de circuit intégré comprenant un substrat ayant un ensemble essentiellement plan de composants à film mince (1-9) formés sur ledit ensemble. Les composants sont munis de tampons de contact comprenant chacun un espacement qui permet à l'extrémité d'une sonde de guide d'ondes coplanaire du système d'analyse de s'engager dans lesdits composants. Ledit appareil permet de corriger des erreurs sous la commande d'un ordinateur, fournissant des mesures de paramètres de diffusion devant être effectuées avec des plans de référence situés aux extrémités de la sonde, évitant ainsi la nécessité d'avoir recours à des techniques sophistiquées d'extraction sujettes à erreurs.
EP19860904232 1985-06-13 1986-06-13 Appareil de calibrage pour circuits integres Withdrawn EP0224582A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB858515025A GB8515025D0 (en) 1985-06-13 1985-06-13 Calibration apparatus
GB8515025 1985-06-13

Publications (1)

Publication Number Publication Date
EP0224582A1 true EP0224582A1 (fr) 1987-06-10

Family

ID=10580709

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19860904232 Withdrawn EP0224582A1 (fr) 1985-06-13 1986-06-13 Appareil de calibrage pour circuits integres

Country Status (4)

Country Link
EP (1) EP0224582A1 (fr)
JP (1) JPS63500907A (fr)
GB (2) GB8515025D0 (fr)
WO (1) WO1986007493A1 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6445202B1 (en) 1999-06-30 2002-09-03 Cascade Microtech, Inc. Probe station thermal chuck with shielding for capacitive current
JP4183859B2 (ja) * 1999-09-02 2008-11-19 株式会社アドバンテスト 半導体基板試験装置
DE10056882C2 (de) * 2000-11-16 2003-06-05 Infineon Technologies Ag Verfahren zum Kalibrieren eines Testsystems für Halbleiterbauelemente und Testsubstrat
US7492172B2 (en) 2003-05-23 2009-02-17 Cascade Microtech, Inc. Chuck for holding a device under test
US7250626B2 (en) * 2003-10-22 2007-07-31 Cascade Microtech, Inc. Probe testing structure
CN103954927B (zh) * 2014-05-21 2016-03-23 常州天合光能有限公司 体积电阻与方块电阻转换校准装置及其校准方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4349792A (en) * 1978-07-14 1982-09-14 Kings Electronics Co., Inc. Pi pad attenuator
US4272739A (en) * 1979-10-18 1981-06-09 Morton Nesses High-precision electrical signal attenuator structures
DE3382183D1 (de) * 1982-12-23 1991-04-04 Sumitomo Electric Industries Monolithische integrierte mikrowellenschaltung und verfahren zum auswaehlen derselben.

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO8607493A1 *

Also Published As

Publication number Publication date
GB2184849A (en) 1987-07-01
GB8614398D0 (en) 1986-07-16
JPS63500907A (ja) 1988-03-31
WO1986007493A1 (fr) 1986-12-18
GB8515025D0 (en) 1985-07-17

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Inventor name: BUCK, BRIAN, JEFFREY

Inventor name: EDDISON, IAN, GREGORY