EP0165048A2 - Equipement de circuits pour voie ferrée - Google Patents

Equipement de circuits pour voie ferrée Download PDF

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Publication number
EP0165048A2
EP0165048A2 EP85304144A EP85304144A EP0165048A2 EP 0165048 A2 EP0165048 A2 EP 0165048A2 EP 85304144 A EP85304144 A EP 85304144A EP 85304144 A EP85304144 A EP 85304144A EP 0165048 A2 EP0165048 A2 EP 0165048A2
Authority
EP
European Patent Office
Prior art keywords
track
circuit
data word
signal
track circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP85304144A
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German (de)
English (en)
Other versions
EP0165048A3 (fr
Inventor
Peter John Cross
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Class 345 Trains Ltd
Original Assignee
ML Engineering Plymouth Ltd
ML Engineering Plymouth Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ML Engineering Plymouth Ltd, ML Engineering Plymouth Ltd filed Critical ML Engineering Plymouth Ltd
Publication of EP0165048A2 publication Critical patent/EP0165048A2/fr
Publication of EP0165048A3 publication Critical patent/EP0165048A3/fr
Withdrawn legal-status Critical Current

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B61—RAILWAYS
    • B61L—GUIDING RAILWAY TRAFFIC; ENSURING THE SAFETY OF RAILWAY TRAFFIC
    • B61L23/00—Control, warning or like safety means along the route or between vehicles or trains
    • B61L23/08—Control, warning or like safety means along the route or between vehicles or trains for controlling traffic in one direction only
    • B61L23/14—Control, warning or like safety means along the route or between vehicles or trains for controlling traffic in one direction only automatically operated
    • B61L23/16—Track circuits specially adapted for section blocking
    • B61L23/168—Track circuits specially adapted for section blocking using coded current
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B61—RAILWAYS
    • B61L—GUIDING RAILWAY TRAFFIC; ENSURING THE SAFETY OF RAILWAY TRAFFIC
    • B61L1/00—Devices along the route controlled by interaction with the vehicle or train
    • B61L1/18—Railway track circuits
    • B61L1/181—Details
    • B61L1/188—Use of coded current

Definitions

  • the present invention relates to railway track-circuit equipment for detecting the presence of a train in a predetermined section of track, and in particular, but not exclusively, to a traction-immune, jointless track circuit.
  • each track circuit TC1, TC2, TC3 includes a transmitter tuning unit 2 and a receiver tuning unit 3 both connected between the railway running rails 1.
  • the frequency f 1 of the signals passed through the rails between transmitter and receiver units 2 and 3 in track circuit TC2 is different from the signal frequency f 2 used by the two adjacent circuits TC1, TC3.
  • the design and arrangement of the juxtaposed tuning units 2, 3 of adjacent track circuits is such that at the two signal frequencies concerned, they cooperate to define tuned areas restricting to generally insignificant levels the signal energy passing from one track circuit to the other. As a result, it is possible to use the same signal frequency for alternate track circuits so that only two basic signal frequencies f and f 2 are required.
  • the running rails are used to provide a return path for a.c. or d.c. traction current
  • the traction current will contain many different frequencies (particularly where solid state switching is employed) track circuit immunity from traction current interference is generally provided, not by using a particular track circuit signal frequency selected not to conflict with traction current harmonics, but by frequency shift keying (FSK) the track circuit signal between two frequencies closely spaced either side of the centre signal frequency.
  • the track circuit signal might be frequency shift keyed between 1582 Hz and 1715Hz, that is, between + 17Hz about a centre frequency of 1699 Hz; the actual shift rate might typically be 5 Hz.
  • the two FSK frequencies should lie close to the track circuit centre frequency f, or f 2 in order to restrict signal energy to the narrow frequency band over which the track-circuit tuning units are effective. Modulation of the two basic track circuit signal frequencies f1, f 2 in this manner has in practice been found to provide adequate traction immunity.
  • crosstalk signal energy transfer
  • each track circuit being of the type comprising transmitter means arranged to output a track-circuit signal frequency-shift-keyed between two frequencies, and associated receiver means arranged to selectively receive signals at said two frequencies; said method involving:
  • FSK-encoding to transmit binary data in a railway environment is, of course, not itself new and, indeed, it has previously been proposed to implement track-to-train signalling by FSK-encoding data at 200 baud onto signals carried by the running rails.
  • FSK-encoded binary data words to label track circuit signals with a view to providing security against an erroneous indication of the "track clear" condition which might otherwise result from longitudinal or lateral crosstalk.
  • the afore-mentioned 200 baud FSK system would be entirely unsuitable for track circuit usage due to its excessive bandwidth.
  • track circuit equipment comprising a plurality of track circuits disposed in the same locality and each including:
  • each track circuit will respond only to the track circuit signals output by the associated transmitter means,so that if crosstalk (either longitudinal or lateral) were to result in an appropriate data word being detected by the receiver means of a track circuit, the associated signal processing means will fail to produce a "track clear" output signal.
  • the receiver means of the track circuit equipment is arranged to generate a "track occupied" signal when both track-circuit signal frequencies have been absent for at least a minimum period of, for example, 0.1. seconds.
  • the receiver means is also arranged to produce a "track occupied” signal when a successively decoded data word differs from said predetermined word expected to be received since, under these circumstances,an equipment failure has probably occurred (the track occupied condition being the "fail-safe" condition of the equipment).
  • the receiver means of a track circuit forming part of an embodiment of theinvention is preferably arranged to ignore any data word impressed on an incoming signal if, during receipt of the data word, both frequencies to which the receiver means is responsive are simultaneously present. This feature ensures that any ambiguity present at the receiver means due to both signal frequencies being simultaneously present (for example, due to crosstalk) does not result in erroneous generation of a "track clear" signal.
  • the presence or absence of a track-circuit signal frequency is, of course, judged on whether the received signal power is above or below a predetermined threshold.
  • each track circuit is identified by any one of a unique set of data words rather than just one data word, each data word in the set serving to identify not only the originating track-circuit, but also a particular command or status message to be transmitted in connection with said other railway signalling function.
  • any command or status message is successively represented to a train by a number of different data words as the train traverses a number of track circuits.
  • the dual function of each data word is best served by giving a two-part structure to each data word, one part being dedicated to track circuit identification and the other part to the other signalling function.
  • the FSK modulation rate must in practice be kept low to ensure the effectiveness of the track circuit tuned area terminations; furthermore, a narrow signal bandwidth enables the noise power within the track circuit equipment to be minimised.
  • a maximum modulation rate of 20Hz and preferably 12Hz is therefore envisaged.
  • each message advantageously comprises a start sequence (for example, a pseudo-random binary sequence) for security and synchronisation purposes, the relevant data word, and a parity portion enabling data-word error detection and correction;
  • the start sequence, data word, and parity portion are, for example, composed of fifteen, eleven, and six bits respectively.
  • Five of the parity bits are preferably associated with the eleven data bits in a [16, 111 hamming code, the remaining parity bit being used as a modulo-2 parity bit.
  • the data word may be divided into two or more bit-groups each having a particular significance.
  • one bit group might identify a track circuit according to its longitudinal position in a track while a second bit-group might be used to identify the particular track in which the track-circuit concerned is located.
  • a third bit-group could be used to carry a track-to-train signal where the data word is used to provide such a facility.
  • the data words used are advantageously selected such that superposition of two such words, with the predominance of one or other frequency, cannot result in the production of another selected data word.
  • the track-circuit signal is preferably arranged to change between its two signal frequencies at least, for example, every 0.2 s; if the receiver means detects the presence of a track-circuit signal that does not change frequency at least as often as every 0.2s then a "track occupied" signal is generated as an equipment failure has probably occurred.
  • this safety check it is necessary to avoid the use of certain binary data words containing strings of binary "1" or "0" that would result in the transmission of one frequency for greater than 0.2s. With a transmission rate of 24 baud, the foregoing requirement is equivalent to no more than four successive bits being the same.
  • the encoder and decoder are preferably each implemented by a cross-checking duplicated microprocessor configuration providing for failsafe operation.
  • the heterodyning and filtering can either be of standard analogue form or digital techniques can be used.
  • a railway signalling method in which rail-carried track-circuit signals are encoded both for the purpose of uniquely identifying each track-circuit transmitter to its corresponding receiver and for the purpose of transmitting a desired one of a predetermined repetoire of signal messages associated with an auxiliary signalling function, said method including the step of modulating the transmissions of each track-circuit transmitter in dependence on a selected one of a plurality of binary data words each unique to that transmitter, the identity of the selected data word within said plurality being dependent on the identity of the said signal message it is desired to transmit whereby each said signal message is uniquely represented by a set of data words each of which belongs to a different said plurality and is carried by the transmissions of a respective track-circuit transmitter.
  • a track-circuit receiver By encoding the track circuit signals in this manner, not only is it possible for a track-circuit receiver to ascertain whether transmissions received thereat originate from its associated transmitter, but it is also possible to transmit a desired auxiliary signal message such as, for example, a track-to-train message which can be uniquely identified by a train-bourne receiver regardless of the track circuit currently being traversed.
  • a desired auxiliary signal message such as, for example, a track-to-train message which can be uniquely identified by a train-bourne receiver regardless of the track circuit currently being traversed.
  • Each data word can be modulated onto the transmissions of the associated transmitter in accordance with any suitable modulation scheme such as, for example, a frequency shift keying scheme.
  • each data word is structured such that it includes a portion uniquely identifying each track circuit and a portion uniquely identifying each auxiliary signal message.
  • the track circuit equipment now to be described has the same general layout as the prior art equipment shown in Figure 1, that is, the equipment associated with each track circuit (for example track circuit TC2 in Figure 1) includes a transmitter tuning unit 2 and a receiver tuning unit 3 respectively arranged to feed to, and.pick up from the running rails 1 a track-circuit signal of predetermined centre frequency (for example, frequency fl).
  • a track-circuit signal of predetermined centre frequency for example, frequency fl
  • the equipment of the present invention icludes, in addition to the tuning units 2,3, a transmitter unit shown in its entirely in Figure 2 and a receiver unit shown in its entirety in Figure 4.
  • the transmitter unit comprises a failsafe duplicated microprocessor arrangement outputting a binary coded message on line 10 to a modulator 11 in order to control the frequency of an output signal output thereby on line 12.
  • the modulator 11 acts to frequency shift key (FSK) its output signal between an upper frequency f 1 + ⁇ f used to represent the binary "1" state of bits of the incoming message, and a lower frequency of f l - ⁇ f representing the binary "0" state.
  • the frequency f 1 is, for example, 1699 Hz with the value of the ⁇ f being 17Hz; (as already explained, the value of Af is kept small to minimise the signal energy outside the effective range of the tuned track-circuit terminations provided by cooperating units 2, 3 of adjacent track circuits).
  • the frequency-shift-keyed output signal produced by the modulator 11 on line 12 is fed via an output regulator 13 and power amplifier 14 to the track-circuit transformer unit 2 connected between the running rails 1.
  • the duplicated microprocessor arrangement used to produce the binary coded message fed to the modulator 11 on line 10 comprises two substantially-identical microprocessor systems each including a central processor unit 16, and I/O (input/output) port 17, a programme and fixed data storage unit in the form of a ROM (read only memory) 18, a non-volatile variable data store in the form of a non-volatile RAM (random access memory) 19 interfacing with the central processor unit 16 via the I/O port 17, and a working store provided by volatile RAM 20.
  • the central processor unit 16 of each microprocessor system interfaces with its associated I/O port 17, ROM 18, and RAM 20 via address buses 21 and data buses 22 while the non-volatile RAM 19 communicates with the I/0 port 17 via address and data buses indicated diagrammatically in Figure 2 by line 23.
  • each microprocessor system is advantageously all integrated on a single common chip as indicated by the dashed outlines in Figure 2.
  • Each microprocessor system is fed with:
  • the two microprocessor systems operate under substantially identical programmmes and serve to format the input local code and track-to-train code into a binary coded message the form of which will be described in detail hereinafter.
  • the failsafe shut down of the overall microprocessor arrangement is effected via redundancy management and power supply unit 32 which controls the power supply to the microprocessor systems and is operative to cut off this supply upon either system indicating a difference between the message output on line 10 and that internally produced by that system.
  • the two microprocessor systems also effect mutual cross checks of programmes and intermediate results via lines 33; again, should any discrepancy be detected the overall microprocessor arrangement is shut down via the redundancy management unit 32.
  • the duplicated microprocessor arrangement operates in accordance with known practice such as that elucidated by R.C. Short in a paper entitled “The Design of Fail-Safe Processor Systems” presented in January 1980 to the Institution of Railway Signal Engineers, London. For this reason, a more detailed description of the duplicated microprocessor arrangement of the transmitter unit will not be given herein.
  • the binary coded message comprises a start sequence 35, a data word portion 38 determined by the local identifying code and track-to-train code fed into the microprocessor systems, and a parity portion 39.
  • the number of bits in the data word portion 38 needs to be substantial.
  • the length of the data word is constrained by the need to complete message transmission within an overall time of less than the delay time (typically 1.5 second) within which standard track-circuit relay equipment would expect to receive an update if a "track clear" condition is to be maintained.
  • the need to provide the start sequence 35 and the parity portion 39 further reduces the possible duration of the data word 38.
  • Another limiting factor is the maximum allowable FSK modulation rate, this maximum being set by the need to restrict signal energy to within a narrow band width about the centre frequency fl and also the desirability of limiting noise power within the equipment.
  • an FSK modulation rate of 12 Hz is employed corresponding to a data rate of 24 baud.
  • an 11 bit data word 38 is used in the present embodiment together with a 6-bit parity portion 39 giving a duration for the data word and parity portions 38, 39 of 0.708 seconds.
  • the start sequence 35 is made up of fifteen bits whereby the total message duration is 1.33 seconds.
  • the start sequence 35 is a high-security start code which in the present example is a pseudo-random binary sequence (PRBS), such sequences having a high auto-correlation function.
  • PRBS pseudo-random binary sequence
  • the data word 38 is organised into three bit groups respectively of 4, 3, 4 bits and respectively representing a longitudinal track circuit number (that is, a track circuit number along the same track), a lateral track circuit number, and the required track-to-train signalling code.
  • the local identifying code set into the microprocessor systems determines the bit values in the longitudinal and lateral position of the track circuit concerned; the track-to-train code set in on line 98 determines the bit values in the track-to-train bit group.
  • the data word 38 may thus have any of a unique set of values, the common unique characteristic of which is determined by the first two bit-groups (the local identifying code) while the variation in value within the set being determined by the third bit-group (the track-to-train signalling group).
  • the parity portion 39 is organised with emphasis on error detection. To this end, the first five bits of the parity portion 39 together with the eleven data bits from a codeword of a (16,11) hamming code of weight three while the sixth parity bit is a modulo-2 parity bit for the data bits. This arrangement permits the correction of a single error and the detection of up to three errors.
  • the track-circuit signal is arranged to change frequencies (that is, between f 1 + ⁇ f and f 1 - ⁇ f) at least every 0.2s except during the parity portion of each message.
  • This requirement corresponds to having no more than four bits the same in succession which, in turn, may be interpreted as placing a transition limitation of no more than two bits to be the same at the beginning and end of the start sequence 35 and of each of the three bit-groups of the data word 38.
  • One suitable start sequence satisfying the above transition limitation is: This sequence is used for all track circuits.
  • a further limitation on the number of data words allowable is the requirement that neither the start sequence nor the data word itself must be repeated elsewhere within a message.
  • the number of data words found allowable after the application of this requirement will, of course, depend on how the parity bits of the (16, 11) hamming code are derived since unwanted repetition of the start sequence or data word may involve these parity bits.
  • the hamming code parity bits. are generated using a generator matrix G such that where C is the codeword constituted by the data bits and first five parity bits, D is the data-bit row vector and G is a (11 x 16) matrix. More particularly, G has the form: where I 11 is the identity matrix of order 11 and P is a (11 x 5) matrix with no row identically zero and all rows distinct. With P of the following form: four hundred and seven different data words are valid.
  • the receiver unit of the equipment is shown in Figure 4 and comprises a receiver section interfacing via analogue to digital converters 40 with a duplicated microprocessor arrangement of substantially the same configuration as that of the transmitter unit.
  • the receiver section of the receiver unit comprises an input transformer 41 arranged to receive the track-circuit signal picked up from the running rails of the track by the unit 3 of the track-circuit equipment.
  • the received signal which is of frequency f ⁇ ⁇ f is fed via preamplifier 42 to a mixer 43 where it is mixed with a signal of frequency (f 1 - f i ) derived from a local oscillator 44.
  • the local oscillator 44 is provided with frequency selection inputs 45 which are preset in dependence on the centre frequency of the track circuit transmitter unit (in the present case, frequency f 1 ).
  • the output of the mixer 43 is a signal of frequency f i ⁇ ⁇ f.
  • the intermediate frequency f i is 75 Hz.
  • the purpose of heterodyning down the track-circuit signal to the intermediate frequency f i is to facilitate the selective filtering of the two frequencies making up the track-circuit signals, much lower Q filters being required to selectively detect the two frequencies (f i + ⁇ f) and (f i - ⁇ f) than the frequencies (f 1 + ⁇ f ) and (f 1 - ⁇ f).
  • the output of the mixer 43 is fed to active filters 46 and 47 respectively tuned to the frequencies (f i + ⁇ f) and (f. - Af).
  • the output of the filters 46 and 47 are fed via respective envelope detectors 48 and 49 to respective ones of the two analogue to digital converters 40.
  • Each analogue to digital converter 40 provides a two bit representation of the signal level at its input, this representation being fed over two pairs of output lines 51, 50 to respective ones of the two microprocessor systems making up the duplicated microprocessor arrangement of the receiver unit.
  • Each microprocessor system is thus fed with signals indicative of the presence or absence of signal frequency components (f 1 + ⁇ f) and (f 1 - ⁇ f) on the track running rails.
  • the duplicated microprocessor arrangement of the receiving unit is of substantially the same form as that of the transmitter unit with each constituent microprocessor system comprising a central processor unit 52, an I/O port 53, ROM and R A M memories 54 and 55, and a non-volatile memory 56 interfacing with the CPU via the port 53.
  • the elements 52 to 55 are preferably integrated on a single chip.
  • Each microprocessor system is fed via the port 53 not only with the track-circuit signal strength information provided on lines 50 and 51 but also with the local code corresponding to that set in the associated transmitter unit, this local code being set in by means of switches or hard wired connections on input lines 57.
  • the output of the duplicated microprocessor arrangement is provided on a line 58 from the upper of the two micr p proce.ssor systems as viewed in Figure 4, this output being used to control a standard track-circuit relay (not shown).
  • the signal on the line 58 is also fed back to the two microprocessor systems in standard manner for such a duplicated microprocessor arrangement.
  • the fail-safe shut down of the microprocessor arrangement in the event of a disagreement being detected between the signals appearing on line 58 and that internally provided by each of the two microprocessor systems, is effected by a redundancy management and power supply unit 60 operating in standard manner. Shut down is similarly initiated if cross checking between the microprocessor systems,effected via lines 34, indicates a discrepancy either in intermediate results or programmes.
  • Each microprocessor system effects, under programme control, the following functions;
  • the value of S gives the exact digit in error by comparing the value of S with the rows of. HT. Double errors are detected but cannot be corrected.
  • the (16,11) hamming code will, by itself, sometimes incorrectly decode triple errors; however, by testing the modulo-2 parity bit, such triple-error conditions can be detected (but not corrected). Four or more errors may result in incorrect decoding.
  • the receiving unit will generate a "track clear" signal only when the identifying local code of the associated transmitter unit is correctly received as non-overlapping bursts of the two track-circuit frequencies concerned.
  • the two track-circuit signal frequencies will be present together or, as may be the case where the transmitter unit associated with the receiver unit has failed, the received identifying code will not correspond to that set in via the lines 57; in either case, a "track clear" signal will not be generated.
  • track-to-train codes embedded in the track circuit signal these are arranged to be decoded by train borne equipment similar to that of the track-circuit receiving unit (the track-circuit signal being inductively coupled to train borne pick up coils).
  • this bit group could be used for an alternative railway signalling function such as the transmission of status information between the transmitter and receiver of a track circuit (in this case, in addition to a relay output 58, each track-circuit receiver could be provided with a code output indicated by dashed lines 99 in Figure 4).

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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Automation & Control Theory (AREA)
  • Train Traffic Observation, Control, And Security (AREA)
EP85304144A 1984-06-13 1985-06-12 Equipement de circuits pour voie ferrée Withdrawn EP0165048A3 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB848415025A GB8415025D0 (en) 1984-06-13 1984-06-13 Railway track circuit equipment
GB8415025 1984-06-13

Publications (2)

Publication Number Publication Date
EP0165048A2 true EP0165048A2 (fr) 1985-12-18
EP0165048A3 EP0165048A3 (fr) 1988-11-09

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Application Number Title Priority Date Filing Date
EP85304144A Withdrawn EP0165048A3 (fr) 1984-06-13 1985-06-12 Equipement de circuits pour voie ferrée

Country Status (5)

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EP (1) EP0165048A3 (fr)
AU (1) AU4362185A (fr)
DE (1) DE165048T1 (fr)
GB (1) GB8415025D0 (fr)
ZA (1) ZA854411B (fr)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0878373A2 (fr) * 1997-05-15 1998-11-18 Hitachi, Ltd. Système et méthode de détection de trains
EP1314627A2 (fr) * 2001-11-21 2003-05-28 Westinghouse Brake And Signal Holdings Limited Circuits de voie de chemin de fer
US8297558B2 (en) 2010-03-17 2012-10-30 Safetran Systems Corporation Crossing predictor with authorized track speed input
US8500071B2 (en) 2009-10-27 2013-08-06 Invensys Rail Corporation Method and apparatus for bi-directional downstream adjacent crossing signaling
US8590844B2 (en) 2009-07-17 2013-11-26 Siemens Rail Auotmation Corporation Track circuit communications
US8660215B2 (en) 2010-03-16 2014-02-25 Siemens Rail Automation Corporation Decoding algorithm for frequency shift key communications
WO2015011529A1 (fr) * 2013-07-26 2015-01-29 Alstom Transport Technologies Dispositif de vérification d'intégrité de joint mécanique de circuit de voie
WO2015019129A1 (fr) * 2013-08-09 2015-02-12 Alstom Transport Technologies Moyen de surveillance d'état d'alimentation électrique de circuit de voie
CN114802368A (zh) * 2022-04-14 2022-07-29 通号城市轨道交通技术有限公司 联锁系统的设备控制方法、系统、装置、设备和存储介质

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US3526278A (en) * 1968-04-16 1970-09-01 Byron Jackson Inc High volume main valve for formation testers
US3666217A (en) * 1970-05-04 1972-05-30 Gen Signal Corp Track communication system for continuous rail
US3829682A (en) * 1971-01-11 1974-08-13 Erico Prod Inc Pulse coded railway signal system
GB2159311A (en) * 1984-05-24 1985-11-27 Westinghouse Brake & Signal Vehicle protection system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3526278A (en) * 1968-04-16 1970-09-01 Byron Jackson Inc High volume main valve for formation testers
US3666217A (en) * 1970-05-04 1972-05-30 Gen Signal Corp Track communication system for continuous rail
US3829682A (en) * 1971-01-11 1974-08-13 Erico Prod Inc Pulse coded railway signal system
GB2159311A (en) * 1984-05-24 1985-11-27 Westinghouse Brake & Signal Vehicle protection system

Cited By (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7027901B2 (en) 1997-05-15 2006-04-11 Hitachi, Ltd. Transmitter and receiver device for train detection
US6317664B2 (en) 1997-05-15 2001-11-13 Hitachi, Ltd. Train detection system and a train detection method
US7200470B2 (en) 1997-05-15 2007-04-03 Hitachi, Ltd. Train detection system and a train detection method
EP0878373A2 (fr) * 1997-05-15 1998-11-18 Hitachi, Ltd. Système et méthode de détection de trains
US6470244B2 (en) 1997-05-15 2002-10-22 Hitachi, Ltd. Train detection system
EP0878373A3 (fr) * 1997-05-15 2000-08-02 Hitachi, Ltd. Système et méthode de détection de trains
US6604031B2 (en) 1997-05-15 2003-08-05 Hitachi, Ltd. Train detection system and a train detection method
US6829526B2 (en) 1997-05-15 2004-12-07 Hitachi, Ltd. Train detection system and a train detection method cross reference to related application
EP1535818A2 (fr) * 1997-05-15 2005-06-01 Hitachi, Ltd. Emetteur/récepteur pour détection de trains
EP1535818A3 (fr) * 1997-05-15 2005-11-16 Hitachi, Ltd. Emetteur/récepteur pour détection de trains
EP1314627A3 (fr) * 2001-11-21 2003-06-04 Westinghouse Brake And Signal Holdings Limited Circuits de voie de chemin de fer
EP1314627A2 (fr) * 2001-11-21 2003-05-28 Westinghouse Brake And Signal Holdings Limited Circuits de voie de chemin de fer
US7017864B2 (en) 2001-11-21 2006-03-28 Westinghouse Brake And Signal Holdings Limited Railway track circuits
SG112855A1 (en) * 2001-11-21 2005-07-28 Westinghouse Brake & Signal Railway track circuits
US8590844B2 (en) 2009-07-17 2013-11-26 Siemens Rail Auotmation Corporation Track circuit communications
US9248849B2 (en) 2009-10-27 2016-02-02 Siemens Industry, Inc. Apparatus for bi-directional downstream adjacent crossing signaling
US8500071B2 (en) 2009-10-27 2013-08-06 Invensys Rail Corporation Method and apparatus for bi-directional downstream adjacent crossing signaling
US8660215B2 (en) 2010-03-16 2014-02-25 Siemens Rail Automation Corporation Decoding algorithm for frequency shift key communications
US8297558B2 (en) 2010-03-17 2012-10-30 Safetran Systems Corporation Crossing predictor with authorized track speed input
WO2015011529A1 (fr) * 2013-07-26 2015-01-29 Alstom Transport Technologies Dispositif de vérification d'intégrité de joint mécanique de circuit de voie
US10093329B2 (en) 2013-07-26 2018-10-09 Alstom Transport Technologies Track circuit mechanical joint integrity checker
WO2015019129A1 (fr) * 2013-08-09 2015-02-12 Alstom Transport Technologies Moyen de surveillance d'état d'alimentation électrique de circuit de voie
US9821823B2 (en) 2013-08-09 2017-11-21 Alstom Transport Technologies Track circuit power supply vital monitor
AU2013397474B2 (en) * 2013-08-09 2019-08-29 Alstom Transport Technologies Track circuit power supply vital monitor
CN114802368B (zh) * 2022-04-14 2023-09-26 通号城市轨道交通技术有限公司 联锁系统的设备控制方法、系统、装置、设备和存储介质
CN114802368A (zh) * 2022-04-14 2022-07-29 通号城市轨道交通技术有限公司 联锁系统的设备控制方法、系统、装置、设备和存储介质

Also Published As

Publication number Publication date
DE165048T1 (de) 1986-05-22
EP0165048A3 (fr) 1988-11-09
AU4362185A (en) 1985-12-19
GB8415025D0 (en) 1984-07-18
ZA854411B (en) 1986-03-26

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