Classifications

• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
  • G11B20/10—Digital recording or reproducing
  • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
  • G11B20/1883—Methods for assignment of alternate areas for defective areas
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
  • G11B20/10—Digital recording or reproducing
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
  • G11B20/10—Digital recording or reproducing
  • G11B20/12—Formatting, e.g. arrangement of data block or words on the record carriers
  • G11B20/1217—Formatting, e.g. arrangement of data block or words on the record carriers on discs
  • G11B20/1252—Formatting, e.g. arrangement of data block or words on the record carriers on discs for discontinuous data, e.g. digital information signals, computer programme data
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
  • G11B20/10—Digital recording or reproducing
  • G11B20/14—Digital recording or reproducing using self-clocking codes
  • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
  • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
  • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
  • G11B20/10—Digital recording or reproducing
  • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
  • G11B20/1806—Pulse code modulation systems for audio signals
  • G11B20/1809—Pulse code modulation systems for audio signals by interleaving
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
  • G11B20/10—Digital recording or reproducing
  • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
  • G11B20/1879—Direct read-after-write methods
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
  • G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel
  • G11B27/19—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier
  • G11B27/28—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
  • G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel
  • G11B27/19—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier
  • G11B27/28—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording
  • G11B27/32—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on separate auxiliary tracks of the same or an auxiliary record carrier
  • G11B27/327—Table of contents
  • G11B27/329—Table of contents on a disc [VTOC]
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
  • G11B7/004—Recording, reproducing or erasing methods; Read, write or erase circuits therefor
  • G11B7/0045—Recording
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
  • G11B7/007—Arrangement of the information on the record carrier, e.g. form of tracks, actual track shape, e.g. wobbled, or cross-section, e.g. v-shaped; Sequential information structures, e.g. sectoring or header formats within a track
  • G11B7/013—Arrangement of the information on the record carrier, e.g. form of tracks, actual track shape, e.g. wobbled, or cross-section, e.g. v-shaped; Sequential information structures, e.g. sectoring or header formats within a track for discrete information, i.e. where each information unit is stored in a distinct discrete location, e.g. digital information formats within a data block or sector
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B2220/00—Record carriers by type
  • G11B2220/20—Disc-shaped record carriers
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B2220/00—Record carriers by type
  • G11B2220/20—Disc-shaped record carriers
  • G11B2220/21—Disc-shaped record carriers characterised in that the disc is of read-only, rewritable, or recordable type
  • G11B2220/215—Recordable discs
  • G11B2220/218—Write-once discs

Definitions

• This invention relates to optical data storage systems, and more particularly to a means for minimizing write errors in such an optical system.
• the first trend has been the expansion of technological sophistication, as exemplified by the microcomputer chip. That is, computing power, which once required roomsful of equipment and kilowatts of electrical power to operate, can now be found in very small silicon chips.
• the second trend has been the cost of purchasing such computing power. Particularly in the area of memory—as costs have dropped and capacities have increased—there has been an inevitable rush to take advantage of the new-found memory space and fill it with information. In this respect, the demand for more memory and storage space has always seemed to outstretch the available supply of such memory space.
• Optical technology that is, the technology of using a laser beam to burn or otherwise mark very small holes on a suitable medium in a pattern representative of the data to be stored, which pattern can subsequently be read by monitoring a laser beam directed through or reflected off of the previously recorded marks—has been available in laboratories for some t me.
• laboratory technology has not provided a cost effective alternative for use in data storage products. This is because the optical components have tended to occupy entire rooms and the power associated with operating the laser and associated components has been enormous. Further, .such laboratory systems are not easily interfaced with existing high performance computer systems. That is, the techniques used to format and input the data have been totally incompatible with more conventional formatting and data processing techniques used in the magnetic-based storage systems.
• the few optical storage systems that have been commercially introduced in the last few years have primarily related to the storing of video signals (image storing devices) as opposed to the storing of digital information. Further, the few digital optical storage devices that do exist do not represent a viable alternative or supplement to the existing peripheral magnetic-based storage devices for the user of large data bases of information.
• bit error rate a parameter indicating the number of good bits of digital data that can be obtained for every bad bit of data that occurs.
• bit error rate 100,000 (10E+5) indicates that 100,000 bits of data can be read or played back before a bad or incorrect bit of data will be encountered.
• bit error rates in excess of 10E+12 are generally required.
• ECC Error Correction codes
• Errors can principally originate from one of three sources: (1) in the write channel (i.e., the data is written incorrectly); (2) in the read channel (i.e., the data is read incorrectly); or (3) in the storage medium (i.e., even though the data is initially written correctly, the storage medium may change with time so as to alter the data to make it incorrect).
• sources of error most known ECC schemes for use ' with peripheral data storage systems are directed only to correcting errors that occur in the read channel.
• Sources of error introduced by aging media, item (3) above are minimized in magnetic-based storage devices by merely re-writing the data after a prescribed period of time. (This technique is commonly referred to as "refreshing.") That is, the old data is read, stored in a buffer memory, the media is erased, and new data is then written on the media in place of the old data.
• CMPI erasable media is used.
• Optical media is generally not considered erasable because of the manner in which the marks are placed on the media by the laser beam. That is, once a hole or pit or other mark is burned or ablated on the media by the laser beam, it is difficult to remove that hole or pit or mark. However, over time, the media may "flow" or other changes may occur thereto so that the hole, pit, or other mark is somehow altered to the degree that light reflected therefrom might be incorrectly sensed.
• a further challenge facing the user of large information systems is the manner in which the data stored is accessed. Certain types of data need only be accessed occasionally, and therefore the access time thereto is not critical. Other types of data are constantly on demand, and therefore must be accessed .very rapidly if the system is to operate efficiently. Data bases that are only accessed sequentially or that only need to be accessed occasionally have been traditionally stored on magnetic tape. Data bases that must be accessed quickly, and usually in a random fashion, are stored on magnetic disks. (Access times are significantly faster with magnetic disks because the read/write head of the disk can radially move with respect to any area of the disk and quickly locate a data set within one or two revolutions of the disk.)
• optical storage system that not only meets the data capacity and density needs of the exploding data processing industry, but that is also compatible with existing and future high performance CPU systems.
• optical storage system will supplement
• a further object of the invention is to provide an optical storage system that provides up to four gigabytes of user data to be permanently stored .on a single disk for at least 10 years.
• Another object of the present invention is to provide such an optical storage system wherein error detection ' and correction circuitry are used to ensure an acceptable bit error rate.
• Still a further object of the present invention is to provide an optical storage system wherein data access times are comparable with existing high speed magnetic disk storage devices, thereby allowing the optical storage system to be efficiently used with existing (as well as future) high performance CPU systems.
• an optical storage system that includes a platter or media upon which the data is written, and a drive into which the platter is inserted when it is desired " to read or write data.
• a storage controller that provides the necessary interface between a
• O P ⁇ host CPU and the optical disk drive advantageously allows other (existing) types of peripheral storage devices to be used with the CPU along with the optical storage system.
• the host CPU initiates the request to read or write data to the optical drive.
• the media or "platter" upon which the data is stored is physically housed in a cartridge when the platter is not mounted within the drive.
• the entire cartridge is inserted into the drive by the user when it is desired to read or write data therefrom or thereto.
• the drive automatically removes the platter from the cartridge and mounts it for rotation on a suitable spindle mechanism.
• the cartridge advantageously protects the platter when not in use and allows for the easy storage thereof.
• a suitable platter identification number is optically written onto the platter, as well as onto the cartridge by other visible means.
• the data format on the platter includes bands, tracks, blocks, and sectors.
• the platter surface is divided into a prescribed number of concentric areas that are referred to as "bands.”
• Each band contains a prescribed number of concentric data tracks therewithin upon which data may be written.
• Data is organized on each track in fixed length logical units referred to as "blocks.”
• short blocks e.g., 128 user bytes
• long blocks e.g., 7904 user bytes
• a byte is a set number of data bits, typically 8.
• Each track is physically divided into a fixed number of equal length segments referred to as "sectors".
• the sector is the smallest unit of encoded information, and its boundaries are predefined by sector marks placed on the platter.
• User data is encoded and written to specified types of sectors when stored on the platter. Other types of sectors are used to identify media defects and incompletely written user data.
• the optical drive includes means for automatically removing the platter from the cartridge and mounting the platter on a suitable spindle for rotation.
• Several servo systems provide the means for locating a specific area on the surface of the platter and for directing the appropriate read or write laser beams thereto.
• the servo systems include a coarse and fine seek system whereby a given area of the platter will be reached quickly using the coarse seek function, such as locating a desired band, and thereafter the fine seek function can be used to locate a specific data track therein.
• Other servo systems provide the function of tracking a given data track, automatic focusing of the read and write laser beams, and spin control of the spin motor.
• a laser/optical unit includes three laser sources: a write laser which generates a beam that marks the platter surface; a read laser which generates a lower powered beam that reflects off the surface of the platter to detect marks recorded during a write operation and for subsequent read operations; and a coarse seek laser which senses carriage position error. (The carriage moves in and out radially with respect to the platter as controlled by the coarse servo system in order to locate a desired band on the surface of the platter.)
• the laser/optical unit also includes the mirrors, lenses, prisms, and other optical components that are needed for generating and directing the write and read laser beams to and from the desired locations.
• a read/write channel is also included within the optical drive.
• the channel modulates and controls the write laser beam in response to data signals received from the host CPU through the storage director.
• the read/write channel also amplifies, filters, and converts to digital form, the information received from the read laser beam reflections.
• a clock signal is also extracted from the read data.
• Appropriate error detection and correction circuitry is also included within the optical drive.
• the storage controller used to communicate with the optical drive to and from the host CPU may be any conventional controller for use with existing peripheral disk storage products, modified with appropriate software or code. No hardware changes are required.
• the optical storage drive employs Dynamic Defect Skipping (DDS) to eliminate data errors that occur during a write operation.
• DDS Dynamic Defect Skipping
• a data error occurs while writing to the optical platter, it is immediately detected by using a read back check beam, and the data in the error is then rewritten. Consequently, all data written to the platter is correct.
• Appropriate tags or flags are used to identify incorrectly written data so that such data is subsequently ignored during a read operation.
• three of the data bands on each platter are set aside for housekeeping and maintenance functions.
• One band is reserved as an index band in order to keep track of where various logical records are stored.
• Another band is a table of contents and keeps a history of the records stored and their respective status on that particular platter.
• the third band is used for maintenance and test purposes and provides some reference signals, pre-written on the platter, which can be used during various maintenance operations of the drive.
• the particular platter format and data organization scheme used with the present invention coupled with the protective cartridge in which the removable platter is housed, and the dynamic defect skipping and other error detecting and correcting features included within the optical disk drive, all combine to provide a
• FIG. 1 is a block diagram illustrating how a plurality of optical drive systems may be coupled to a host CPU through a suitable control unit;
• FIG. 2 is a perspective view of an optical drive system in accordance with the present invention, and shows how the platter cartridge is removably inserted thereinto;
• FIG. 3 is a mechanical schematic diagram illustrating how the platter is removed from the cartridge and mounted on a spindle of the optical drive system
• FIG. 4 is a block diagram of the optical drive system, and illustrates the principal elements used to read/write data from/to the platter;
• FIG. 5 is a simplified schematic depiction of the read/write process realized within the optical drive system
• FIGS. 6a and 6b are representations of the data format and track organization, respectively, used on a platter in accordance with one embodiment of the present invention
• FIG. 7 is a diagram of the format used within a long block of data
• FIG. 8 is a bit diagram illustrating the generation of the sync bytes of FIG. 7;
• FIG. 9 is a block diagram of the control electronics of FIG. 4.
• FIG. TO is a block diagram of the data buffer (DBUF) of FIG. 9;
• FIG. 11 is a block diagram illustrating the principle elements associated with the data path of the control electronics of FIG. 4;
• FIG. 12 is a block diagram illustrating the principal elements used to realize the dynamic defect skipping function
• FIG. 13 is a block diagram of the read DDS buffer of FIG. 12.
• FIG. 14 is a block diagram of the BS/EM/prea ble decoder of FIG. 12.
• FIG. 15 is a block diagram of the sync byte generator and related circuitry used to generate and detect the sync byte in FIG. 8.
• an optical drive system 20 is adapted to be coupled to a host central processing unit (CPU) 22 via a storage control unit 24.
• the storage control unit 24 includes at least two storage directors. .A first storage director 26 directs data to and from a plurality of magnetic drive systems 28. A second storage director 30 directs data to and from the optical drive systems 20.
• both magnetic and optical storage devices may be coupled to the same host CPU 22 through the same storage control unit 24.
• neither the host CPU 22 nor the storage control unit 24 need have hardware modifications made thereto in order to properly interact with the optical drive system 20.
• a suitable interface program (software) will generally need to reside within the CPU in order to pass data to and from storage director 30.
• appropriate software or firmware control within the storage control unit 24 will generally be used within the storage director 30 in order to provide the proper interface signals with the optical drive system 20.
• conventional CPU's and storage control units may be employed with the optical drive system 20 of the present invention. The implementation details associated with the resident CPU software and the control unit software or firmware are not critical to the present invention.
• the storage control unit 24 may be an 8880 controller, manufactured by Storage Technology Corporation of Louisville, Colorado. Such a control unit optionally provides either two or four storage directors. Therefore, a large number of disk storage peripherial devices, either optical or magnetic, can be coupled therethrough to a host CPU 22.
• a cartridge 32 having the media therein upon which the data is optically stored, is adapted to be inserted into an opening or slot 34 along the front face of the drive system 20.
• Operator controls and indicators 36 are also conveniently located along the front of the unit 20.
• OMPI 3 The cartridge 32 is pushed forward as indicated by the arrow 38 by the user. Once into the unit 20, at a position 40, the cartridge 32 is opened allowing a tray 42 holding the media or platter 44 to be ..lid out therefrom in the direction of the arrow 39. Once opened in this fashion, an elevator mechanism, schematically illustrated in FIG. 3 as a plunger 46, lifts the platter 44 away from the tray 42 in the direction indicated by the arrows 47. The platter 44 is then automatically centered and mounted on a spindle mechanism 48. An actuator 50 radially positions a read/write optical head 52 with respect to the mounted platter 44, thereby allowing access to a selected area on the surface thereof.
• an elevator mechanism schematically illustrated in FIG. 3 as a plunger 46
• FIG. 4 a block diagram of the principle elements of the optical drive system 20 is shown.
• the platter 44 is mounted and centered on the spindle mechanism 48.
• a suitable spin motor 50 rotates the spindle 48, and hence the platter 44, at the desired rotational speed.
• Signals received from or sent to the storage director 30 (FIG. 1) pass through a control electronics section 52.
• the control electronics 52 as its name implies, provides the control necessary for communication with the storage control unit 24, including the interpretation of all commands received from the control unit 24.
• the control electronics 52 also, provide the necessary signals for controlling all of the hardware operations associated with the optical drive system 20.
• a read/write channel 54 modulates a write laser diode in response to data signals received from the control electronics 52.
• the resulting modulated laser beam is directed through a laser/optics section 56 to the surface of the platter 34.
• Servo control for the spin motor 50 and the moving elements associated with the laser/optics 56 is provided by a servo system 58.
• the servo system 58 actually includes several servo systems, as will be apparent from the description that follows.
• a power/power control assembly 60 provides the AC/DC power required for the operation of the optical drive system 20. Primary power is secured from a suitable 50 or 60 Hz 3 phase power source.
• FIG. 5 a schematic representation of the read/write operation associated with the optical storage 20 is depicted.
• the platter 44 mounted and centered on the spindle mechanism 48, is spun by a spin motor 50.
• a write laser diode 60 is modulated by an input signal 62, which input signal represents the encoded binary digital data that is to be stored on the platter 44.
• a modulated laser beam 64 emitted from the write laser diode 60, is directed through a beam combiner 66, and is reflected from a suitable mirror or mirrors 68, through an objective lens 70 to a very small point 72 on the surface of the platter 44.
• the modulated write beam is likewise a two level signal, having two power states associated therewith (typically "on” and “off", although any high and Tow power states will suffice).
• the write laser beam 64 has sufficient power associated with its on or high power state to permanently mark the surface of the media 44 at the point 72. Because the platter 44 is spinning or rotating, a track of data 74 is thereby formed on the surface of the media or platter 44.
• access to a desired track on the surface of the platter 44 is achieved by radially positioning the mirror 68 with respect to the platter 44 so as to provide coarse access to a desired band (several tracks) on the surface of the platter 44.
• the mirror 68 is then controllably tilted about a desired access point in order to direct the laser beam to a desired track within the accessed band.
• a read laser beam 75 is generated from a suitable laser source 76.
• This beam 75 reflects off a mirror 78, passes through a beam splitter 80, reflects off the beam combiner 66, and reflects off the mirror 68 so as to pass through the objective lens 70 to the desired point 72 on the desired data track 74.
• This beam reflects off of the surface of the platter 44 and follows the same path back through the objective lens 70, the mirror 68, and the beam combiner 66 to the beam splitter 80.
• this reflected read beam 79 is directed to a suitable detector 82.
• the detector 82 generates an output signal 84 in response to the intensity of the reflected read signal 79, which reflected signal will vary in intensity according to the marks that have been placed on the media or platter 44 by the modulated write beam 64.
• the binary input signal 62 stored as optically detectable marks on the surface of the platter 44 by the modulated write beam, may be subsequently retrieved therefrom.
• accelerated life tests indicate that data stored on the media or platter 44 will remain written thereon for as long as 10 years.
• FIG.6a a schematic representation of the format of the platter 44 is shown.
• the surface of the platter 44 is divided into a desired number of concentric bands, each band having a desired number of data tracks located therein.
• up to 716 bands are included on each platter 44.
• Each band as shown in the enlarged portion of FIG. 6a includes a desired number of data tracks.
• the other 48 tracks are used to store desired data.
• the bands are physically separated by coarse servo tracks 86. These coarse servo tracks are used in conjunction with the servo system in order to position the optical read/write head 52 (FIG.
• a first data band 88 is set aside as a FieTd Engineering (FE) band.
• the FE band 88 contains data selectively placed in the tracks thereof during the manufacture of the platter 44. (That is, much of the data in the FE band is prewritten on the platter 44, including the servo tracks 86 and the home address track, during the manufacture of the platter.)
• the purpose of the data in the FE band is to allow the field engineer to test the reading functions of the optical drive system with data that is known to have been written correctly without having to demount the platter 44 currently on the drive being tested. Being able to test the read and other functions without demounting of the platter is useful in order to identify problems caused by decentering.
• a second band 90 designated as the Index Band.
• the Index Band is reserved for the index of the information stored on the platter 44.
• the index contains up to two entries for each band on the platter.
• the Index Band entries are written with "short” bTocks of data. (The distinction between "short” and “long” blocks is discussed below.) Indexing data written in the Index Band provides a quick and efficient method for determining what data has been written on the platter 44.
• a third band 92 on the platter 44 is- reserved as the Platter Table Of Contents (PTOC).
• the PTOC band 92 contains data which describes the state of the platter.
• the entries in the PTOC band 92 are generally written with long blocks.
• a logical data block is a byte sequence whose length is either 136 bytes (a short block) or 7912 bytes (a long block). Short bTocks are used primarily for the Index
• OMPI Band 90 Long blocks are used for reading and writing user data, and are also used in the FE band 98 and the PTOC band 92.
• the maximum number of short blocks for a track is 222, and the maximum number of long blocks per track ' is 15. As will be explained hereinafter, the actual number of tracks may vary due to the number of defects encountered on the platter surface. Eight of the bytes contained within a short or long block are reserved as identification bytes. The remaining bytes are available for user data. Thus, there are 7904 user bytes in a long block, as indicated in FIG. 6b.
• Each track is physicall divided into a fixed number of equal length segments referred to as "sectors.”
• the sector is the smallest unit of encoded- information.
• User data is encoded and defined into various types of sectors in order to be written to the platter 44. Other types of sectors, as explained below, are used to identify media or platter defects * and incompletely written user data.
• a read back check is employed in order to verify that the data has been correctly written. If a data error is detected, the sector is rewritten in such a way that during a normal read operation, the bad sector (the one containing the incorrect data) can be identified and ignored.
• an additional sequence of sectors are thus appended to every logical data block prior to having it written on the platter. These additional sequence of sectors may be thought of as subsystem overhead sectors.
• the combination of the logical data block (the user data) and the subsystem overhead sectors is referred to as a physical data block.
• the total number of sectors which comprise a physical data block may vary due to the number of media defects encountered while writing the block of data to the platter.
• the physical data blocks recorded on a given track have a format as depicted in FIG. 7. This format may be described as a sequence of sectors in the following order:
• Pre/Resync Sector One preamble/Resynchronizable Data Sector (Pre/Resync Sector).
• PID Physical I.D.
• LID logical ID
• KEY a string of data of up to 64 bytes that is appended to user data, if desired, by the host access method.
• the KEY is also a part of the user record and can be used for addressing purposes if desired.
• LID's and KEY'S are thus optional identifiers that may be used to further identify and locate a particular block of user data.
• An error detection code resynchronizable data sector (34 bytes).
• Six resynchronizable data sectors containing the error correction code for the data (204 bytes).
• Subsequent blocks are written beginning in the sector immediately following the last block separator of the previously written data block.
• the block separator sector has a 1.6 MHz square wave written therein.
• a preamble sector in contrast, has an 8 MHz square wave written therein.
• the Preamble/Resynchronizable Data ' Sector comprises two SYNC BYTES followed by an 8 MHz square wave.
• the 8 MHz square wave can be generated by 2-7 encoding 92, 49, 24 [hex] repeating data.
• the physical identifier, or PID sector shown in FIG. 7, is comprised of two SYNC BYTES followed by 32 bytes of 2-7 encoded data comprising two identical copies of a 16 byte group of data (hex) as follows:
• FF and 00 are hex numbers. Tracks are numbered consecutively from the outermost track of the band to the inner most track of a band ' .
• the bands are likewise numbered beginning from the outermost band to the innermost band on the platter.
• the blocks of data within a given track are consecutively numbered..
• the user data is located in Resynchronizable Data Sectors that comprise two SYNC BYTES followed by 32 bytes of encoded user data. (As explained hereinafter, a 2-7 code is used in the preferred embodiment.)
• the Error Detection Code Resynchronizable Data Sector includes two SYNC BYTES followed by two bytes of 2-7 encoded data whose value is determined by a CRC computation of selected data
• the CRC polonomiaT is x + x + x 2 + x + T.
• the seed (initialization) pattern is "5D5D”. Thirty bytes of 00 follow the EDC bytes to fill the resynchronizable data sector.
• error correction data comprises two SYNC BYTES followed by 32 bytes of 2-7 encoded data whose value is determined by an interleaved READ SOLOMON computation on the selected data sectors and on the EDC resynchronizable data
• the format associated with the home address track 85 (FIG. 6a) will now be discussed.
• This track as its name implies, is used to identify the particular band within which the home address track lies.
• the data portion of the first block of the home address track has the following information pre-written therein:
• a platter format manufacturing change level number may also be included in the home address track, following the information given above, such as information used to identify the media manufacturing process or processes, information identifying the software or microcode that is used, a
• OMPI servo track writer ID number (a servo track writer is an apparatus used during the manufacturing process of the platter to place the pre-written information thereon, such as the coarse servo tracks 86), the time and date of manufacture, the media sensitivity, and similar information.
• each block of data can be readily identified. Moreover, many of the sectors used within each block of data are resynchronizable. That is, they begin with two SYNC BYTES. Hence, a data detection scheme can lock on to these SYNC BYTES using phase lock techniques in order to ensure that the subsequent data is accurately detected. (Conventional phase lock and detection schemes may be used.) • Advantageously, the two SYNC BYTES that precede every resynchronizable sector do not map.into any user data, yet the 2-7 code constraints are maintained. The 2-7 code is so named because the encoded data has the characteristic that a "1" is separated by a minimum of two O's and a maximum of seven O's. The 2-7 code may be summarized as shown in Table T.
• the SYNC BYTES are used to establish a known bit position in the data stream. This position is required to allow the 2-7 decoding to begin at a code boundary in the bit stream and to determine the byte boundaries of the decoded data.
• the SYNC BYTES are located in the first two byte positions of the resynchronizable sectors as shown in FIG. 7. These resynchronizable sectors include the preamble preceding the physical identifier (PID), the PID, data, EDC, and ECC sectors of each data block.
• the SYNC blocks are defined by performing a 2-7 encoding of the word "BF7A" and modifying the result by changing a "1" to a "0" at the position indicated in FIG. 8. This modification advantageously prevents data from generating SYNC BYTES, but does not violate the 2-7 code rule as defined in Table 1.
• FIG. 9 there is shown a block diagram of the control electronics 52 (FIG. 4) of the optical drive system 20.
• two control interfaces 90 and 92 are provided to enable communications with two separate storage directors of the storage control unit 24 (FIG. 1). Communication with two separate directors is provided to add flexibility to the particular configuration that will be used with the optical drive systems.
• a suitable switch 94 allows communication with either director to be selected.
• a functfonal microprocessor 96 performs the following functions within the optical drive system:
• this functional microprocessor 96 may be realized with a commercially available 16-bit processor chip, such as the MD 68000 manufactured by Motorola Semiconductor of Phoenix, Arizona.
• Code for the microprocessor 96 may be stored in a suitable memory device 98, such as a 128K Dynamic Random-Access-Memory (DRAM).
• DRAM Dynamic Random-Access-Memory
• the DRAM 98 may also provide additional memory associated with the operation of the control electronics, such as index and other information.
• a maintenance microprocessor (MUP) 100 is also used to provide the functions necessary for communications with and testing of the optical drive system 20.
• a 32K random access memory (RAM) 102 provides the necessary storage for the code associated with the maintenance microprocessor 100.
• the maintenance processor 100 may be realized with an identical chip as is the functional microprocessor 96.
• a 4K read only memory (ROM), such as a programmable ROM (PROM) 104, is used to provide the Boot and start-up code for the MUP 100 and the other start-up functions associated with the control electronics 52.
• a Data Buffer provides temporary storage of data transferred for read/write operations and compensates for the different access rates associated with the optical drive system. Thus, it is used for matching the speed of data transfer with the transfer rate of the host CPU 22.
• the DBUF 106 has a data capacity of one track, or 128 Kbytes.
• a block diagram of one possible embodiment of the data buffer 106 is shown in FIG. 10. Conventional circuitry may be used to realize the functions indicated in each of the blocks of FIG. 10.
• the DBUF 106 includes two FIFO (First-In, First-Out) buffers 108 and 110 having a memory array 112 placed therebetween. Additional buffers 114, 116, 118, and 120 are used to help transfer data or
• OMPI_ control signals to and from the respective microprocessor 96 or 100.
• a multiplexer 122 selects the appropriate input data to be held within the DBUF 106.
• Control circuitry 124 generates necessary control signals for the memory array 112 and the multiplexer 122; and a FIFO controller 126, in response to control signals from the appropriate microprocessor, generates an address signal for the memory array 112.
• a Dynamic Defect Skipping (DDS) buffer and control block 128 provides the necessary buffering for rewriting data after detected defects and to control read transmitted data during read.
• the Dynamic Defect Skip function is described more fully below in connection with FIGS. 11-14.
• Suitable error correction code (ECC) circuitry 130 is employed in the data path to improve the . data error rate during a read operation. As with all ECC schemes, this process involves properly encoding the data when it is written with a suitable code that when read back not only helps identify that an error has occurred but also provides the necessary information to correct the error in most cases.
• the error correction code that is used comprises a triple error correcting (255, 249) READ/SOLOMON code, interleaved to degree 32. Each of the 32 interleaves has 6 ECC bytes associated therewith for a total of 192 ECC bytes for each block of data. The location of the ECC bytes within the block is as shown in FIG. 7.
• the code is capable of correcting three symbols (bytes) in error per interleave. Because of this interleaving, this yields a first correction capability of 96 bytes.
• the code is designed to meet or exceed the criteria that no more than one uncorrectable error occur in 10E+13 bits of data transferred.
• the circuitry used to encode and decode the error correction code is advantageously shared between the encoding and decoding processes.
• a serializer/deserializer (SERDES) circuit 132 is used to take byte-serial channel data and convert, it into bit-serial data to be written on the platter and visa-versa.
• the SERDES 132 circuitry comprises the elements enclosed within the dotted line 132 of FIG. 11, which figure depicts the data path associated with the control electronics 52 (FIG. 4).
• the SERDES circuitry provides the desired encode/decode function.
• the translation from data to code words and back follows the pattern indicated in Table 1.
• the decode function performed at block 137 takes as inputs a 2F clock signal and the detected data . from the phase locked loop circuits and generates corresponding data bits.
• the decode function of the decoder 137 also provides error checking to detect the presence of "11" "101", or "00000000” patterns in the coded data. These bit patterns violate the rules for a 2-7 code.
• pattern generation circuitry 134 (FIG. 11) • provides these characters to the data stream at the output of the 2-7 encoder 136.
• a synchronizer circuit 138 provides the means to detect the beginning of a Resynchronizable Data Section (RDS) by decoding the special 2-byte field at the start of every RDS.
• RDS Resynchronizable Data Section
• a synchronizer circuit 138 provides the means to detect the beginning of a Resynchronizable Data Section (RDS) by decoding the special 2-byte field at the start of every RDS.
• RDS is that sequence of data bytes, such as is shown at 139 and 141 of FIG. 7 that is written into a data sector, such as 139' or 14T of a block
• the circuit 138 also provides the means to acquire phase-sync for the 2-7 decoder and bit-sync for the data path.
• the 2F frequency used in the generation of encoded data is derived from a crystal oscillator 140 running at 48 MHz.
• Other clocks used in the data path are all derived from this frequency.
• the clocks are distributed throughout the control electronics 52 (FIG. 4) as a IF clock signal (24 MHz) and as four 12 MHz clock signals, each derived from the IF clock and offset from each other by 90°.
• an RS-232 interface 142 is provided within the control electronics in order to allow communication with the optical drive system 20 through the use of any suitable diagnostic tool on either a local or remote basis.
• An operator panel 144 provides the controls and indicators necessary for operator use in completing a power up/down sequence, or in a load/unload of a cartridge 32.
• An FE panel 146 provides to the field engineer a manner of controlling and monitoring the operation of the optical drive system 20 so that proper diagnostics and tests can be run.
• a floppy disk 148 preferably an 8-inch floppy disk, provides storage for the maintenance processor 100 microcode, diagnostic microcode, and error log information.
• an important feature of the present invention is the ability to correctly write data on the platter during a write operation. Correctness of the data is assured by performing a read back check. That is, immediately after the data is written on the platter 44 it is read back therefrom. The data read back is compared with the data written to the platter and if any differences exist then the data has been incorrectly written and is so marked. This process is repeated as many times as is necessary (within reason) in order to insure the correctness of the written data. This process is referred to as Dynamic Defect Skipping (DDS) and -is functionally illustrated in FIG. 12. The data to be written is loaded into a write buffer 150. From this buffer 150, the write data is made available to the serializer 133 and a comparator circuit 152.
• DDS Dynamic Defect Skipping
• Data read from the platter immediately after it is written is likewise made available to the comparator circuit 152 and to a read buffer 154. If the compare function performed by the comparator circuit 152 indicates that the data read back is the same as the data written to the platter, then appropriate control signals are generated to allow the read data held in the read buffer 154 to be transferred to the data buffer 106. If, however, the comparison of the write data to the read data indicates that an error has occurred, then appropriate control signals are generated to flag that particular sector as containing incorrect information. Any subsequent- attempts to read a sector so flagged will cause the data therein to be ignored (not made available to the data buffer).
• An Exception Mark is a 2.0 MHz square wave signal and is derived from the 48 MHz write clock, as are the preamble signal (an 8 MHz square wave) and the block separator (BS) signal (a 1.5 MHz square wave).
• BS block separator
• each block of data starts with a block separator sector followed by two preamble sectors.
• a block separator sector is a sector having a block separator signal written therein.
• a preamble sector is a sector having a preamble signal written therein.
• a sector is identified by the signal written therein, e.g., an exception mark or EM sector, an RDS sector, a BS sector, etc.
• the phase lock loop circuits used to detect the data require that at least two sectors of preamble precede the data. If any sector in these initial three sectors—the block separator or two preamble sectors—is bad, then the sequence must be restarted.
• a defective data sector is marked by a preamble/exception mark sequence. That is, immediately following the detection of a defective data sector, the following sectors are written:
• n_ exception mark sectors are written to mark the length of the defect. If a defect exception mark is read back, an incomplete block sequence is written and the entire block is rewritten. In the case of 10 defective sectors, an incomplete block sequence is written and the entire block is rewritten. The reason for this limit is the limited size of the read defect skip buffer 154.
• An incomplete block sequence is defined to be a consecutive sequence of an exception mark sector and a block separator sector. If any sector is determined to be bad, a sequence is restarted. If the end of the track occurs before the sequence can be written successfully, error recovery procedures must be invoked from the host CPU or the storage control unit in order to recognize that a block that has been written could not be completed and could not be marked incomplete because of the end of the track. If an incomplete
• OMPI sequence is due to the end of a track, the sectors following the incomplete block sequence are padded with preamble sectors.
• the rewrite begins with the defective block, not the block prior to the defect.
• Stop unable to write incomplete block sequence at start of track status.
• Block Separator sector defective and track not full go to 329.
• the function of the write data compare circuitry 152 (FIG. 12) is to locate defective areas on the platter or media 44, or to isolate and identify other conditions that may cause data to be defectively written, by performing a byte-by-byte compare of written and read back data.
• an indication is sent to the write control circuitry 156.
• This indicator initiates a defect mark sequence at the next resynchronizable data sector boundary.
• the requirements of the data compare circuitry 152 are that the write buffer 150 hold the data until the read back data is ready. Each read back data byte is latched as it is input into the read buffer 154.
• the data compare circuitry 152 performs a byte-to-byte comparison.
• the write control circuitry 156 is signaled when a mismatch occurs.
• the primary function of the write DDS buffer 150 is to hold the data until the read back check function has determined that data need not be rewritten.
• the size of this buffer is determined by three factors:
• the data buffer latency (e.g., how fast data can be retrieved from the buffer). Data buffer latency is considered to be negligible.
• the DOS algorithms require rewriting of the resynchronizable data sector before the resynchronizable data sector with the defect. Therefore two sectors must be buffered for this factor. In the preferred embodiment, consideration of these factors yields a total write DDS buffer size of three RDS's, or 96-bytes.
• a read control section 158 (FIG. 12) supervises data block deformatting, including finding the start of the block and separating data RDS's from non-data RDS's and defective data RDS's.
• phase lock loop control lines as required (high gain, filter unlock, etc.).
• the read control section 158 must exhibit flexibility in order to allow rapid changes to take place as unexpected read errors occur.
• a high speed microprocessor is the preferred means to achieve this flexibility.
• An 8 X 305 based design is a suitable microprocessor that may be used for this task because it is a complete single chip microprocessor that is commercially available from Signetics and it operates at the required speed. This is the same type of microprocessor, advantageously, that may be used to realize and control the ECC functions (block 130 in FIGS. 9 and 11).
• the write control circuitry 156 (FIG. 12) controls the data block format, including the preamble, postamble, dynamic defect marking and rewrite, and incomplete block marking.
• the write control circuitry 156 requires that several decisions and actions be made within an RDS time. (An RDS time, in the preferred embodiment, is 11.3 microseconds). The requirements of the write control circuitry may be summarized as follows:
• the write control function in the preferred embodiment is controlled by a high speed microprocessor.
• the microprocessor used for this function may be the same microprocessor used to compute correction vectors and offsets during a read, which would otherwise be idle during writes. Input/output ports, the capability to run the microprocessor at byte rate, and additional control memory are the only conditions required to utilize the ECC microprocessor for this function.
• the ECC microprocessor is realized with an 8 X 305 based design which executes instructions in 200 ns.
• the same microprocessor used to realize the read control circuitry 158 may be used for this function.
• Such a microprocessor is commercially available from Signetics.
• the read DDS buffer 154 serves the primary function of delaying data from entering the data buffer 106 until the read DDS microprocessor 158 can determine if the data has been rewritten because of a defect detected at write time.
• the read DDS buffer 154 must be approximately 374 bytes (11 RDS x 34 bytes) in length. Because the data buffer sometimes cannot accept data (e.g., to analyze KEY information, or for error correction) additional buffering may be required.
• the time required for these functions is variable, but should be no more than 300 microseconds in the preferred embodiment. Thus, all of these factors indicate that a total buffer size of approximately 1300 bytes be used.
• the read control 158 senses this fact, stops data ingating, adjusts the read DDS buffer write counter, and restarts the data transfer at the beginning of the rewritten data.
• the implementation of the read DDS buffer is depicted in the block diagram of FIG. 13.
• Byte-wide data from the deserializer is latched into the read DDS buffer by a "byte strobe" signal on line 160 received from the deserializer.
• This line is a divide-by-8 of the phase lock loop (PLL) generated bit clock synchronized by the sync bit decoder 138.
• PLL phase lock loop
• Data will normally enter the read DDS buffer 154 at a 333 ns rate, with the exception for two missing cycles every RDS.
• the maximum frequency of the PLL (in and out of lock case) is 5.4 MHz, and this rate corresponds to a 317 ns byte rate.
• the maximum input rate to the read DDS buffer is thus 317 ns.
• a control block 162 of the read DDS buffer is a synchronized state machine clocked by the 24 MHz write clock. It performs the following functions:
• the control block 162 appends memory cycles adjacent to each other if data can be supplied or received at adequate rates. This achieves a maximum data rate to or from a RAM 164 of 8 Megabytes.
• the minimum required data rate for a 3-Mbyte throughput is a 6-Mbyte RAM input/output rate.
• the 8-Mbyte rate can be expected due to the fact that the decision concerning if data can be released from the read DDS buffer 154 is made on a 32-Byte basis.
• Table 4 identifies the input/output lines of the read buffer circuit 154 of FIG. 13.
• RD CNTR LIMIT 12 TTL signals corresponding to maximum RAM address which can be shifted out of Read DDS Buffer.
• STOP INGATING TTL signal used to stop data from being input to Read DDS Buffer. This occurs when a defect is detected and the write counter must be updated.
• OMPI WORD READY TTL signal indicating valid data is on DOUT lines.
• the block separator (BS) sector is a 1.5 MHz square wave.
• the exception mark (EM) sector is a 2.0 MHz square wave. These frequencies are outside the range of data. (Data frequencies range from 3 MHz to 8 MHz.)
• a third special function frequency, the preamble is used to synchronize the PLL and thus is the highest frequency recorded (8 MHz). The preamble resides in the data range. These frequencies are written in burst and in a integral number of RDS's in length.
• the Block Separator/Exception Mark/Preamble Decoder circuit 135 is employed. A block diagram of this special decoder circuit is shown in FIG. 14.
• Decoder Circuit 135 (referred as the BS/EM/Preamble decoder in the FIGURES.) may be summarized as follows:
• OMPI attempts at different thresholds can be used to recover otherwise unreadable data. 4. To ensure that incorrect decoding is extremely unlikely. That is, the ECC scheme cannot correct dynamic defect skipping failures. Thus, the marking system used (exception marks) to indicate that an incorrect write has occurred must be very reliable.
• data enters a shift register 170 clocked by the 48 MHz system clock. The data is synchronized to the clock and a 2-3 majority decode is performed. The majority decoder 170 filters noise from the data. This filtered data is monitored for transitions in a transition detector 172. Each transition resets a window counter 174.
• the window counter 174 also clocked, by the 48 MHz system clock, .generates timing windows in which the next transition can be expected if one of the special frequencies is received.
• the next transition if it occurs inside one of the windows, causes a latch corresponding to that condition to be set.
• This latch identified as the window decoder 176 in FIG. 14, enables a counter corresponding to the condition to increment.
• Three such counters are employed: a block separator counter 178, an exception mark counter 180, and a preamble counter 182. A transition outside of the windows or no transition before the end of the longest window causes the window decoder 176 to be reset, and this action disables the respective counter.
• the counter corresponding to that frequency reaches its maximum value.
• the counter latches in this state until the counter is preset by a restart line 184.
• the variable threshold requirement is implemented by allowing microcode or software to control the value to which each value is preset to when the restart line is pulsed.
• the restart line needs to be pulsed at the beginning of each resynchronizable data section. While searching for the start of a block, a signal is derived from the coarse seek band modulation.
• this signal is derived from a counter clocked by the 48 MHz system clock and synchronized by the sync byte decoder.
• the input/output lines to the BS/EM/Prea ble Decoder 135 are summarized in Table 5.
• FIG. 15 a block diagram of the sync byte generation and detection circuitry is shown. Many of the elements shown in FIG. 15 are also found in FIG. 11, but the particular arrangement of the elements in FIG. 15 helps clarify the function performed.
• Parallel write data from the DDS Buffer 150 (FIG. 11) is directed to a serializer register 133.
• a Sync byte generator 196 seTectiveTy intersperses the sync word "BF7A" with the data in the serializer 133.
• the serial data from the serializer 133 is sent to the 2-7 Encoder 136 where it is encoded according to the pattern shown in Table 1. This data is then gated through an AND gate 198, the output of which is coupled to a serial write data bus 155.
• Logic circuitry 200 determines when the particular transition (bit) of the unchanged sync word is present (see FIG. 8) . so that this bit may be surpressed, thereby generating the desired sync byte.
• the sync byte is sensed by monitoring read bytes as they pass through the 2-7 decoder shift register 207.
• Sync byte detect logic 204 is configured to generate a sync detect signal whenever the prescribed sync byte bits are present. This sync detect signal helps to organize the read data into correct parallel data bytes.
• RAW DATA ECL signal corresponding to signals read from media. 48 MHz EC! signal derived from system crystal clock. RESTART TTL signal corresponding to start of each RDS.
• BS THRESHOLD 9 TTL signals corresponding to desired BS threshold.
• EM THRESHOLD 9 TTL signals corresponding to desired EM threshold.
• PRE THRESHOLD 9 TTL signals corresponding to desired preamble threshold.

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