EP0119904A1 - Brückenschaltung zur Basisansteuerung eines Leistungstransistors - Google Patents
Brückenschaltung zur Basisansteuerung eines Leistungstransistors Download PDFInfo
- Publication number
- EP0119904A1 EP0119904A1 EP84400440A EP84400440A EP0119904A1 EP 0119904 A1 EP0119904 A1 EP 0119904A1 EP 84400440 A EP84400440 A EP 84400440A EP 84400440 A EP84400440 A EP 84400440A EP 0119904 A1 EP0119904 A1 EP 0119904A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- transistor
- base
- current
- power transistor
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
- H03K17/66—Switching arrangements for passing the current in either direction at will; Switching arrangements for reversing the current at will
- H03K17/661—Switching arrangements for passing the current in either direction at will; Switching arrangements for reversing the current at will connected to both load terminals
- H03K17/662—Switching arrangements for passing the current in either direction at will; Switching arrangements for reversing the current at will connected to both load terminals each output circuit comprising more than one controlled bipolar transistor
- H03K17/663—Switching arrangements for passing the current in either direction at will; Switching arrangements for reversing the current at will connected to both load terminals each output circuit comprising more than one controlled bipolar transistor using complementary bipolar transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
- H03K17/0412—Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit
- H03K17/04126—Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit in bipolar transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/042—Modifications for accelerating switching by feedback from the output circuit to the control circuit
- H03K17/0422—Anti-saturation measures
Definitions
- the present invention relates to the switching control of power transistors at high frequencies, for example in the range from 10 to 100 kHz, which allow free choice of the conduction and cut-off duty cycle of the power transistor.
- FIG. 1A Given a switching order signal S (FIG. 1A) capable of passing from a first state or state “off” to a second state or state “on” depending on whether a power transistor to be controlled is desired either blocked or conductive, it is known that, if it is desired that the switching from one state to the other of the power transistor be very rapid, the basic signal must have the appearance shown in FIG. 1B. As shown in FIG. 1A
- the basic current I B towards the power transistor must be of a first polarity (for example I B1 positive in the case where the power transistor is an NPN transistor) when we want that this transistor conducts, then at the moment when the order signal S goes from its "on” state to its “off” state, it is not enough to interrupt the basic current I B , but it is necessary to extract from the transistor power a current of a second polarity (I B2 negative in the case of an NPN transistor) until the charges stored in this transistor are eliminated.
- a first polarity for example I B1 positive in the case where the power transistor is an NPN transistor
- the present invention provides a basic control circuit for a power transistor which comprises a single power source and whose duty cycle can be widely variable.
- the present invention proposes the use of a controlled inverting bridge to alternately apply basic signals of opposite polarities to a power transistor in response to changes in state of a switching order signal.
- the present invention provides a particular type of bridge and a particular control mode of this bridge to allow the basic control of a transistor in the manner indicated above.
- the basic power transistor control circuit allows, when a switching command signal is in a first state, to apply to the power transistor a base current of a first polarity so that the transistor of power be conductive, then, when this command signal passes from the first state to a second state, to apply to the power transistor a base current of a second polarity to block it quickly.
- This control circuit is supplied by a single voltage source.
- the basic current of the first polarity is supplied by a first current source connected, on the one hand, to the power source, on the other hand to the base of the power transistor whose emitter is connected to a first transistor switch.
- the base current of the second polarity is supplied by a second current source connected, on the one hand, to the power source, on the other hand, to the emitter of the power transistor whose base is connected to a second switch transistor.
- the first switch transistor is in series with the bias circuit of the first current source.
- the second switch transistor is in series with the bias circuit of the second current source.
- the second switch transistor receives the switching command signal and is connected to the first switch transistor so that their states are complementary.
- FIG. 2 represents a power transistor T, which generally consists of an association of two transistors in Darlington mounting as shown by the double line at the level of the collector in the representation of the figure.
- the control circuit is connected between supply terminals 1 and 2, terminal 1 being for example at ground and terminal 2 at a positive potential Vcc.
- transistors Tl to T4 are connected in bridge. When the switches constituted by the transistors T4 and T3 are closed while the switches constituted by the transistors Tl and T2 are open, a current I B1 flows from the power source Vcc by the transistor T4 to the base then the emitter of the transistor T towards ground (terminal 1) via transistor T3.
- a difficulty in using such bridge arrangements lies in the fact that for the application to the basic control of a high frequency power transistor, the transitions from one conduction branch to the other should be extremely fast. For example, they must be much lower than the microsecond if the operating frequency envisaged is of the order of 50 kHz (period 20 microseconds).
- the operating frequency envisaged is of the order of 50 kHz (period 20 microseconds).
- it is necessary to avoid going through a simultaneous closing or opening phase which could lead to destruction of the power transistor which is particularly sensitive when it does not receive base current.
- the basic current to be applied to the main transistor may be a few amps.
- FIG. 3 shows in simplified form an embodiment of the present invention.
- the basic control circuit is connected to terminals 1 and 2 of a single power source, terminal 1 being grounded and terminal 2 being at a potential + Vcc.
- the transistors T1 and T3 are NPN transistors and the transistors T2 and T4 are PNP transistors.
- the transistor T1 receives on its base the switching order signal S which varies between a high state ensuring the conduction of the transistor T1 and a low state ensuring the switching off of this transistor.
- the emitter of transistor Tl is connected to terminal 1 and its collector is connected to the base of power transistor T via a diode Dl polarized so as to allow the flow of current from the base to the ground via the transistor Tl.
- Transistor T3 has its base connected to the collector of transistor Tl via a resistor R1, its emitter connected to ground and its collector connected to the emitter of main transistor T.
- the transistors T2 and T4 are connected as current sources.
- the base of transistor T2 is connected to the supply potential Vcc by a resistor R2, and to the collector of transistor Tl by a resistor R3.
- the emitter of transistor T2 is connected to the supply voltage via a resistor R4 and its collector to the emitter of power transistor T.
- the base of transistor T4 is connected to the supply potential Vcc by a resistor R5 and to the collector of the transistor T3 by a resistor R6.
- the emitter of transistor T4 is connected to the supply potential via a resistor R7 while the collector of this transistor T4 is connected to the base of transistor T.
- the resistors R4 and R7 are of low value, by example of the order of the ohm, so as to leave pass a positive or negative basic control current to the power transistor T without excessive dissipation
- transistors T2 and T4 are mounted as a current source. This has at least two advantages. The first is that transistors in such a configuration can be chosen to operate in their linear regime (unsaturated) and then, as is well known, they are switchable at opening much faster than if they were at saturated state.
- the transistor T3 must be significantly more sensitive than the transistor T2.
- the order signal S at the input of the transistor T1 passes at high level, this transistor becomes conductive.
- the transistor T3 is blocked and the transistor T4 which is in an unsaturated regime also blocks very quickly while the transistor T2 becomes conductive.
- a current I B2 then flows from terminal 2 through the resistor R4 and the transistor T2 towards the emitter / base junction of the power transistor T, then through the diode Dl and the transistor Tl towards the ground terminal 1.
- this current is maintained for a short time tl-t2, then decreases rapidly towards zero while the emitter / base junction of the transistor T becomes blocking because the charges stored in the base of the power transistor are eliminated.
- the signal of order S returns to low level, and one returns to the previous state, the transistor Tl blocking which involves the very fast blocking of the transistor T2 connected in current source and switching on the transistors T3 and T4.
- Figure 4 shows the electrical diagram of Figure 3 with some modifications to improve its operation.
- the only elements removed with respect to FIG. 3 are the emitter resistors R4 and R7 of the transistors T2 and T4 which are replaced by a single resistor R8 disposed between the power source Vcc and a terminal common to the emitters of the transistors T2 and T4.
- the purpose of this modification is to arrange the transistors T2 and T4 in an assembly of the flip-flop type which makes their simultaneous conduction even more incompatible.
- a capacitor C1 is placed in parallel with the resistor RI connected to the base of the transistor T3. This is to introduce into the base of the transistor T3 at the time of switching of the transistor T1 a positive or negative overcurrent intended to accelerate the switching on or off of the transistor T3.
- a capacitor C2 is arranged in parallel on the bias resistor R6 of the transistor T4. This capacitor has for the purpose of also accelerating the conduction and blocking of this transistor, but also of causing an overcurrent in the positive base current I B1 when the transistor T4 is closed. This overcurrent corresponds to the portion of dotted curve indicated in FIG. 1B, for example at time t3.
- a Schottky diode D2 and a rectifying diode D3 connected between the base and the collector of transistor T as shown serve as an anti-saturation circuit for this power transistor.
- a Schottky diode D4 disposed between the base and the collector of transistor T2 serves to protect this transistor against possible saturation. It is also possible to provide a diode D5 in parallel on the resistor R8 if it is desired to operate the circuit without limiting the negative base current I B2 .
- the following elements may be chosen as components of the circuit of FIG. 4, to control a Darlington of type BUV 54:
- the current I B1 is of the order of 0.5 A while the current I B2 is, at its maximum, of the order of 2A.
Landscapes
- Inverter Devices (AREA)
- Power Conversion In General (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8304240A FR2542948B1 (fr) | 1983-03-15 | 1983-03-15 | Circuit de commande de base en pont d'un transistor de puissance |
FR8304240 | 1983-03-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
EP0119904A1 true EP0119904A1 (de) | 1984-09-26 |
Family
ID=9286895
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP84400440A Withdrawn EP0119904A1 (de) | 1983-03-15 | 1984-03-06 | Brückenschaltung zur Basisansteuerung eines Leistungstransistors |
Country Status (2)
Country | Link |
---|---|
EP (1) | EP0119904A1 (de) |
FR (1) | FR2542948B1 (de) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1987004024A1 (en) * | 1985-12-19 | 1987-07-02 | Italtel Società Italiana Telecomunicazioni S.P.A. | Control circuit of the power transistor in a dc/ac converter |
FR2618619A1 (fr) * | 1987-07-21 | 1989-01-27 | Thomson Semiconducteurs | Circuit de commande de base en pont a blocage controle meme en avalanche |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1176191B (de) * | 1962-01-26 | 1964-08-20 | Siemens Ag Albis | Schaltungsanordnung zur Umkehrung der Stromrichtung in einem Verbraucher |
FR2311452A1 (fr) * | 1975-05-16 | 1976-12-10 | Thomson Csf | Dispositif a semi-conducteur pour commutation rapide de puissance et appareil comportant un tel dispositif |
-
1983
- 1983-03-15 FR FR8304240A patent/FR2542948B1/fr not_active Expired
-
1984
- 1984-03-06 EP EP84400440A patent/EP0119904A1/de not_active Withdrawn
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1176191B (de) * | 1962-01-26 | 1964-08-20 | Siemens Ag Albis | Schaltungsanordnung zur Umkehrung der Stromrichtung in einem Verbraucher |
FR2311452A1 (fr) * | 1975-05-16 | 1976-12-10 | Thomson Csf | Dispositif a semi-conducteur pour commutation rapide de puissance et appareil comportant un tel dispositif |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1987004024A1 (en) * | 1985-12-19 | 1987-07-02 | Italtel Società Italiana Telecomunicazioni S.P.A. | Control circuit of the power transistor in a dc/ac converter |
FR2618619A1 (fr) * | 1987-07-21 | 1989-01-27 | Thomson Semiconducteurs | Circuit de commande de base en pont a blocage controle meme en avalanche |
EP0301979A1 (de) * | 1987-07-21 | 1989-02-01 | STMicroelectronics S.A. | Brückenschaltung zur Basisansteuerung mit selbst im Lawinen-Modus gesteuerter Sperrung |
Also Published As
Publication number | Publication date |
---|---|
FR2542948B1 (fr) | 1985-06-21 |
FR2542948A1 (fr) | 1984-09-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Designated state(s): DE FR GB IT NL SE |
|
17P | Request for examination filed |
Effective date: 19841004 |
|
17Q | First examination report despatched |
Effective date: 19860123 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 19860603 |
|
RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: RISCHMUELLER, KLAUS |