Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q11/00—Selecting arrangements for multiplex systems
  • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
  • H04Q11/0407—Selecting arrangements for multiplex systems for time-division multiplexing using a stored programme control

Definitions

• This invention relates to a time division switching system, and more particularly, to time multiplex switches for use with such systems.
• Time division switching systems frequently comprise a plurality of time-slot interchange units which can be selectively interconnected by a time multiplex switch.
• the time multiplex switch operates in a repetitive sequence of a predetermined number of time slots.
• digitized speech representations called data words herein are transmitted from each time-slot interchange unit to the time multiplex switch, which connects the data words to selected other time-slot interchange units.
• the time multiplex switch connection pattern may be different for each time slot of the repetitive sequence.
• a time multiplex switch having a given number x>£ input and output terminals for connection to other communication units, such as time-slot interchange units, is generally constructed as a square matrix having a number of crosspoints equal to the square of the number of input and output terminals, for example, a time multiplex switch having M input and M output terminals would generally consist of a single matrix having M crosspoints.
• the number of crosspoints and the amount of associated control circuitry for a time multiplex switch can be greatly reduced if the time multiplex switch is constructed of a plurality (N) of square matrices each having one Nth of the total number of input and output terminals. If the complete time multiplex switch is to
• CMPI have M input and M output terminals, each of the N
• a time division switching system in accordance with the present invention comprises a plurality of time- slot interchange units and a plurality of switch units, each comprising a plurality of input/output ports and a switch matrix for selectively completing communication paths between the input/output ports in time slots of fixed duration.
• first bidirectional communication paths connecting each of the time-slot interchange units to one of the input/output ports of at least one of the switch units for conveying data words in time slots of fixed duration
• second bidirectional communic tion path connecting at least one input/output port of at least one of the switch units to at least one input/output port of another of the switch units.
• the activity status indications (busy-idle) of a first communication path connecting the first time-slot interchange unit to a given switch unit are compared with the activity status indications of one of the first communication paths connecting the second time—slot interchange unit to the given switch unit to identify a
• SUBSTITUTE SHEET common idle time slot When such a common idle time slot is found, it is used to interconnect the first and second time-slot interchange units through the given switch unit. However, if no such common idle time slot can be found on communication paths connected to the same switch unit, a common idle time slot may still be found employing first communication paths connected to different switch units.
• the second type of common idle time slot consists of a common idle time slot on one of the first communication paths between the first time-slot interchange unit and a first one of the switch units, on one of the first bidirectional communication paths between the second time-slot interchange unit and a second one of the switch units, and on one of the second communication paths connected between the first and second switch matrices.
• data words can be transmitted between the first and second time-slot interchange unit during the common idle time slot on a path consisting of a first communication path, a first switch unit, a selected one of the second communication paths, the second switch unit, and a first- communication path connected to the second time-slot interchange unit.
• FIG. 1 is a block diagram of a time-division switching system
• FIG. 2 is a block diagram of a time-multiplex switch embodying the present invention
• FIG. 3 is a flow diagram of the time-slot search sequence used by the present invention
• FIG. 4 is a block diagram of a time-multiplex switching link-interface unit used in the present embodiment
• FIG. 5 is a block diagram demonstrating applications of the present invention.
• FIG. 1 is a block diagram of a time division switching system embodying the present invention which is used to interconnect subscriber sets such as subscriber sets 23 through 26.
• the embodiment of FIG. 1 includes a time multiplex switching unit 10 which comprises a time- shared space division switch having 61 input ports and 61 output ports.
• the embodiment further includes up to 30 time-slot interchange units of which representative time- slot interchange units 11 and 12 are specifically shown.
• Each time-slot interchange unit 11 and 12 includes a bidirectional time-slot interchanger. Additionally, each time-slot interchange unit 11 and 12 is connected to two input ports and two output ports of time multiplex switch unit 10.
• time-slot interchange unit 11 is connected to two time multiplex switch input ports via time multiplex lines 13 and 14 and to two output ports, via time multiplex lines 15 and 16.
• time-slot interchange unit 12 is connected to two time multiplex switch input ports via time multiplex lines 201 and 203 and to two output ports via time multiplex lines 202 and 204.
• the input and output ports of time multiplex switching unit 10 are referred to as input/output port pairs. This term is used since the source for data words to an input port of a given input/output port pair is also the destination for data words from the output port of that pair. As shown in FIG. 1, input/output port pair 1 is associated with time multiplex lines 13 and 15.
• Each time multiplex line 13 through 16 and 201 through 204 conveys digital information in 125 microsecond frames each comprising 256 time separated channels. Accordingly, each time-slot interchange unit transmits and receives up to 512 channels of digital information during each 125 microsecond frame.
• Each time-slot interchange unit is uniquely associated with a control unit of which control- unit 17 is associated with time-slot interchange unit 11, and control unit 18 is associated with time-slot interchange unit 12. Additionally, each time-slot interchange unit is connected to a plurality of line units of which line units 19 through 22 are shown in FIG. 1 via individual time multiplex lines. In the present embodiment, line units 19 and 20 are connected to time-slot interchange unit 11 and line units 21 and 22 are connected to time-slot interchange unit 12. Each of the line units of the present embodiment is connected to a number of subscriber sets of which subscriber sets 23 through 26 are shown.
• the exact number of line units associated with each time- slot interchange unit and the exact number of subscriber sets associated with each line unit is determined by the number of subscribers to be served and the calling rates of those subscribers.
• Each line unit terminates the analog loop of the well-known type from a plurality of subscriber sets, e.g. , 23 through 26, and converts call information including analog speech signals into digital- data words which are transmitted to its associated time- slot interchange unit. Further, each line unit detects service requests from the subscriber sets and generates certain signaling information for those subscriber sets.
• the particular subscriber sets from which speech samples are taken and encoded, and the particular time multiplex channels used to transmit the resulting code between the line unit and its associated time-slot interchange unit are determined by the control unit of the associated time-slot interchange unit.
• Line unit 19 scans the lines connected to each subscriber set to detect requests for service. When such a request is detected, line unit 19 transmits to the control unit 17, a message indicating the request and the identity of the requesting subscriber set. This message is transmitted to control unit 17 via a communication path 27. Control unit 17 performs the necessary translation based on the service requested, the identity of the requesting subscriber set and the available equipment, and transmits a message to line unit 19 via communication path 27 defining which of the plurality of time separated channels between line unit 19 and time-slot interchange unit 11 is to be used to transmit information from subscriber set 23 to time-slot interchange unit 11.
• line unit 19 encodes the analog information from subscriber set 23 into digital data words and transmits the resulting data words in the assigned channels.
• line unit 19 also transmits in the assigned channel an indication of the DC state, i.e., open circuit, closed circuit, of the subscriber loop associated with subscriber set 23.
• control unit 17 After a time separated channel between line unit 19 and time-slot interchange unit 11 is assigned to a given subscriber set, control unit 17 detects signaling information from the subscriber set by sampling the information transmitted in the assigned channel. Such sampling operations are performed via a communication path 28. Control unit 17 responds to the signaling information from the subscriber's channel, and to control messages from other control units, e.g., 18, and a central control unit 30, by controlling the time-slot interchange function of the time-slot interchange unit 11. As previously stated, each time multiplex line between a time—slot interchange unit and the time multiplex switch unit 10 has 256 channels each 125 microsecond frame. These channels are assigned numerical designations from 1
• SUBSTITUTE SHEET to 256 in sequence as they occur. This sequence of channels recurs so that a given channel will be available every 12.5 microseconds.
• the time-slot interchange function takes the data words received from the line units and places them in channels on the time multiplex line between the time-slot interchange units and the time multiplex switching unit 10 under the control of control units 17 and 18.
• Time multiplex switching unit 10 operates in recurring frames of time slots where each 125 microsecond frames comprises 256 time slots. During each time slot, time multiplex switching unit 10 is capable of connecting data words received at any of its input ports to any of its output ports in accordance with time-slot control information stored in a control memory 29.
• the configuration pattern of connections through time multiplex switching unit 10 repeats itself every 256 time slots and each time slot is assigned a numerical designation in sequence from 1 to 256. Accordingly, during a first time slot TS 1 the information in a channel (1) on time multiplex line 13 may be switched by time multiplex switching unit 10 to an output port 61 while during the next time slot TS 2 the next channel (2) on time multiplex line 13 may be switched to an output port n.
• Time-slot control information is written into control memory 29 by the central control 30 which derives this control information from control messages obtained from various control units, e.g. , 17 and 18.
• Central control 30 and the control units 17 and 18 exchange control messages utilizing selected channels called control channels of the time multiplex lines, e.g. , 13 through 16, between the time-slot interchange units and the time multiplex switching unit 10.
• each control message comprises a plurality of control words and each control channel can transmit one control word per frame of 256 time separated channels. The same channel of the two time multiplex lines
• a OMPI associated with a given input/output port pair is predefined to be a control channel. Additionally, a given channel is used as a control channel for only one pair of time multiplex lines. For example, if channel 1 is used as a control channel on time multiplex line 13 and the associated time multiplex line 15, no other time multiplex line will use channel 1 as a control channel.
• time multiplex switching unit 10 connects the data word occupying that control channel to the 61st output port and connects the 61st input port to the output port associated with the above-mentioned control channel.
• channel 1 is the control channel for time multiplex lines 13 and 15, and channel 2 is the control channel for time multiplex lines 14 and 16.
• time slot TS 1 information from control memory 29 defines, among other connections, that the control word in channel 1 of time multiplex line 13 is connected to output port 61 and that the control word in channel 1 at input port 61 is connected to time multiplex line 15.
• time slot number TS 2 information from control memory 29 defines that the control word in channel 2 of time multiplex line 14 is connected to the output port 61 and that the control word in channel 2 at the input port 61 is connected to time multiplex line 16.
• output port 61 receives from time multiplex switching unit 10 all control words in a channel having the same numerical designation in which they were transmitted to the time multiplex switch.
• each control channel is connected to receive control words from input port 61 during the time slot having the same numerical designation as their associated control channel.
• Control words switched to the 61st output port are transmitted via a conductor 150 to a control distribution unit 31 which temporarily stores them in a location associated with that control channel.
• SUBSTITUTE SHEET association of control channels with storage locations in control distribution unit 31 identifies the source of the information stored.
• Each control message from a time-slot interchange unit comprises a start character, a destination portion, a signaling information portion, and an end character.
• the destination portion uniquely defines the expected destination of the control message.
• Control distribution unit 31 interprets the destination portion of each control message to determine the proper destination for the control message and retransmits the message on a conductor 151 to input port 61 of time multiplex switching unit 10 in a channel having the same numerical designation as the control channel associated with the destination unit.
• the time-slot interchange unit 11 transmits control messages to time- slot interchange unit 12 by transmitting control words during its recurring control channel to form a control message having a destination portion identifying time-slot interchange unit 12.
• Control distribution unit 31 accumulates the control words, interprets the destination portion, and retransmits the message to the input port 61 during the channel having the same numerical designation as the control channel associated with time-slot interchange unit 12.
• a control message can also be transmitted to the central control 30 by defining central control 30 in the destination portion of the control message. When this occurs, control distribution unit 31 transmits the message to central control 30 via a communication link 32 rather than returning it to the time multiplex switching unit 10.
• a message may be transmitted from central control 30 to one of the time- slot interchange units by transmitting to the control distribution unit 31 a control message having a destination portion defining the particular time-slot interchange unit. This transmission is also accomplished
• FIG. 2 is a block diagram of time multiplex switching unit 10 which comprises two 32 by 32 switching matrices 205 and 206.
• Each time-slot interchange unit e.g., 11 and 12 is connected to both switching matrices 205 and 206 via a pair of time multiplex lines.
• Time-slot interchange unit 11 is connected by time multiplex line 14 and 16 to switch matrix 205 and by time multiplex lines 13 and 15 to switch matrix 206.
• time-slot interchange unit 12 is connected by time multiplex lines 201 and 202 to switch matrix 205 and by time multiplex lines 203 and 204 to switch matrix 206.
• time multiplex switch unit 10 includes a master clock circuit 217 which generates sequences of time slot count and timing signals. The signals from master clock circuit 217 are transmitted to 32 x 32 switches 205 and 206 and control memory 29 by a communication path 218. Control memory 29 is read once per time slot and the information defining the connections to be made by the switch matrices 205 and 206 is transmitted to those switch matrices via a respective one of communication paths 207 and 208.
• each pair of time multiplex lines e.g., 13 and 15 is assigned a control channel in which control words are exchanged with control distribution unit 31. Further, a control channel having a given designation is assigned to only one time multiplex line pair. Accordingly, during each time slot, only one time multiplex line pair can be exchanging control words
• a bidirectional multiplex/demultiplex circuit 209 is used to combine control words from both switch matrices 205 and 206 for transmission to control distribution unit 31 on conductor 150, and to separate control words transmitted from control distribution unit 31 on conductor 151.
• Mul iplex/demultiplex circuit 209 is connected to switch matrix 205 via a pair of time multiplex lines 210 and 211, to switch matrix 206 via a pair of time multiplex lines 212 and 213, and to control distribution unit 31 via time multiplex lines 150 and 151.
• a portion of the information read from control memory 29 during each time slot is transmitted to multiplex/demultiplex circuit 29 via a conductor 214 and is used by multiplex/demultiplex circuit 209 to connect either time multiplex lines 210 and 211 or time multiplex lines 212 and 213 to time multiplex lines 150 and 151.
• Time multiplex switching unit 10 also includes a time multiplex line 215 which connects one output terminal of switch matrix 205 to one input terminal of switch matrix 206 and a time multiplex line 216 which connects an associated input terminal of switch matrix 205 to an output terminal of switch matrix 206.
• the time multiplex lines 215 and 216 are referred to herein as a time slot bridge.
• the input and output terminals of switch matrix 205 which are connected to the time slot bridge are an input/output port pair as are the input and output terminals of switch matrix 206, which are connected to the time slot bridge.
• the time slots used for a given connection through time multiplex switch unit 10 are selected by central control 30.
• Central control 30 includes a memory 30a, which comprises a path map table associated with each pair of time multiplex lines, e.g. , 201 and 202, and the time multiplex lines 215 and 216 of the time slot bridge.
• Each path map table includes a storage location indicating the activity status of each time slot on the time multiplex line pair, e.g. ,
• each path map table comprises 256 storage locations, one of which is associated with each time slot on the associated time multiplex line pair. Further, each storage location associated with the channel being used, stores a logical » 'i' » while the storage location associated with unused channels stores a logical ' '0' '. In those situations where a fault causes a time multiplex line pair to be unusable. Logical ' 'Is' ' are written into each time slot location of the path map table associated with that time multiplex line pair.
• control unit e.g., 17, associated with an originating subscriber, accumulates call-related information including the called party identity and transmits that information to central control 30. Based on this information, central control 30 determines the time-slot interchange units associated with the -originating and called subscribers, and begins the search for a path (idle time slot) between them. First, central control 30 selects one of the time multiplex line pairs associated with the originating time-slot interchange unit on which to try to find an available time slot. In the present embodiment, central control 30 selects the time multiplex line pair which was not selected for the last call connected to that time-slot interchange unit. It is to be understood that any other method of time multiplex line pair selection could be used.
• each storage location of the path map table associated with the selected originating time-slot interchange unit time multiplex line pair is compared with the equivalent storage locations of the path map table for the time multiplex line pair of the called time-slot interchange unit which is connected to the same switch matrix. For example, when a subscriber connected to time-slot interchange unit 11 calls a subscriber
• the path map tables associated with time multiplex line pair 13 and 15 and time multiplex line pair 203 and 204 are compared to find a common idle time slot through switch matrix 206.
• time-slot interchange unit 11 cannot communicate data words with time-slot interchange unit 12 directly through switch matrix 205.
• time-slot interchange unit 11 cannot communicate data words with time-slot interchange unit 12 directly through switch matrix 206.
• time slot bridge comprising time multiplex line pair 215 and 216 is used to avoid such isolation. Normal time slot location involves seeking direct connection through one switch matrix, e.g. ,
• time slot bridge and a time multiplex line pair associated with the called time—slot interchange unit If a common idle time slot is discovered on a time multiplex line pair associated with the originating time-slot interchange unit, the time slot bridge and a time multiplex line pair associated with the called time—slot interchange unit, the appropriate path map table storage locations are marked busy, and the affected time—slot interchange units and the control memory 29 are notified.
• control unit 17 accumulates the call-related information and transmits a control message to central control 30 as indicated by the block 220 of FIG. 3.
• Central control 30 begins by comparing in step 221 the path map tables associated with the time multiplex line pair 13 and 15 and the time multiplex line pair 203 and 204. In accordance with the present example, no common idle time slot exists between these time multiplex line pairs.
• Central control 30 then proceeds to a block 222 where the path map table for time multiplex line pair 14 and 16 and time multiplex line pair 201 and 202 are compared. Also in accordance with our present example, no common idle time slot exists between these time multiplex line pairs.
• time multiplex line pair 203 and 204 are compared with the path map table of the time slot bridge. Again in accordance with our example, no common idle time slot exists. Accordingly, central control 30 proceeds to block 224 where the path map tables associated with time multiplex line pair 13 and 15 and time multiplex line pair 201 and 202 are compared with the path map table associated with the time slot bridge. If such a common idle time slot is found in block 224, central control continues with block 225 in which a connection is established as above-described utilizing the located common idle time slot. This connection is shown in FIG. 2 by the dotted lines connecting port 1 to the time slot bridge, i.e., 215, 216, which is in turn connected to port n + 1. However, if no common idle time slot is found during the performance of step 224, central control 30 proceeds to a step 226 during which busy is returned to the calling party since no possible time slot exists for communication between subscriber set 23 and subscriber set 2 .
• Each of the time multiplex line pairs is connected to its associated 32 by 32 switch by a link interface circuit.
• a link interface circuit 100 which is used to connect time multiplexed lines 13 and 15 to the 32 by 32 switch 206 is shown in FIG. 4.
• the link interfaces connected to all other time multiplexed line pairs, including the time-slot bridge, are substantially identical to link interface circuit 100.
• Link interface 100 includes a receiver 101, which receives data words serially transmitted from time-slot interchange unit 11 via time multiplexed line 13 and serially retransmits this information on a conductor 103 to a serial to parallel register 102.
• a clock recovery circuit 104 also receives the serial bit stream on conductor 103 and generates a 32.768 megahertz clock signal in response thereto. The clock signal generated by clock recovery circuit 104 is transmitted to a write
• SUBSTITUTE SHEET _ J . . address circuit 106 which generates a recurring sequence of 256 memory addresses.
• the addresses are generated by write address generator 106 at the rate of one address per time-slot and the addresses are in synchronism with data words applied to the serial to parallel register 102.
• a random access memory 107 receives the addresses from write address generator 106 and the data words held in serial to parallel register 102. Accordingly, each received data word is stored in random access memory 107 in a location defined by the write address generator 106.
• Each time- slot interchange unit includes a frame sequence generator (not shown), which generates a unique sequence of framing bits at the rate of one bit per time-slot. One of these framing bits is inserted in each data word transmitted to link interface 100.
• a frame check circuit 105 receives each framing bit of each data word transmitted on conductor 103, and determines if communication between time-slot interchange unit 11 and itself is in synchronism. If synchronism exists, no corrections are made, however, if synchronism is found not to exist, reframing is accomplished by communication with clock receiver circuit 104 in a manner well known in the art.
• Each link interface circuit, e.g. , 100 is connected to a time-shared space switch 108 which performs the actual 32 by 32 switching function. Time shared space division switch 108 operates in recurring frames of 256 time-slots to complete paths among its input and output ports.
• Control information defining the switching path between input and output ports to be connected during each time— slot is received during each time-slot on conductor 208.
• Each time-slot of operation has a numerical designation and during each given time-slot, the data word channel having the same numerical designation is to be switched. Accordingly, all data words in a channel having the given numerical designation must be transmitted to the time- shared space division switch 108 during their associated time—slot to avoid inaccurate switching. To this end,
• SUBSTITUTE SHEET master clock circuit 217 generates a recurring sequence of 256 read addresses which are transmitted to each random access memory 107 of each time multiplexed switch link interface substantially simultaneously.
• random access memory 107 and the equivalent random access memories included in all other link interfaces read data words associated with the same time-slot at substantially the same time.
• the data words read from random access memory 107 are transmitted to a parallel to serial shift register 110 from which they are transmitted to a time- shared space division switch 108.
• Time multiplexed switch link interface 100 includes a frame sequence generator 112 which generates a sequence of framing bits at the rate of one bit per time-slot. The framing bits are transmitted to a frame insert circuit 113, which places the frame bit in a predetermined bit position of each data word on conductor 111. Each data word on conductor 111 is then transmitted via driver circuit 114 to time-slot interchange unit 11 via time multiplexed line 15.
• the above description relates to the communication between a link interface 100 and a time-slot interchange unit, e.g. , 11.
• a time slot bridge (time multiplexed lines 215 and 216)
• the output driver 114 of a given link interface of 32 by 32 switch 205 is connected via time multiplexed line 215 to the receiver 101 of a given link interface of 32 by 32 switch 206.
• the driver 114 of the given link interface of 32 by 32 switch 206 is connected via time multiplex line 216 to the receiver 101 of the given link interface of 32 by 32 switch 205.
• FIG. 5 is a general block diagram of the switching system comprising a plurality of time-slot interchange units of which time—slot interchange units 220 and 221 are shown and four switch matrices 222 through 225.
• each bidirectional communication path e.g., 226, comprises a bidirectional time multiplex line pair substantially identical to the time multiplex line pair 13 and 15 (FIG. 1) .
• the present system further includes four time- slot bridges 227 through 230 each of which is used to bidirectional ly connect one of the switch matrices 222 through 225 to one other switch matrix.
• a common idle time-slot between two time-slot interchange units is first sought on time multiplex line pairs which are connected to the same switch matrix. If no such common idle time-slot can be found, a common idle time-slot is sought on time multiplex line pairs which are separated by one time-slot bridge. Before any time-slot can be used, it must, however, be idle also on the connecting time-slot bridge.
• a common idle time-slot can be sought involving time multiplex line pair 232, time-slot bridge 228, and time multiplex line pair 226. Further, if no common idle time—slot can be found for time multiplex line pairs separated by one time—slot bridge, a common idle time—slot can be sought between time multiplex line pairs separated by greater numbers of time-slot bridges.
• each switch matrix could be connected to another switch matrix by more than one time-slot bridge, or each switch matrix could be connected via separate time-slot bridges to all of the other switch matrices.
• symmetry in construction is not required. For example, some switch matrices may be connected to other switch matrices with a different number of time-slot bridges then connect other switch matrices and some or all of the time-slot interchange units may not be connected to all of the switch matrices.

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• Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

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• 1983
  • 1983-01-26 EP EP19830900770 patent/EP0115486A1/de not_active Withdrawn
  • 1983-01-26 WO PCT/US1983/000121 patent/WO1984000660A1/en not_active Application Discontinuation

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