EP0094040A2 - System zur synchronen Datenübertragung mit Hilfe eines amplitudenmodulierten Trägers konstanter Hüllkurve - Google Patents

System zur synchronen Datenübertragung mit Hilfe eines amplitudenmodulierten Trägers konstanter Hüllkurve Download PDF

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Publication number
EP0094040A2
EP0094040A2 EP83104429A EP83104429A EP0094040A2 EP 0094040 A2 EP0094040 A2 EP 0094040A2 EP 83104429 A EP83104429 A EP 83104429A EP 83104429 A EP83104429 A EP 83104429A EP 0094040 A2 EP0094040 A2 EP 0094040A2
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EP
European Patent Office
Prior art keywords
phase
baud
carrier
transmission
characteristic
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Application number
EP83104429A
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English (en)
French (fr)
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EP0094040A3 (en
EP0094040B1 (de
Inventor
Alain Boisseau
Claude Pivon
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Thales SA
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Sintra Alcatel SA
Thomson CSF SA
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Publication of EP0094040A2 publication Critical patent/EP0094040A2/de
Publication of EP0094040A3 publication Critical patent/EP0094040A3/fr
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Publication of EP0094040B1 publication Critical patent/EP0094040B1/de
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
    • H04L7/0062—Detection of the synchronisation error by features other than the received signal transition detection of error based on data decision error, e.g. Mueller type detection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2273—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals associated with quadrature demodulation, e.g. Costas loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock

Definitions

  • the present invention relates to synchronous data transmission systems by modulation of a carrier maintaining a constant envelope amplitude which are particularly well suited to radio links due to the constant power level of the carrier.
  • the data to be transmitted are converted alone, or in groups into successive symbols of duration at said Baud interval constituting the baseband signal and modulating in frequency or in phase a carrier of constant envelope amplitude.
  • Most systems of the aforementioned genre known under the names FSK (Frequence Shift-Keying) or PSK (Phase Shift-Keying) use symbols of simple rectangular shape.
  • each symbol corresponds to an increase or a decrease of ⁇ / 2 of the carrier phase which limits to two the number of possible states for each symbol and prevents an increase in the transmission speed by the adoption of a greater number of discrete values for the symbols emitted.
  • the object of the present invention is a system for transmitting data using a modulated carrier, of constant envelope amplitude, occupying a low frequency bandwidth having regard to its speed and not having the limitations of previously described systems.
  • It relates to a transmission system in which data are transmitted in series, individually or in groups, synchronously and correspond by coding to a limited number of discrete values of phase jumps of the carrier between characteristic instants separated by constant time intervals known as Bauds intervals during each of which, the carrier phase evolves continuously according to a law of variation ⁇ (t) - ⁇ ( 0 ) expressing itself, as a function of time T over the interval d 'a symbol in the form: in which the coefficient a is equal to the weighted sum of the phase jumps made during the last and penultimate symbols transmitted, the weighting being respectively 3/4 û and 3/16 ⁇ , and in which the coefficient b is equal at 9/4 ⁇ of the difference between the phase jump to be performed during the symbol considered and the product of the coefficient a by the duration ⁇ of a symbol.
  • phase variation laws can be stored in the form of groups of samples in a digital memory and selected from the phase jump to be carried out determined by the coding and from the two which preceded it.
  • phase variation law of the transmission carrier is extracted by a synchronous demodulation of the received signal.
  • this phase variation law is subtracted from a version of itself delayed by the duration of a symbol in order to deliver the instantaneous value of the phase jump performed by the carrier over the duration of a symbol.
  • phase jumps beginning and ending at the ends of the symbols and the appreciation of the drift between the transmission and reception carriers is done by a double correlation taking into account the fact that the sought phase jumps, distant from the duration of a symbol are the only ones to have the discrete values used at transmission for coding the data and to be assigned a continuous or very slightly variable component due to the drift between the transmission and reception carriers.
  • phase variation f (t) of the p or- teuse can be decomposed into the succession of phase variations ⁇ o (t) .. ⁇ n (t) of the carrier during each of these symbols: the origin of the symbol So being chosen as the origin of time and the function being conventionally defined by: 0 outside
  • the transmission signal emitted during a Sn symbol can be considered as the real part of the complex signal: ⁇ o being the frequency of the carrier before modulation and A the constant level of its envelope whose frequency spectrum V n ( ⁇ ) is expressed by the Fourier integral
  • the coefficients b n and c n are determined by the phase ⁇ n ( ⁇ ) to be obtained at the end of the symbol S n taking into account the desired phase variation and by minimizing the maximum slope of the phase law: or, depending on the phase jump n made during the symbol S n
  • the coefficient a is obtained by induction from the coefficient a n-1 of the previous symbol S n-1 by applying the relation 1 or again, on three successive symbols:
  • a synchronizable source 1 delivers in serial form the binary data to be transmitted and the applications. than to a transmitter 10 in radio link with a receiver 20 which restores them to use 18.
  • the transmitter 10 essentially comprises an encoder 2 which determines the phase jumps corresponding to the data to be transmitted as well as the usable phase variation law, a symbol synthesizer 3 controlled by the coder 2, a transmission time base 4 delivering the transmission carrier and various timing signals necessary for the synchronization of the data source 1, the coder 2 and the synthesizer 3, a modulator 5 angularly modulating the transmission carrier according to the phase variation laws generated by the symbol synthesizer 3, a low-pass filter 6 and possibly an amplification stage according to the usual technique of radio transmitters.
  • the receiver 20 comprises, in addition to an antenna input circuit 11, a synchronous demodulator 12 operating from a local carrier delivered by a reception time base 13, a predecoder 14 delivering the instantaneous value of the phase jump performed by the carrier over the duration of a symbol, a symbol rate recuperator and drift detector between transmission and reception carriers 15 generating from the signal delivered by the predecoder 14 and timing signals from the time base reception 13, a synchronous clock signal with the symbols transmitted and a signal for appreciating the drift between the transmission and reception carriers, a delay circuit 150 internal to the cadence recuperator and drift detector 15 which compensates the processing time of the latter and a decoder 17 connected to the output of the pre-decoding circuit 14 via the delay circuit 150 and controlled by the cadence recuperator and drift detector 15 which delivers the data received during use 18.
  • This transmission system corresponds to each dibit to be emitted a symbol during which a phase jump 0, + ⁇ / 2, - ⁇ / 2, ⁇ Y depends on the value of the dibit.
  • the freedom to choose the direction of the amplitude phase jump ⁇ comes from the periodicity 2 ⁇ of the trigonometric functions and is used to avoid the most costly phase jump successions in bandwidth (+ ⁇ , - ⁇ ) , (+ ⁇ / 2, - ⁇ ), ( ⁇ , + ⁇ ), (- 7 (/ 2, + ⁇ ).
  • phase jump is defined by a law of phase variation: whose coefficients a n , b n , C are determined as a function of the phase jump to be made ⁇ n and the phase jumps ⁇ n-1 and ⁇ n-2 made during the two symbols previously emitted by the formulas:
  • phase laws there are theoretically 125 possible phase laws (five to the power of three) but this number is reduced to 90 due to the prohibited successions of phase jumps and divided by two by reason of symmetry. This number is sufficiently low that one can store the laws of phase variations in sampled form in a digital memory.
  • FIG. 2 details the entirely digital constitution of the transmitter 10.
  • the flip-flops 23, 24 determine the directions of the phase jumps of ⁇ so as to avoid prohibited successions of jumps. They are sensitive to the values of the dibits corresponding to the phase jumps + ⁇ / 2 and - ⁇ / 2.
  • the appearance at the input of a flip-flop of a dibit value corresponding to a phase jump of + u / 2 places the output of the flip-flop in a state positively fixing any subsequent phase jump of ⁇ , that this jump of phase corresponds to the dibit available at the same instant on the output of the previous stage of the double shift register or to the dibit present at the next Baud instant at the input of the rocker.
  • Each dibit present on the outputs of the three stages of the shift registers 22 is therefore associated with an additional bit indicating the direction of a possible phase jump of ⁇ .
  • the ROM 25 ensures the reduction to 7 bits of the 8-bit addressing delivered by the outputs of flip-flops 23, 24 and of the double shift register 22 which is superabundant for a selection of one from 45.
  • the symbol synthesizer 3 is a read only memory organized in 45 pages and addressed at the level of all the pages by the encoder 2. Each page contains a sampling of the phase variation law corresponding to the configuration of dibits at the output of the register shift leading to its selection. This sampling is an approximation by steps of the same amplitude present or absent, positive or negative. It takes the form of a collection of dibits and is done close enough to allow quantification in small steps and limit the sampling noise. It includes for example, for each phase variation law 50 samples with a quantization step of ⁇ 10 °, which leads to a read-only memory with an average capacity of 4,500 bits.
  • the read-only memory of the symbol synthesizer 3 is addressed within each page using a counter 40 with seven digits reset to zero at the end of each Baud interval and incremented by the rectangular output signal of the modulator 5, the average frequency is 50 times the Baud rate.
  • the modulator 5 is a counter by thirty six which can also count by thirty five or thirty seven depending on the state of a two-bit command connected via a synchronization stage 6 to the read output of the memory of the symbol synthesizer 3. It receives a pilot frequency ⁇ 1 from the transmission time base 4 and delivers a rectangular signal whose average period 1 / ⁇ 2 equal to 36 / ⁇ 1 can be shortened by 1/36 (10 degrees) when counting by thirty five or increased by 1/36 (10 degrees) when counting by thirty seven.
  • the synchronization stage 6 is controlled by the output signal from the modulator 5 and does not allow a change in the division ratio until the start of each period of the output signal from the modulator 5.
  • the low-pass filter 6 filters the sampling noise of the phase variation laws. In practice, it is part of the phase control loop of a voltage controlled oscillator which optionally performs frequency translation and which generates the transmission signal.
  • the transmission time base 4 generates the timing signals necessary for the data source 1, the coder 2 and the symbol synthesizer 3 from a single oscillator which delivers the pilot frequency w 1.
  • the Baud 1 / ⁇ cadence or symbol frequency is in a 1800 ratio with the pilot frequency w 1 (50 x 36). It is obtained using two cascade dividers, one 42 dividing by 900 and providing a clock signal H 1 at the data rate which is used to synchronize the data source 1 and the parallel serial converter 21, l other 43 dividing by 2 and supplying a clock signal H 2 , at the rate Baud 1 / A used for clocking the double shift register 21 and for resetting the counter 40 addressing the memory of the symbol synthesizer 3 at the level of each page. This reset signal resynchronizes the reading of a page from the memory of synthesizer 3 at the Baud rate.
  • this reading is done asynchronously because of the phase modulation affecting its timing signal.
  • Resynchronization can either shorten the reading of a page by causing the first sample to be omitted or prolong the reading of a page by causing the first sample to be read twice.
  • Figure 3 details the constitution of the receiver 2 with the exception of the circuits arranged between the antenna and the demodulator of conventional technique, which are not part of the present invention.
  • the synchronous demodulator 12 consists of a programmable divider 120 operating in phase modulator and of a comparator of phase 121 slaving in phase, by means of the programmable divider 120 a local carrier on the output signal of the transmission modulator 5 reaching it by the circuits of the reception antenna.
  • the phase comparator 121 receives on its two inputs a version of the output signal of the modulator 5 of the transmitter from the circuits of the receiving antenna and a local carrier delivered by the programmable divider 120. It provides on two separate outputs two binary signals representative, one of a decrease in the phase difference between its two input signals and the other of an increase, used to fix the division ratio of the programmable divider 120.
  • the programmable divider 120 has a division ratio equal to 36 ⁇ 1 fixed by the phase comparator 121 to 37 or respectively 35 or 36 when the latter detects a decrease or respectively an increase or a maintenance of phase difference. It receives from the reception time base 13 a pilot frequency ⁇ ′ 1 equal to the transmission pilot frequency uJ 1 . It outputs a signal with the same average period ⁇ 1/36, except for the drift between the pilot frequencies ⁇ 1 and ⁇ ' 1 , as the output signal of the transmission modulator 5 arriving via the receiving antenna circuits to the phase comparator 121. When the phase comparator 121 detects an increasing phase difference, the period of its output signal is shortened by 1/36 which amounts to a phase shift of -10 degrees going against this increase.
  • phase comparator 121 detects a decreasing phase difference
  • the period of its output signal is lengthened by 1/36 which amounts to a phase shift of +10 degrees going against the decrease of phase deviation.
  • the elementary phase jumps of: 10 degrees detected by the phase comparator 121 of the demodulator 12 are applied to a precoding circuit 15 developing the overall value of the phase jump effected since the duration ⁇ of a Baud interval and sampling this value fifteen times per period Baud
  • This precoding circuit 14 includes a binary up-down counter 140 with a capacity of six bits, looped on itself, counting and down counting in addition to two between ⁇ 18 at the rate of the output signals of the phase comparator 121 and reproducing, at a constant and drift between the pilot frequencies ⁇ 1 , ⁇ ' 1 close, the law of modulation of emission phase.
  • a shift register 141 with serial input and output with six parallel bits and fifteen stages is connected to the output of this binary up-down counter 140 and clocked by a clock signal H 3 having fifteen times the frequency Baud 1 / ⁇ .
  • a digital subtractor 142 differentiates between the input and output signals of the fifteen-stage shift register 141 and delivers the output signal from the pre-decoding circuit 14.
  • phase jump made on transmission during a symbol and from which one can identify the transmitted dibit corresponds, if one disregards the quantification introduced by the periodicity of the sampling and the drift between the pilot frequencies ⁇ 1 and ⁇ ' 1 to one of the fifteen samples delivered during each Baud period.
  • the sampling is sufficiently dense during each baud period that its effect is neglected.
  • the drift between the pilot frequencies ⁇ 1 and ⁇ ' 1 results, on the detected phase jump values, by a continuous or slightly variable component independent of the value of the transmission phase jumps. To determine the value of this continuous component and the rank among fifteen of the samples of the pre-decoding output signal which correspond to phase jumps between the start and end of symbols, a double correlation is carried out over the duration of a certain number of symbols.
  • phase jump samples received corresponding to phase jumps between the beginning and the end of the symbol affected by the continuous component due to the drift between the pilot frequencies ⁇ 1 and uV ' 1 are all part of the same class which does not is not the case of the others given the variety of forms that can take the law of phase variation during a symbol.
  • This class is the most populated and is identified by the enumeration of the elements of the different classes resulting from the correlation.
  • the correlator 15 which performs this processing includes a shift register 150 with serial input and output of 6 parallel bits and 720 stages which stores over a duration of 48 symbols the phase jumps delivered by the precoding circuit 14 so as to be able to make enter each phase jump in the correlation as soon as it appears at the output of the precoding circuit 14 and remove it after a delay of 48 symbols.
  • This shift register 150 is clocked in synchronism with the shift register 141 of the precoding circuit 14 by the clock signal H 3 . Its inputs and outputs are connected to two identical transcoding memories 151 and 152 which determine the deviation of each phase jump value from the closest threshold value 0, ⁇ ⁇ / 2, ⁇ ⁇ and makes it correspond a four-bit binary number.
  • the outputs of these read-only memories 151 and 152 lead to a selector with two four-bit inputs 154 actuated at a rate thirty times higher than the Baud rate thanks to a clock signal H 4 at the double frequency of the clock signal H 3 .
  • This selector 154 allows, during the duration of presentation ⁇ / 15 of each phase jump sample at the output of the precoding circuit 14, to bring said sample into the correlation first and to leave it in a second step. previous sample of 48 symbols.
  • a random access memory 155 stores the occupancy accounts of the different correlation classes. Its double index addressing is carried out on the one hand, by the output signal of the selector 154 which makes a first selection at the level of the correlation categories, that is to say as a function of the criterion on the deviation from the closest threshold value and on the other hand, by the output signal of a counter by fifteen with output of five parallel bits 156 which makes a second selection within the categories according to the rank among fifteen of each sample and which is incremented by the clock signal H 3 .
  • This random access memory 155 is connected by a bidirectional data bus to a calculation unit 157 which updates the occupancy accounts of the different correlation classes.
  • the computing unit 157 can either increment or decrement by a unit the data which come to it from the RAM 155. It comprises an increment command and a decrement command controlled jointly, one directly, the other by means of an inverter 158 by the clock signal H 4 addressing the selector 154 as well as a control input connected in parallel with the read or write command from the RAM 155 and controlled by a signal of clock H 5 at the frequency quadruple of the frequency H 3 .
  • a period of the clock signal H 3 represents the duration of presentation of a phase jump sample at the output of the pre-decoding circuit 14.
  • the random access memory 155 is in reading, its addressing being controlled by the phase jump sample present at the output of the precoding circuit 14 the computing unit 157 which has the order to proceed to an incrementing takes the account value read in the RAM 155 and increases it by one unit .
  • the random access memory 155 whose addressing has not changed changes to writing and stores the new account value delivered by the computing unit 157.
  • the random access memory 155 returns to reading, the selector 154 switches the addressing of the random access memory 155 under the control of the phase jump sample at the output of the shift register 150 prior to the preceding 48-symbol precedent and the calculation unit 157 which receives a decrement order, reads the account value read from the RAM 155 and decreases it by one.
  • the RAM 155 whose addressing has not changed changes to writing and stores the new account value delivered by the computing unit 157.
  • the total sum of the different accounts stored in the RAM 155 remains constantly equal to the number of 720 which corresponds to the number of samples taken into account in the double correlation. Only the distribution of the components of this sum within the diffe rentes classes evolves as a function of the position of the symbols with respect to the clock signal H 3 and of the drift between the pilot frequencies of emission w and reception ⁇ ' 1 .
  • a maximum detector makes it possible to determine at all times the correlation class having the most important account. It comprises an address memory register 159 connected in parallel on the addressing of the RAM 155, a data memory register 160 connected in parallel on the data bus connecting the calculation unit 157 to the RAM 155, a address comparator with two inputs 161 connected to the address lines of the random access memory 155 and at the output of the address memory register 159 detecting the equality between two addresses applied to its inputs and a data comparator with two inputs 162 connected to the data bus and to the output of the data memory register 160 detecting the superiority of the data present on the address bus compared to that written in the data memory register 160.
  • the data comparator 162 is activated by the clock signal H each time the RAM 155 is written. It commands the loading of the data memory register 160 and of the address memory register 159 each time that it detects the presence on the data bus of a datum of amplitude greater than that written in the data memory register 160 ensuring thus the conservation in the address memory register of the addressing of the correlation class having the most important account.
  • the address comparator 159 is also activated by the clock signal H 5 each time the random access memory 155 is being written. It commands the loading of the data memory register 160 each time the account it stores is updated.
  • the highest count is effectively determined, although there is not a systematic scan of the RAM 155 since the highest count is necessarily the most addressed during the distribution of the samples.
  • the address of this account which is stored in the address memory register 159 gives the rank among fifteen, the most probable of the phase jump samples coinciding with the ends of the symbols emitted as well as the most probable continuous component value. due to the drift between pilo frequencies tes ⁇ 1 and ⁇ ' 1 for transmission and reception. It is used by the decoder 17 for the choice of samples and threshold values.
  • the decoder 17 comprises at input a shift register 170 with six parallel bits with fifteen stages serial input and parallel outputs which is connected following the shift register 150 of the correlator and clocked in synchronism with the latter by the clock signal H 3 .
  • a selector 171 with fifteen inputs is connected to the parallel outputs of the shift register 170. I1 is addressed by the part of the output signal from the address memory register 159 relating to the choice of the rank among fifteen and delivers as output all Baud intervals , the phase jump sample among the fifteen spanning a Baud interval which coincides with the ends of a symbol.
  • a serial parallel converter 173 connected following the decoding read-only memory 172 ensures the multiplexing of the dibits and a resynchronization of the data on a clock signal H ′ 1 at twice the Baud rate.
  • the reception time base 13 delivers all of the timing signals necessary for the different parts of the receiver from a single oscillator 130 and from a series of dividers.
  • the oscillator 130 delivers the pilot reception frequency ⁇ ' 1 .
  • it is provided with a servo loop making it possible to limit its drift with respect to the pilot emission frequency ⁇ 1 and using the drift estimate provided by the correlator 15.
  • It is for example an oscillator controlled in controlled voltage by an integrator circuit with an up-down counter and a digital-analog converter 131 providing it with an incremented or decremented voltage at regular period as a function of the sign and the amplitude of the drift observed.
  • the clock signal H whose cadence must be fifteen times the Baud cadence is taken from the pilot reception frequency pilote ′ 1 which is, like the transmitting pilot frequency ⁇ 1 , at 1800 times the Baud cadence by a division of report 120.
  • the clock signal H4 which is at the Double frequency of the clock signal H 3 is taken from the reception of pilot frequency ⁇ '1 by a dividing ratio 60.
  • the watch-making e g H 5 signal which is at a quadruple frequency of the clock signal H 3 is taken from the reception pilot frequency by dividing the ratio 30.
  • the clock signal H ' 1 at the data rate twice the Baud rate is taken from the reception pilot frequency' 1 by a report division 900.
  • the transmission system which has just been described proves to be particularly advantageous in the case of a data transmission at 16K bits / s which it allows to perform in a 25 kHz channel with attenuation outside the channel. of the order of 50 db. Its receiver adapts to any type of modulation by differential phase jumps and is not sensitive to the forms of phase laws. It is particularly interesting because it does not require a learning sequence for the synchronization of the local carrier and the reception clock so that it can be used for the reception of a transmission of short duration of the order of a hundred symbols.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
EP83104429A 1982-05-10 1983-05-05 System zur synchronen Datenübertragung mit Hilfe eines amplitudenmodulierten Trägers konstanter Hüllkurve Expired EP0094040B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8208043A FR2526617A1 (fr) 1982-05-10 1982-05-10 Systeme de transmission synchrone de donnees a l'aide d'une porteuse modulee d'amplitude d'enveloppe constante
FR8208043 1982-05-10

Publications (3)

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EP0094040A2 true EP0094040A2 (de) 1983-11-16
EP0094040A3 EP0094040A3 (en) 1985-05-29
EP0094040B1 EP0094040B1 (de) 1988-07-06

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EP83104429A Expired EP0094040B1 (de) 1982-05-10 1983-05-05 System zur synchronen Datenübertragung mit Hilfe eines amplitudenmodulierten Trägers konstanter Hüllkurve

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US (1) US4583238A (de)
EP (1) EP0094040B1 (de)
DE (1) DE3377325D1 (de)
FR (1) FR2526617A1 (de)
GR (1) GR77494B (de)

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FR2591828A1 (fr) * 1985-12-13 1987-06-19 Thomson Csf Dispositif de modulation d'une frequence porteuse par sauts de phase ou de frequence
FR2633470A1 (fr) * 1988-06-24 1989-12-29 Thomson Csf Procede de demodulation et demodulateur de signaux numeriques d'amplitude d'enveloppe constante modules en phase et/ou en frequence de facon continue
EP0400782A2 (de) * 1989-05-31 1990-12-05 Nokia Mobile Phones (U.K.) Limited Verschiebungskorrektur
WO1993006677A1 (fr) * 1991-09-26 1993-04-01 Alcatel Telspace Procede de transmission numerique et recepteur a conversion directe

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US4644561A (en) * 1985-03-20 1987-02-17 International Mobile Machines Corp. Modem for RF subscriber telephone system
US5027372A (en) * 1987-03-04 1991-06-25 National Semiconductor Corp. Differential phase shift keying modulator
US5321799A (en) * 1992-04-17 1994-06-14 Proxim, Inc. Signalling transition control in a modulated-signal communications system
WO1995034990A1 (en) * 1994-06-15 1995-12-21 Rca Thomson Licensing Corporation Synchronizing a packetized digital datastream to an output processor in a television signal processing system
JP6865856B2 (ja) * 2017-12-12 2021-04-28 三菱電機株式会社 光通信装置、制御方法、及び制御プログラム

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IEEE TRANS. ON VEHICULAR TECHNOLOGY, vol. VT-30, no. 3, aout 1981, New York, US SHIGERU ASAKAWA et al.: "A compact spectrum constant envelope digital phase modulation", pages 102-111 *

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2591828A1 (fr) * 1985-12-13 1987-06-19 Thomson Csf Dispositif de modulation d'une frequence porteuse par sauts de phase ou de frequence
EP0226514A1 (de) * 1985-12-13 1987-06-24 Thomson-Csf Anordnung zur Phasen- oder Frequenzumtastung einer Trägerschwingung
FR2633470A1 (fr) * 1988-06-24 1989-12-29 Thomson Csf Procede de demodulation et demodulateur de signaux numeriques d'amplitude d'enveloppe constante modules en phase et/ou en frequence de facon continue
EP0353109A1 (de) * 1988-06-24 1990-01-31 Thomson-Csf Verfahren zur Demodulation und Demodulator für mit Hilfe eines Trägers konstanter Umhüllungsamplitude modulierte digitale Signale, die in Phase und/oder Frequenz kontinuierlich moduliert werden
US5020080A (en) * 1988-06-24 1991-05-28 Thomson-Csf Demodulation method and demodulator for digital signals with amplitudes of constant envelope, continuously modulated in phase and/or in frequency
EP0400782A2 (de) * 1989-05-31 1990-12-05 Nokia Mobile Phones (U.K.) Limited Verschiebungskorrektur
EP0400782A3 (de) * 1989-05-31 1992-03-18 Nokia Mobile Phones (U.K.) Limited Verschiebungskorrektur
WO1993006677A1 (fr) * 1991-09-26 1993-04-01 Alcatel Telspace Procede de transmission numerique et recepteur a conversion directe
FR2681994A1 (fr) * 1991-09-26 1993-04-02 Alcatel Telspace Dispositif de transmission numerique comportant un recepteur a demodulation coherente realisee directement en hyperfrequence.
US5416803A (en) * 1991-09-26 1995-05-16 Alcatel Telspace Process for digital transmission and direct conversion receiver
AU663122B2 (en) * 1991-09-26 1995-09-28 Alcatel N.V. Process for digital transmission and direct conversion receiver

Also Published As

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EP0094040A3 (en) 1985-05-29
EP0094040B1 (de) 1988-07-06
FR2526617A1 (fr) 1983-11-10
US4583238A (en) 1986-04-15
DE3377325D1 (en) 1988-08-11
GR77494B (de) 1984-09-24

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