EP0069518B1 - Nach dem Rasterverfahren arbeitendes Videosichtgerät - Google Patents

Nach dem Rasterverfahren arbeitendes Videosichtgerät Download PDF

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Publication number
EP0069518B1
EP0069518B1 EP82303343A EP82303343A EP0069518B1 EP 0069518 B1 EP0069518 B1 EP 0069518B1 EP 82303343 A EP82303343 A EP 82303343A EP 82303343 A EP82303343 A EP 82303343A EP 0069518 B1 EP0069518 B1 EP 0069518B1
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EP
European Patent Office
Prior art keywords
row
rdb
displayed
character
characters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
EP82303343A
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English (en)
French (fr)
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EP0069518A3 (en
EP0069518A2 (de
Inventor
Glenn E. Hunt
Michael C. Alexander
Robert S. Gittins
Gerald L. Lozano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EMC Corp
Original Assignee
Data General Corp
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Filing date
Publication date
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Publication of EP0069518A2 publication Critical patent/EP0069518A2/de
Publication of EP0069518A3 publication Critical patent/EP0069518A3/en
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Publication of EP0069518B1 publication Critical patent/EP0069518B1/de
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/22—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of characters or indicia using display control signals derived from coded signals representing the characters or indicia, e.g. with a character-code memory
    • G09G5/222—Control of the character-code memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/34—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators for rolling or scrolling
    • G09G5/343—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators for rolling or scrolling for systems having a character code-mapped display memory

Definitions

  • the present invention relates to a raster scan video display terminal, as set forth in the .introductory part of claim 1.
  • the image on a CRT is generated by using an electron beam to stimulate selected areas of a phosphorescent material located on the inside of the CRT screen.
  • the scanning of the CRT face is accomplished by deflecting the electron beam relatively rapidly in one direction, usually horizontal, and relatively slowly in a second direction, usually vertical.
  • the phosphorescent material on the screen is continuous, but the screen can be considered to consist of a large number of generally horizontal, parallel "raster lines” or lines of displayed information.
  • the information about the level of stimulation to be given a particular area on the raster line is updated at fixed intervals in accordance with a clock pulse or "dot clock". Therefore, each raster line can be further considered to be a series of discrete segments or "dots" which are individually stimulatable by the electron beam.
  • the electron beam normally performs 50 or 60 "frames" or complete scans of the CRT screen per second, depending on the external electrical power available. From the viewpoint of an observer facing the screen the beam begins a frame at the left side of the top raster line of the CRT and moves substantially horizontally along the line to the right side of the screen stimulating each dot to the appropriate level to create the desired image. The beam then performs a horizontal retrace to the left side of the next lower raster line and again begins to scan horizontally to the right. This continues until the beam reaches the right side of the lowest raster line, at which time a vertical retrace is performed during which the beam moves back to the beginning of the top raster line to begin the next frame. No information is displayed during either horizontal or vertical retrace.
  • a problem in the prior art is the extremely high work load of the CPU which can result from user changes to the display.
  • data to be displayed is commonly stored in sequential memory locations in terminal memory.
  • the first character to be displayed i.e. the leftmost character of the top row
  • the leftmost character of displayed row 2 is stored in the memory location immediately following the rightmost character of row 1, and so on, with the rightmost character of the last row being the end of the "string". If, for example, a character is to be inserted into the display and therefore inserted into the "string" of characters sequentially stored in memory, the addresses of all characters following the insertion must be changed to reflect their new position in the string.
  • a retailed prior art problem is the high processor workload resulting from the method of performing vertical or horizontal scrolling.
  • the avoid display degradation or delays, prior art terminals which provide scrolling capability must use a processor capable of performing the data movements required under the prior art method.
  • EP 0031011 describes a terminal according to the introductory part of claim 1, with a separate table of addresses for the rows of characters, whereby such operations as scrolling require manipulation of the table only, rather than the stored rows of characters.
  • the addresses in the table have to be maintained correctly, in sequential order as they are accessed sequentially.
  • the object of the present invention is to provide a terminal which simplifies screen manipulation even further and opens up possibilities for much more flexible screen handling, including smooth scrolling.
  • the terminal according to the invention is defined in the characterising part of claim 1.
  • the display information for a row need only be stored if the content of the display information for that row is changed. This applies equally to the row description information. Updating can take place during vertical retrace.
  • the display information can be retrieved by repeating for each row the steps of reading from the description information in the memory the memory address of the information to be displayed on the row, reading from memory the information to be displayed on the row, and reading from the memory the pointer address of the description information pertaining to the next row.
  • the method of retrieval and display of information can involve repeating for each row the steps of transferring the information to be displayed to buffers while simultaneously displaying the first raster line of the row, displaying the remaining raster.
  • the row description information for each row can include the information related to the address of the first character to be displayed on the row; the first raster line to be displayed within the row; the number of raster lines to be displayed with the row; control information related to vertical synchronization, end of frame identification and blanking of the display during vertical retrace; and the pointer address of the row description information for the next row to be displayed.
  • Such row description information allows smooth vertical scrolling by changing the first raster line and number of raster lines to be displayed. Moreover, the row description information allows horizontal scrolling without requiring changes to stored character information, simply by changing the first character addressed in the row description informations.
  • the row description information also allows for control of vertical synchronization, display density, display blanking identification of the end of the frame.
  • a terminal having specific parameters will be used as the basis for discussion, but it should be understood that the invention is not limited to a single specific set of numbers or dimensions. Obviously, many terminal parameters will depend on such factors as CRT size, semiconductor operating limitations and monitor performance characteristics. Therefore, the following discussion will assume a terminal having 288 total displayed scan lines.
  • the displayed scan lines allow 24 displayed horizontal "rows" of characters of 12 scan lines each. Within each row, the displayed character occupies scan lines 2 through 10 (i.e., character height is 9 scan lines). If 22 scan line times occur during vertical retrace while no information is being displayed, the terminal can be viewed as cyclicly performing 310 (288 + 22) horizontal scans per vertical scan line.
  • FIG. 1 an overflow of the internal logic of an intelligent video display terminal is shown.
  • CPU 100 interfaces with Character Data Bus 191 via bidirectional buffer 110, System Data Bus 192 via bidirectional buffer 111, Attribute Data Bus 193 via bidirectional buffer 112 and Downline Loadable Character Bus 194 via bidirectional buffer 113.
  • Buffers 110 and 112 each interface a different address space of RAM (Random Access Memory) 150 to CPU 100.
  • Data are transferred over Character Data Bus 191 to Address Latches 300, Ram 150, Video Control Logic 200 and Video Character Generation Logic 250.
  • Data related to the various system devices with which the terminal may interface is carried via System Data Bus 192 to and from System Devices Logic 130.
  • Attribute Data Bus 193 Data specifying the attributes (e.g. dim, blink, underscore, inverse) of the characters to be displayed are transferred via Attribute Data Bus 193 to RAM 150 and Video Character Generation Logic 250.
  • Downline Loadable Character Bus 194 allows terminal users to transfer their own unique characters to CPU 100 for display.
  • Address bus 195 is connected to Address Latches 300, Decoders 120, System Devices Logic 130, Buffers 140 and RAM 150.
  • Decoder Logic 120 contains logic to decode the information on Address Bus 195 to determine which, if any, system device is being addressed.
  • Buffers 140 provide the appropriate TTL to MOS interface, as required by RAM 150 and some elements of System Devices 130 (e.g. ROM's).
  • Video Control Logic 200 is connected to CPU 100, Address Latches 300, Buffer 110, Line Buffers 160, Video Timing Logic 400, Latch 170, Ram 150, Video Character Generation Logic 250 and CRT Monitor 180.
  • Video Character Generation Logic 250 is connected to Buffers 110 and 112, Line Buffers 160, Video Timing 400, Latch 170, and RAM 150.
  • CPU 100 is connected via System Device Logic 130 to the host computer (not shown) external to the terminal and communicates with the host over System Data Bus 192.
  • Video Control Logic 200 generates the horizontal synchronization signal for the monitor drive electronics; provides synchronization between CPU 100 and RAM 150; controls the transfer of information from RAM 150 to Character Generation Logic 250 and Line Buffers 161-164; and prevents access by CPU 100 to RAM 150 during transfers of display information (described below) to Line Counter 203, Raster Counter 254, Status Latch 202, and Line Buffers 161-164.
  • CPU 100 controls Video Control Logic 200 only by means of a discrete halt line, which is used during initial setup of the display information after a hardware restart.
  • Character Generator Logic 250 receives character and attribute data from data buses 191 and 193 and from Line Buffers 161-164, control information from Video Control Logic 200, and timing signals from Timing Logic 400 (not shown in Fig. 2). Character Generation Logic 250 combines the character, attribute and control information and generates the dot pattern for transmission to monitor 180.
  • State Counter 201 counts the character time periods during each scan line and provides the character count to State Machine 210.
  • Line Counter 203 receives information from Character Data Bus 191 and notifies State Machine 210 when the first scan line of each character row is being displayed.
  • Status Latch 202 under control of State Machine 210, provides an interrupt signal to State Machine 210, character format information to Latch 220, a vertical sync signal to Latch 170 and a vertical blanking signal to Attribute Encoding Logic 263.
  • State Machine 210 provides control signals to CPU 100, Adress Latches 300 and State Counter 201. State Machine 210 also supplies the horizontal synchronization signal to Latch 220.
  • Character Latch 251 receives character, data from bus 191 on the first scan line of each character row. This data is supplied simultaneously to Line Buffers 161 and 162 and Character Latches 252. Similarly Attribute Latch 261 receives attribute data from bus 193 during the first scan line of each character row and supplies it simultaneously to Line Buffers 163 and 164 and Attribute Latch 262.
  • Raster Counter 254 under State Machine 210 control, receives raster address information from bus 191. This information is supplied to Character Generator 253, which also receives the character information from Latches 252. Similarly, Raster Counter 254 is connected to Attribute Encoding Logic 263, as is Attribute Latch 262.
  • the output of Character Generator 253 is provided to Shift Registers 271.
  • the output of Attribute Encoding Logic 263 is provided to latch 270, two outputs of which are supplied to Gates 280 where they are combined with the outputs of Shift Registers 271.
  • a third output of Latch 270 is supplied directly to Latch 170 along with the vertical synchronization signal from Status Latch 202 and the output of Gates 280.
  • This terminal embodiment allocates 8K bytes of RAM 150 for storage of attribute and character information. This memory space allows CPU 100 to store character and attribute information for 162 characters in RAM 150 for each of the 25 character rows.
  • CPU 100 will update and store the row information from which the display will be created during the next vertical scan.
  • This row data (character and attribute) is organized on a row basis, rather than a screen basis. That is, each row of characters is stored in consecutive memory locations, but the rows are not arranged in any particular order. They are, instead, "linked" by means of RDB's (Row Descriptor Blocks), also assembled by CPU 100.
  • Each character row has associated with it one RDB consisting of five 8-bit bytes of information.
  • the first, or Status byte contains the information about row format (81 or 135 character line), end of frame, vertical synchronization and vertical blanking.
  • the second, or scroll, byte contains information about which scan line in the character row will be the first to be displayed and how many scan lines of the character row will be displayed. This information enables "smooth" vertical scrolling by allowing less than the entire character row to be displayed during a frame.
  • the third and fourth bytes contain the starting address in RAM 150 of the 81 or 135 characters (depending on the format identified in the Status byte) to be displayed on that row.
  • the fifth, or Next RDB, byte is a pointer to the next RDB. That is, it contains the address of the next RDB to be used. Since the 8 bits of the Next RDB byte allow only 256 addresses, the RDB's are placed in the lowest memory locations in RAM 150. With five bytes per RDB, up to 51 possible RDBs can be used.
  • RDB's Moving displayed rows on the screen requires only that the RDB's be "relinked". That is, that the Next RDB bytes be changed. With 24 rows of character information, there will be 24 linked row RDB's.
  • three vertical retrace RDB's are inserted after the last displayed row. These retrace RDB's do not display any information and cover a total of 22 scan lines (i.e. the retrace period).
  • the last retrace RDB points to the RDB of the first displayed row.
  • the complete RDB list will contain either 27 RDB's (24 + 3), if 24 rows are completely displayed, or 28 RDB's (25 + 3) if scrolling is underway and two rows are only partially displayed.
  • a possible linking situation is shown in Fig. 3.
  • RDB1 is chosen to always reside in the lowest memory location.
  • the RDB's in Fig. 3 are shown in the order of displayed character rows. That is, bytes three and four of RDB1 contain the starting memory address of displayed row 1 and the Next RDB byte (byte five in this embodiment) contains the address of RDB5. Bytes three and four of RDB5 contain the starting memory address of displayed row 2 and the Next RDB byte contains the address of RDB3. The remaining RDB's are similarly linked.
  • RDB28 in this example is the last character row and, therefore, the Next RDB byte of RDB28 contains the address of the first of three vertical retrace RDB's. The third vertical retrace RDB points back to RDB1.
  • smooth scrolling either up or down can be performed for all displayed rows on the screen or a subset thereof selected by a terminal user.
  • the scroll byte of each RDB contains information about which of the 12 scan lines in the row will be the first to be displayed and how many of the lines will be displayed. Smooth scrolling can be accomplished by modifying the scroll bytes of the RDB's associated with the top and bottom character rows in the scroll area and relinking the RDB's as required.
  • Fig. 4 presents an illustrative example of RDB activity related to vertical scrolling at a rate of one scan line every frame.
  • RDB reference numbers and RDB linkage order shown is of no particular importance beyond this example.
  • the numbers inside the RDB boxes in Fig. 4 indicate the data in the scroll byte of that RDB. Specifically, the total number of scan lines of that character row to be displayed and the starting scan line within the row are given. For example, looking at RDB7 in Fig. 4,12/1 indicates that all 12 scan lines of the character row will be displayed starting with the first (i.e. top) line.
  • Each of the columns in Fig. 4 shows a segment of the 'list" of linked RDB's.
  • Frame n assume upward vertical scrolling of the screen area now occupied by the character rows associated with RDB12 and RDB9, i.e. a scrolling space 24 scan lines high, is about to begin.
  • Frame n there are a total of 27 RDB's linked as described earlier.
  • Frame n + 1 shows that during a scrolling operation two character rows will normally be only partially displayed, requiring that an additional RDB be linked into the RDB list.
  • the total number of displayed scan lines in the scroll area is constant (24, in this example).
  • CPU 100 will load the appropriate locations of RAM 150 with the information for the new RDB (in this example RDB 20) and with the character and attribute information for the row now associated with that RDB.
  • the scroll byte of RDB 12 must be modified to indicate that only 11 scan lines, beginning with line 2, will be displayed and the Next RDB byte of RDB9 must be modified to point to RDB 20 instead of RDB 11.
  • the Next RDB byte of RDB 20 will contain the address of RDB 11.
  • Modification of the scroll byte of RDB12 and RDB20 continues in this manner until the vertical retrace prior to Frame n + 12. Since the RDB12 character row has now been completely scrolled "off" the screen RDB12 is removed from the RDB linked sequence and the Next RDB byte of RDB7 is modified to point to RDB9. To the user, the display has scrolled upward by one character row. At the next vertical retrace, a new RDB (in this example, RDB 12) is linked into the list and the process described above for Frame n + 1 is repeated.
  • this technique will result in a scrolling rate of 60 scan lines (i.e. five character rows) per second.
  • Other scrolling rates can be achieved.
  • a 10 row per second rate can be obtained by modifying the scroll bytes by two scan lines per frame rather than one as in Fig. 4.
  • Fig. 5 presents an illustrative example of downward scrolling at two scan lines per frame.
  • the relinking and scroll byte modification is similar to that described above for upward scrolling except that the new RDB is linked in at above the other RDB's of the rows in the scroll area rather than after. Since scrolling is being performed at 2 scan lines per frame, the row associated with the bottom row in the scroll area (RDB9 in this example) will be completely removed from the screen in 5 frames rather than 10, as in the example of Fig. 4.
  • This terminal also has the capability for horizontal scrolling of displayed information. Horizontal scrolling is accomplished by changing the starting memory address (RDB bytes three and four) for that row.
  • RAM 150 contains 162 characters for each row, of which only an 81 or 135 character subset is displayed at any one time. Changing the contents of RDB bytes three and four causes a different subset of the 162 characters available in RAM 150 to be loaded into Line Buffers 161-164 for display. The actual character data in RAM 150 therefore need not be changed during the horizontal scrolling process.
  • the format for each row is independent of the format of any other row and is determined by the format information stored in the Status byte (byte one in this implementation) of the RDB for that row. Any combination of the display formats can, therefore, be set up by CPU 100 during vertical retrace.
  • the actions necessary to progress from character row to character row during vertical scan are controlled by Video Control Logic 200.
  • Video Control Logic 200 will request CPU 100 to relinquish bus control; will obtain status, raster and address information from the next RDB; will transfer the character and attribute information for the row to Line Buffers 161-164; and will release CPU 100 prior to the end of the first scan line of the following row.
  • the three vertical retrace RDB's are designed to maintain proper operation and synchronization during the retrace time period until the next vertical scan begins.
  • the particular character information in Line Buffers 161-164 during vertical retrace is irrelevant since the blanking bit of the Status byte of the three vertical retrace RDB's is set to preclude display of any information during this period.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Digital Computer Display Output (AREA)

Claims (12)

1. Nach dem Rasterverfahren arbeitendes Videosichtgerät, enthaltend eine Speichereinrichtung (150) zum Speichern einer Vielzahl von sichtbar zu machenden Zeichenreihen, einen Zwischenspeicher (160) zum Speichern einer Zeichenreihe während der Zeilenabtastungen, in denen diese sichtbar gemacht wird, einen Punktmatrixzeichengenerator (253), der auf den Inhalt des Zwischenspeichers anspricht, eine Zeilenzähleinrichtung (203) zur Erzeugung eines Videosignals zur Sichtbarmachung der Zeichen, Übertragungsmittel (200, 300) zur Übertragung von Zeichen Reihe für Reihe aus der Speichereinrichtung zum Zwischenspeicher während jedes Bildes der Rasterabtastung, und eine gespeicherte Tabelle der Adressen der ersten Zeichen der Zeichenreihen, dadurch gekennzeichnet, daß die Speichereinrichtung (150) bei Adressen, die unabhängig von den zu den Zeichenreihen gehörenden Adressen sind, auch je einen Satz von Reihenbeschreibungsblöcken (RDB) für jede Zeichenreihe Speichert, wobei jeder Reihenbeschreibungsblock Informationen speichert, die die Adresse des ersten sichtbar zu machenden Zeichens in der entsprechenden Reihe und eine Zeigeradresse für den Beschreibungsblock der nächsten sichtbar zu machenden Reihe speichert, und daß die Übertragungsmittel (200, 300) bezüglich jeder Reihe auf die Adressen der ersten Zeichen in dem Reihenbeschreibungsblock ansprechen, auf den durch den Reihenbeschreibungsblock für die vorhergehende Reihe gezeigt wird.
2. Videosichtgerät nach Anspruch 1, dadurch gekennzeichnet, daß die Speichereinrichtung (150) während der vertikalen Rücklaufintervalle der Abtastung aktualisiert wird.
3. Videosichtgerät nach Anspruch 2, dadurch gekennzeichnet, daß nur Reihen, die sich ändern, aktualisiert werden.
4. Videosichtgerät nach Anspruch 2 oder 3, dadurch gekennzeichnet, daß ein Beschreibungsblock (RDB) nur aktualisiert wird, wenn sich seine Information ändert.
5. Videosichtgerät nach einem der Ansprüche 1 bis 4, dadurch gekennzeichnet, daß in der Speichereinrichtung (150) in Verbindung mit jedem gespeicherten Zeichen auch Attributeninformationen gespeichert werden.
6. Videosichtgerät nach einem der Ansprüche 1 bis 5, dadurch gekennzeichnet, daß jeder Reihenbeschreibungsblock (RDB) auch eine Angabe über die Zahl der Zeichen in der vollständigen Reihe umfaßt.
7. Videosichtgerät nach einem der Ansprüche 1 bis 6, dadurch gekennzeichnet, daß jeder Reihenschreibungsblock (RDB) auch eine Angabe über die erste Rasterzeile der sichtbar zu machenden Zeichenreihe und über die Zahl der Rasterzeilen der sichtbar zu machenden Zeichenreihe enthält.
8. Videosichtgerät nach Anspruch 7, dadurch gekennzeichnet, daß durch Modifizierung der zu der obersten und untersten sichtbar gemachten Reihe gehörenden Reihenbeschreibungsblöcke ein sanftes Rollen erzeugt wird, indem im Verlauf einer Vielzahl von Bildern die Zahl der ersten sichtbar zu machenden Zeile fortschreitend und die Zahl der sichtbar zu machenden Rasterzeilen komplementär dazu modifiziert wird.
9. Videosichtgerät nach einem der Ansprüche 1 bis 8, dadurch gekennzeichnet, daß jeder Reihenbeschreibungsblock (RDB) auch eine Angabe über das Rasterende, die Vertikalsynchronisation und die Austastung während des vertikalen Rücklaufs enthält.
10. Videosichtgerät nach einem der Ansprüche 1 bis 9, dadurch gekennzeichnet, daß Registermittel (202, 203, 254) zum Speichern der zur laufenden Reihe gehörigen Reihenbeschreibungsinformationen vorgesehen sind und daß Reihenbeschreibungsinformationen von dem Block (RDB), der durch den Inhalt der Registermittel angezeigt wird, in die Registermittel während desjenigen horizontalen Rücklaufintervalls übertragen werden, das der letzten Zeilenabtastung jeder Reihe folgt.
11. Videosichtgerät nach einem der Ansprüche 1 bis 10, dadurch gekennzeichnet, daß die Zeichen in Zeichenketten gespeichert werden, die größer sind, als in einer Reihe sichtbar gemacht werden kann, und daß ein horizontales Rollen ohne Änderung der Gespeicherten Zeichenketten dadurch herbeigeführt wird, daß die erste Zeichenadresse in den Reihenbeschreibungsblöcken (RDB) geändert wird.
12. Videosichtgerät nach einem der Ansprüche 1 bis 11, dadurch gekennzeichnet, daß die Beschreibungsblöcke (RDB) in der Speichereinrichtung in einem Satz von angrenzenden Adressenblöcken gespeichert werden und die Block-zu-Block-Zeiger nur Ein-Byte-Zeiger sind.
EP82303343A 1981-07-06 1982-06-25 Nach dem Rasterverfahren arbeitendes Videosichtgerät Expired EP0069518B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US280619 1972-08-14
US28061981A 1981-07-06 1981-07-06

Publications (3)

Publication Number Publication Date
EP0069518A2 EP0069518A2 (de) 1983-01-12
EP0069518A3 EP0069518A3 (en) 1984-08-01
EP0069518B1 true EP0069518B1 (de) 1987-08-12

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EP82303343A Expired EP0069518B1 (de) 1981-07-06 1982-06-25 Nach dem Rasterverfahren arbeitendes Videosichtgerät

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Country Link
EP (1) EP0069518B1 (de)
JP (1) JPS5817493A (de)
AU (1) AU555384B2 (de)
CA (1) CA1189645A (de)
DE (1) DE3276976D1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4611202A (en) * 1983-10-18 1986-09-09 Digital Equipment Corporation Split screen smooth scrolling arrangement
CN1012301B (zh) * 1984-10-16 1991-04-03 三洋电机株式会社 显示装置
JPS61151691A (ja) * 1984-12-20 1986-07-10 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 表示装置
GB2176979A (en) * 1985-06-06 1987-01-07 Aston Electronic Designs Ltd Video signal manipulation system
US4991118A (en) * 1989-04-17 1991-02-05 International Business Machines Corp. Enhanced data stream processing in a fixed function terminal

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4249172A (en) * 1979-09-04 1981-02-03 Honeywell Information Systems Inc. Row address linking control system for video display terminal
JPS5858674B2 (ja) * 1979-12-20 1983-12-26 日本アイ・ビ−・エム株式会社 陰極線管表示装置

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Publication number Publication date
DE3276976D1 (de) 1987-09-17
JPS5817493A (ja) 1983-02-01
AU8501982A (en) 1983-01-13
EP0069518A3 (en) 1984-08-01
AU555384B2 (en) 1986-09-25
EP0069518A2 (de) 1983-01-12
CA1189645A (en) 1985-06-25

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