EP0040655A1 - Procédé et moyens pour la mise à l'heure automatique d'une montre dans une zone de temps - Google Patents

Procédé et moyens pour la mise à l'heure automatique d'une montre dans une zone de temps Download PDF

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Publication number
EP0040655A1
EP0040655A1 EP80301708A EP80301708A EP0040655A1 EP 0040655 A1 EP0040655 A1 EP 0040655A1 EP 80301708 A EP80301708 A EP 80301708A EP 80301708 A EP80301708 A EP 80301708A EP 0040655 A1 EP0040655 A1 EP 0040655A1
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EP
European Patent Office
Prior art keywords
time
timepiece
signals
alarm
circuit
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EP80301708A
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German (de)
English (en)
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Jerome Hal Lemelson
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Individual
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Individual
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Priority to EP80301708A priority Critical patent/EP0040655A1/fr
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    • G—PHYSICS
    • G04—HOROLOGY
    • G04R—RADIO-CONTROLLED TIME-PIECES
    • G04R40/00—Correcting the clock frequency
    • G—PHYSICS
    • G04—HOROLOGY
    • G04R—RADIO-CONTROLLED TIME-PIECES
    • G04R20/00—Setting the time according to the time information carried or implied by the radio signal
    • G04R20/26—Setting the time according to the time information carried or implied by the radio signal the radio signal being a near-field communication signal

Definitions

  • the present invention is characterized by comprising a transmitting device and a timepiece adapted to receive a time change (or time check) signal developed by the transmitter and, upon demand, which is typically initiated by operation of a switch, to compare the received signal with the time signals constantly developed by the timepiece with the local standard.
  • the timepiece is also caused to rapidly step the time signal generation means more rapidly than usual to more rapidly effect the comparison.
  • Alarm means may be provided to indicate the need for a time change to the wearer or to serve as a warning or wake-up or other reminder to the timepiece holder.
  • Still another object of the invention is to bring the time displayed by a timepiece into conformity with the time zone in which the timepiece is located by receiving a time zone standard signal, rapidly changing the time stepping rate of the.timepiece, comparing the time displayed by the timepiece against the time zone signal and returning the timepiece to its normal time stepping rate when the signals compare.
  • Still another object of the invention is to provide a timepiece with means-for informing the holder of the timepiece of a need for a time change without automatically performing the time change.
  • Another object of the present invention is to provide for the development of an alarm to indicate the need for a time zone change or as a wake-up or memory aid.
  • Figure 1 shows a system 10 for automatically setting or correcting electronic timepieces in accordance with the time zone in which the timepiece is located.
  • the system 10 includes a time code generator 11 which includes clock means for generating sequential codes representative of time, such as the hours of the day and, in certain instances, minutes of each your in a particular .time zone.
  • Generator 11 may also be located in a vehicle such as an aircraft, boat or train traveling from time zone to time zone and may include means for generating code signals which correctly indicate the local time as the vehicle passes from one time zone to another by means which will be described.
  • a clock or watch shown generally as numeral 14, contains a microminiature electronic circuit including a short wave radio or ultrasonic receiver 15, having an output 16 which is connected through a manually operated or signal responsive switch 17, operated by push button 17A or sonic relay 17B, for example to a line 18 which is connected directly or through OR circuits to circuitry for correcting the time computing and driving circuits of the watch in accordance with the signals generated by time code generator 11 and intercepted by receiver 15.
  • Switches 17 and 26 serve to locally actuate the time zone resetting circuitry by coupling receiver circuit 15 to circuit 17 and coupling battery terminal B+ to 17.
  • the electronic watch 14 contains hour time generating and display driving circuitry which may be electrically corrected or changed by pulses applied thereto to cause the display driving circuits 33 thereof to activate the hour display units 36 of the time display 35 to display the correct hour of the day for the particular time zone in which the timepiece is located.
  • This correction may be obtained by means of electrical tone or code signals generated on the output 16 of receiver 15 and passed to a first code or tone responsive relay 20 which generates a signal at its output 21.
  • the output 21 of code (or tone) responsive relay 20 is connected to a serial-to-parallel converter 22 and a trigger switching input 27 of a bi-stable flip-flop switch 26 which changes state when code responsive relay 20 generates an output and passes energizing electrical energy from battery B+ to energize a pulse generator 29 which generates a train of pulses and applies these pulses to the hour reset circuitry 30 for the timepiece 14.
  • An output 30A of reset circuit 30 is applied to energize an electronic circuit 32 which generates coded signals an a serial fashion, said codes being representative of the time in hours indicated by the output of an hour of day computer and display driver 33 having an output 32A on which is generated series codes indicative of the hour displayed and such series code signals are applied to a series-to-parallel converter 24, the outputs of which are connected to respective inputs 23B of a code matching relay 23 having its other set of parallel code inputs 23A connected to the outputs of series-to-parallel converter 22.
  • the device 23 preferably includes a comparator circuit, comprised of exclusive OR gates, coupled to an AND gate.
  • the minute display may be reset in the same fashion wherein coded relay 40 sets the signal representing the minutes reading to be displayed into encoder 42 to create a binary output code at 42A for connection with one set of inputs of comparator 43.
  • the pulse generator is energized by the setting of flip-flop 46 under control of relay 40, causing minutes reset circuit 50 to generate pulses representative of the minutes setting in the local time zone. These signals are converted into parallel form by converter 44 for application to comparator 43.
  • circuit 53 applies signals through driver circuitry 54 to the minutes display positions of display 36.
  • Delay line 48D is provided to,delay the signal employed to activate pulse generator 49 and being passed to flip-flop switch 46 until switch 46 has been closed by the signal transmitted on the output 41 of coded relay 40.
  • Figure 2 illustrates a scheme which may be employed in the timepiece of Figure 1 whereby a stable oscillator frequency output is converted into binary coded decimal outputs, corresponding to timekeeping or accumulation of time, for application to an external device requiring such a code.
  • Crystal 61, fixed capacitor 62,-trimmer capacitor 63, and amplifier 64 form a crystal oscillator circuit whose basic frequency is determined by crystal 61 and, over a limited range, capacitor 63.
  • Divider circuit 65 reduces the oscillator frequency to a pulse rate appropriate for the operation of B.C.D. (binary coded decimal) divider chain 66,67,68,69,70 and 71, which rate is typically one cycle per second.
  • B.C.D. binary coded decimal
  • Divider circuit 66 provides the units of seconds function and its B.C.D.output may be applied, as shown, to decoder driver circuit 74 for subsequent application to visual display unit 80.
  • the operation and circuitry is basically the same for the remainer of the divider chain circuits 67-71, inclusive, according to the following arrangement:
  • circuits 67 and 69 With regard to circuits 67 and 69, only 3 bits of B.C.D. information (2 0 , 2 , 2 2 ) are required as circuits 67 and 69 need only be provided with a count to 6 capability for timekeeping functions.
  • circuit 70 For clock type operation, circuit 70 need only count to decimal 2, for 12 hour operation, or decimal 4 for 24 hour operation, and therefore need only have 2 binary bits (2 0 , 2 1 ) of information or 3 bits (2 0 , 2 , 2 ) of information, respectively, for its output.
  • Circuit 79 need only output a decimal 1 bit 1 (2 0 ) or 2 decimal bits (2 0 , 2 1 ) of information for 12 or 24 hour operation, respectively.
  • AND gate 73 and time delay means 72 comprise a circuit which resets all counters, with the exception of the units of seconds counter, at a count of 12:59:59 plus 1 count and, at the end of the reset cycle, enter a 1 in the units of hours counter, for 12 hour clock operation.
  • AND gate '73 need only be coupled the units of hours clock input, bit 2 0 , bit 2 1 , and tens of hours bit 2
  • Delay means 72 is not necessary in this mode as it is not necessary to preload any counters after being reset.
  • the circuits 72 and 73 may be omitted completely if only accumulated timekeeping is required and the tens of hours bits 2 3 and 2 2 , ones of hours bit 2 3 , tens of minutes bit 2 3 , and tens of seconds bit 2 3 now become significant. This would be desirable if the circuit in Figure 1 were, for example, used as a stop watch or running time indicator.
  • the circuit in Figure 3 illustrates a possible means by which a counter, which may be one of a bank of counters, such as are employed in a timekeeping circuit for use in Figure 1, may be brought into identity with a transmitted master time signal.
  • a counter which may be one of a bank of counters, such as are employed in a timekeeping circuit for use in Figure 1, may be brought into identity with a transmitted master time signal.
  • Coded time signals, incoming at receiver 90 originate from master clock and transmitter system comprising a master clock 87 and means 88 for modulating the carrier of a transmitter.
  • the aforesaid signals are applied to decoder 91, which converts the received signals to a usable time code format and applies the information in the converted form to latch circuit 92, which stores the time code until counter 93 is reset.
  • Counter 93 develops an output which is coded, and may, for example, be in binary coded decimal format.
  • the output may also be applied to decoder circuit 94 for subsequent application to the driver circuit (not shown) of a digital display means 95 to visually display the present count in counter 93.
  • the counter 93 ouput is also applied to one or multiplicity of OR gates, represented at 96, 97, 98 and 99, the other input of each gate being connected to the output terminals of time latch circuit 92. If the binary levels of any of the time code lines from counter 93 are found to be out of identity with the codes available from latch 92, one of the outputs 96, 97, 98 or 99 will change state to apply an input to AND gate 100 for resetting counter 93 to zero via reset input 93A.
  • the second input to AND gate 100 is derived from oscillator 101, whose feedback means is represented by 102, which oscillator may already exist elsewhere in the timekeeping circuit, or which may be a part of this circuit.
  • the final input to AND gate 100 is an indication from receiver 90 that a signal, of sufficient strength to decode reliably, has been received. This signal is applied to.set latch circuit 103 and is applied to the associated input of AND gate 100 to enable gate 100 until OR gates 96 -99 inclusive, indicate that all time code lines are in identity, causing latch 103 to reset via pulse shaping circuit 104.
  • the output developed by gate 100 enables the oscillator signal from oscillator 101 to be passed to manual disable switch 105, which is activated when the user does not wish the timekeeping device to be automatically reset, to apply pulses to counter clock input 93B, thus applying high speed clock pulses to advance counter 93 at a rate which is much faster than the normal rate.
  • OR gate identity signal also resets latch 103, latch 106, and all the time code latches 92 via pulse shaper circuit 104.
  • AND gate 107 and flip-flop 106 are provided to show how an up/down counter may be used at 93.
  • the operations are identical to those described above except that AND gate 107 senses when the counter has reached a count of 9, to set latch 106 and cause count down input 93C of counter 93 to be activated.
  • Counter 93 will now count down until time identity is achieved at which time it is reset by the comparator as previously stated.
  • the counter now responds to pulses at its normal clock input 93B for continuation of the time keeping function.
  • the above function might be found desirable if only one digit is to be reset and it is necessary to prevent erroneous carry output signals from counter output 93D to create errors in the count of subsequent devices connected to counter 93. This may also be accomplished by automatically disconnecting the counter carry output at 93D for the duration of time identity setting function.
  • Figure 4 presents a format by which any multiplexed 7 segment (L.E.D. campatible) signal, in this example a watch circuit, may be demultiplexed into a binary coded decimal format.
  • L.E.D. campatible L.E.D. campatible
  • Watch circuit 110 which is crystal controlled by an oscillator circuit comprised of capacitors 111 and 112 and crystal 113, is energized by battery 114, and may have options such as time and set functions 115, 116, 117 automatic brightness control sensor unit 118, etc., develops a 7-segment signal by 4-digit multiplexed signals for application to segment drivers 119 and digit drivers at 120 which may be an integral part of watch circuit 110. These signals are then applied to a display means (such as an L.E.D. display) for visual presentation of the time by the 7-segment display devices 121 - 124. The segment signals are applied via current limiting resistors, to protect the display.
  • a display means such as an L.E.D. display
  • the segment signals are also applied to programmable read-only memory (ROM) 125 for decoding to a 4-bit B.C.D. format. It is not necessary to use all of the 7-segment signals to reliabily distinguish between the digits 0-9.
  • ROM read-only memory
  • One of several possible segment choices might be the A, B, E, F, and G segments. This choice will provide an unambiguous code and minimize the memory space needed in memory.
  • the B.C.D. format may be developed in serial fashion at the output of ROM 125 marked bits 20, 21, 22, 23 and clocked at the number of digits times the mux rate of the watch chip 110.
  • Latch circuits 127-145, inclusive provide sample and hold functions for the B.C.D. information produced at the output of ROM 125 and allow that information to be presented at all outputs at all times.
  • the latch circuits 127-145, inclusive have their respective inputs coupled to bit 2 0 or 2 1 or 2 2 or 2 3 outputs of ROM 125 and are selectively enabled by signals derived from the digit drive signal of circuit 110, such that the information gathered and presented will represent the proper digit, be it hours, minutes or seconds.
  • circuits 127-145 in Figure 4 and the separation into hours, minutes and seconds divisions are exemplary of the use of these circuits as a clock circuit decoder, but the basic principle may be applied to any multiplexed output which is desired to be converted to a B.C.D. format.
  • the time signal originating means is represented by a master clock A 1 which is characterized by a high degree of accuracy and which may be derived from presently maintained standard Time Broadcasts or other sources.
  • a time coding means B 1 which processes master clock time signals of master clock A 1 and conditions them for subsequent application to transmitting means C 1 , to be transmitted to a receiver incorporated in a timepiece for the purpose of automatic time correction.
  • the following system through a simple modification, enables a timekeeping device, which may have as it outputs only a multiplexed signal, and as its only input an oscillator signal, employed to perform a time zone correction.
  • the signal generated by oscillator 150 has a feedback circuit 151 which is preferably a crystal, coupled via AND circuit 152 and oscillating input correcting means 153, has an output multiplexed signal representing the time and which may be applied to visual display means 154.
  • OR circuits 155 - 159 compare the codes for time output from watch circuits 110 (see Figure 4) with those present at multiplexing AND gate matrix 160 and develop a change of output state if these codes (they may be B.C.D. or 7-segment or some other code format) are not identical.
  • Receiver circuit 161 derives its input signal via master clock encoder and time transmitting means A 1 , B 1 and C 1 and demodulates it for application to decoder circuit 162 which decodes the master time signals for application to time holding latch circuits 162A and for subsequent application to input multiplexing AND gates 160.
  • the other inputs to gates 160 are derived from the multiplex generator of watch circuit 110, in this case, and as one example, the digit drive signals of watch circuit 110.
  • Gates 160 apply the proper digit information to OR gates 155 - 159 inclusive to coincide with the same digit information from watch circuit 110.
  • OR gates 155 - 159 change their output state to activate an input of AND gates 163 - 166.
  • the remaining inputs of gates 163 - 166 are derived from, in this example, the digit drive signals of watch circuit 110.
  • one of the AND circuits 163 - 166 changes output state to set a corresponding latch circuit 167 - 170 and create a low input to AND gate 171 which then activates AND gate 172, via inverter 173, and simultaneously deactivates circuit 152, AND gate 172 receives a higher frequency input from oscillator 174, having feedback means 175.
  • the higher frequency is then applied to oscillator input line 153 in place of the output developed by oscillator 150. This will cause watch circuit 110 to run at an accelerated pace until OR gates 155 - 159 show a comparison at each bit position.
  • the outputs of AND gates 163 - 166 then resume their reset states to cause reset circuits 176 - 179 (comprised of AND gates 176A - 179A and inverters 176B - 179B) to reset latches 167 - 170 when a corresponding digit drive (in this example) signal is also inputted thereto.
  • the circuitry of reset circuit 176 is exemplary of one possible construction of such a reset circuit.
  • AND gate 171 also has one input derived from a "sufficient signal strength" output indication originating from receiver (161) via lead 180 and manual disconnect switch 181, which enables the user to disconnect the automatic time resetting function. This input indicates a signal of sufficient strength, and an appropriate code capable of being reliably decoded, has been received. This circuit is reset when the watch circuit output time code is identical with that of the master clock circuit A 1 .
  • transmitted coded time signals from circuits A 1 , B 1 and C 1 are received by receiver 182, which may respond to transmission by way of a radio-frequency carrier, ultrasonic, infrared or other means.
  • receiver 182 feeds demodulated coded time signals to decoder means 183.
  • Decoded time signals are then applied to presettable counter circuit 184 which may be one of a plurality of counters represented by 184a, 184b, etc. and when an appropriately strong signal is received by receiver 182 and successfully decoded by decoder 183 a preset indication is conveyed via line 185a of circuit 185 to counter 184, which then adopts this time signal and proceeds to count from that time indication and obliterates its own previous count.
  • the count which may be in binary coded decimal format may further be applied to decoder circuit 186 for subsequent application to display means 187 which may be an LED, LCD, or other means to provide a visual indication of the present count of counter 184.
  • Figure 7 is representative of a time correction device which may be employed at a stationary location, such as: within a signpost along a road, or at the entrance to or exit from an airport, bus terminal, boat dock, etc. for the automatic resetting of timepieces, such a watches which are appropriately equipped with responsive circuitry. It is intended to deliver to a transmitting means, such as a ratio transmitter, infrared emitter, ultrasonic transducer, or other convenient means, a coded time signal representative of the accurate local time, which may be derived from internal or external timing sources.
  • a transmitting means such as a ratio transmitter, infrared emitter, ultrasonic transducer, or other convenient means, a coded time signal representative of the accurate local time, which may be derived from internal or external timing sources.
  • An accurate time signal may be received by a standard time broadcast radio receiver 190; or a satellite radio receiver 191, whose respective antennae are represented at 192 and 193.
  • This received signal may be an actual coded time signal, or it may be an accurate standard frequency from which the time may be derived in an internal clock circuit 194 referenced to that standard frequency. In either case the time may be in universal time, local time or any other time zone notation,
  • the signals mentioned above may be derived from a telephone 195 (or other hard wired means from a remote location), the local power lines 196, whose frequency over a long period of time is generally very stable, or an integral oscillator 197 of high stability and accuracy, such as a crystal oscillator.
  • a clock circuit has been included in circuit 194 for use-in the case where no stable accurate frequency standard is available from one or more of the above mentioned sources, or any other similar sources.
  • the clock circuit 194 is not necessary, unless a standard frequency is concurrently in use, and may be omitted with the coded time signals now being introduced directly to modulator circuit 198 via connection means 191a, 190a, 195a, 196a, and 197c respectively.
  • Modulator circuit 198 may have as an input either coded time signals derived externally, as mentioned above, or coded time signals from the internal clock inlcuded in circuit 194. Its purpose is to further process the time signals and condition them for subsequent application to transmitting means 199, which may be any of several convenient means of tranmission such as: a radio transmitter, an infrared generator, an ultrasonic transducer, a modulated light source, etc.
  • Figure 8 is intended to represent a possible structure for a time correction means which may be incorporated in a moving vehicle in which there may be passengers, instrumentation or cargo equipped with timepieces which are capable of being automatically calibrated, by an external source, for actual time and/or time zone, date, etc., such as a bus, boat or aircraft.
  • an external source for actual time and/or time zone, date, etc., such as a bus, boat or aircraft.
  • An application to an aircraft will be covered in the greatest depth in the following description as one such exemplary system.
  • a standard time code generator 200 which may be similar in construction to that in Figure 7, and a navigational signal generator 203, present their respective information to modulator circuit 201 which applies their coded signals to transmitter 202 for application to antenna 204 for broadcasting to any aircraft within its range.
  • Circuits 201 - 204 may be pre-existing equipment or may be newly installed and adapted to the additional function of time signal broadcasting.
  • circuits 202 and 203 need not necessarily be a navigational beam transmitter, but may be any conventional means available for transmission, such as: loran transmitters for boats; one or two-way voice or other code information channels, which may be more convenient to use for this purpose, or radio, television or satellite stations, for the direct transmission of these time signals, or any other suitable means.
  • signals received by antenna 205 are processed by receiver circuit 206 and applied to signal separator 207.
  • Separator 207 removes the navigational (or other) signals, received by antenna 205 and receiver 206 from the time signals which are of primary interest in-the present system.
  • Navigational (or other) signals from 207 are applied to their instruments in a conventional manner at 208.
  • the time signals from 207 are applied to decoder circuit 209 which may take the time signals directly and conditions them for subsequent application to the remainder of the circuit, or it may respond, in this case, to the unique code broadcast with a navigational or other signal.
  • 208 is preferably provided with a memory of all the unique codes and their plus or minus quantitative hour relationship to a single time zone such as that for Universal Time, or any other.
  • circuit 209 would derive an individual code indicative of the number of hours to be added to or subtracted . from the standard time (U.T., GMT, etc).
  • U.T., GMT Greenwich Mean Time
  • Latch circuit 210 accepts the coded signals, which may only be present for a short period of time, and applies them to read-only memory (ROM) 213 as a partial set of inputs.
  • ROM read-only memory
  • manually operated coded time switch 211 may be entered into ROM 213 in lieu of, or in combination with the contents of latch circuit 210, or any other time signal source, represented by circuit 212, which may be an accurate tape recording with time zones stored therein, as well as flight path information from some other source, a navigational satellite, directly or indirectly, etc.
  • ROM 213 which may alternatively be an adder circuit to combine the hour correction with the standard time signal, is from an adjacent clock circuit 214 which keeps track of time in the chosen zone as mentioned previously (U.T., GMT or other).
  • This time code may be converted to provide a visual display of the time by decoder and visual display means 215.
  • the output of circuit 213 is a coded version of the present time in the chosen time zone corrected for the present location of the timepiece, and is presented to modulator means 217 which conditions it for subsequent application to transmitting means 218, which may be an infrared transmitter, radio waves, ultrasonic or any other convenient means.
  • transmitting means 218, which may be an infrared transmitter, radio waves, ultrasonic or any other convenient means. This transmission will be short range and is intended for the automatic resetting of timekeeping devices, for example specially adapted watches which may be carried by passengers in the vehicle.
  • the present time may also be displayed by decoder and display means 216 for a visual check of the time setting, or simply to display the time as a courtesy to passengers.
  • Figure 9 shows a circuit arrangement which provides a timepiece with an alarm capability.
  • An alarm code generator 225 energized by power source 226, generates a coded signal which is applied to transmitter 227 adapted for a small localized transmission range.
  • the timepiece contains a watch receiver 228 which receives and decodes the coded alarm signal and applies it to code responsive relay device 229.
  • alarm 230 is enabled to provide an audible and/or visually observable alarm.
  • Switch 233 manually operable from the exterior of the timepiece, may be opened to disconnect the alarm from power source 231 to disable the alarm function.
  • switch 232 similar in both design and function to switch 233, may be provided to deactivate the alarm function by deactivating the receiver and relay circuits.
  • The-timepiece contains a receiver 288 which receives and decodes the coded alarm signal and applies the decoded signal to code responsive relay device 229.
  • alarm 230 is enabled to provide an audible and/or visually observable alarm.
  • Switch 233 manually operable from the exterior of the timepiece, may be opened to disconnect the alarm from power source 231 to disable the alarm function.
  • switch 232 similar in both design and function to switch 233, may be providied to deactivate the alarm function by deactivating the receiver and relay circuits.
  • each room of a hotel may be provided with an antenna having a very short transmitting range.
  • the antenna in the guest's room is coupled to receive the coded alarm signal.
  • the watch receiver when energized, picks up and decodes the coded signal and 'applies it to relay device 229.
  • the signal which may be of a discrete frequency, is passed through a narrow band-pass filter 229A ( Figure 9A) to set a bistable flip-flop 229B in the presence of the coded signal.
  • the flip-flop output applies an enabling signal to the alarm switch (transistor Q 1 ). Opening switch 232 (or 233) deactivates transistor Q 1 , and hence the alarm.
  • a delay circuit 229C. may be provided to limit the time that the alarm remains energized, by resetting the flip-flop when the delay circuit times out.
  • Switch 233 (or 232) is preferably provided with a momentary contact connection 232A with the reset input of the flip-flop to reset the flip-flop at the same time that the alarm 230 is deenergized.
  • the alarm may also be activated during a time-setting operation or may be employed to indicate the need for a time-setting operation.
  • each room of a hotel may be provided with an antenna having a very short transmitting range.
  • the antenna in the guest's room is coupled to receive the coded alarm signal.
  • the watch receiver when energized, picks up and decodes the coded signal and applies it to relay device 229.
  • the signal which may be of a discrete frequency, is passed through a narrow band-pass filter 229a ( Figure 9a) to set a bistable flip-flop 229b in the presence of the coded signal.
  • the flip-flop output applies an enabling signal to the alarm switch (transistor Q 1 ). Opening switch 232 (or 233) deactivates Q 1 and hence the alarm.
  • a delay circuit 229c may be provided to limit the time that the alarm remains energized, by resetting the flip-flop when the delay circuit times out.
  • Switch 233 (or 232) is preferably provided with a momentary contact connection 232a with the reset input of the flip-flop to reset the flip-flop at the same time that the alarm 230 is deenergized.
  • the alarm may also be activated during a time-setting operation or may be employed to indicate the need for a time-setting operation.
  • one output of the counter 65 is coupled to one input of gate G1, which is enabled to couple a pulse of higher frequency to the hours counter unit 70 through OR gate G2.
  • the oscillator circuit has a relatively high operating frequency which is divided down by counter 65 to provide a one pulse per second signal rate output 65a.
  • the oscillator may have an operating frequency of 32,768 H 2 .
  • a signal of much higer frequency than one pulse per second may be derived from an intermediate stage of counter 65 to perform the time setting operation at a rapid rate without the need for providing a separate oscillator source.
  • one output of the counter 65 is coupled to one input of gate G1, which is enabled to couple a pulse of higher frequnecy to the hours counter unit 70 through OR gate G2.
  • the oscillator circuut has a relatively high operating frequency which is divided down by counter 65 to provide a one pulse per second signal rate at output 65a.
  • the oscillator may have an operating frequency of 32,768 H 2
  • a signal of much higher frequency than one pulse per second may be derived from an intermediate stage of counter 65. to perform the time setting operation at a rapid rate without the need for providing a separate oscillator source.
EP80301708A 1980-05-22 1980-05-22 Procédé et moyens pour la mise à l'heure automatique d'une montre dans une zone de temps Withdrawn EP0040655A1 (fr)

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Publication number Priority date Publication date Assignee Title
FR2232006A1 (fr) * 1973-05-28 1974-12-27 Citizen Watch Co Ltd
US4020628A (en) * 1974-10-14 1977-05-03 Centre Electronique Horloger S.A. Automatic regulation of an electronic watch
US4023344A (en) * 1975-09-03 1977-05-17 Kabushiki Kaisha Suwa Seikosha Automatically corrected electronic timepiece
DE2643250A1 (de) * 1976-09-25 1978-03-30 Braun Ag Zentralgesteuerte uhr
DE2715096A1 (de) * 1977-04-04 1978-10-12 Wolfgang Prof Dr Ing Hilberg Funkuhr-einstellung

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2232006A1 (fr) * 1973-05-28 1974-12-27 Citizen Watch Co Ltd
US3937004A (en) * 1973-05-28 1976-02-10 Citizen Watch Co., Ltd. Portable miniature type information treating device
US4020628A (en) * 1974-10-14 1977-05-03 Centre Electronique Horloger S.A. Automatic regulation of an electronic watch
US4023344A (en) * 1975-09-03 1977-05-17 Kabushiki Kaisha Suwa Seikosha Automatically corrected electronic timepiece
DE2643250A1 (de) * 1976-09-25 1978-03-30 Braun Ag Zentralgesteuerte uhr
DE2715096A1 (de) * 1977-04-04 1978-10-12 Wolfgang Prof Dr Ing Hilberg Funkuhr-einstellung

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* Cited by examiner, † Cited by third party
Title
IEEE Transactions on Broadcast and Television Receivers, Vol. BTR-18, No. 4, November 1974, pages 234-237 New York, U.S.A. E.G. BREEZE: "Television line 21 Encoded Information and its Impact on Receiver Design" * page 234, paragraph 1 * *
Jahrbuch der Deutschen Gesellschraft fur Chronometrie E.V., Vol 28, 1977, pages 49-58 Stuttgart, DE. M. SCHLEGEL: "Ein Versuch Mit Kodierter Zeitubertragung Uber UKW - Rundfunksender" * figures 6-8 * *
Radio Mentor Electronic, Vol. 43, No. 7, July 1977, pages 266-270 A. HELLER: "Electronic zum EBU/IRT-Zeitcode-System" * figure * *

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