EA041507B1 - EFFECTIVE HEMT TECHNOLOGY FOR MANUFACTURING MONOLITHIC MULTIFUNCTIONAL MICROWAVE INTEGRATED CIRCUITS ON SEMI-INSULATING GALLIUM ARSENIDE PLATES - Google Patents

Description

The invention relates to the field of creating multifunctional microwave integrated circuits on semi-insulating plates of gallium arsenide.

Scope: production of solid-state ECB of the microwave mm-range for PPM AFAR.

An increase in the speed and volume of processed information, an increase in reliability and a decrease in the mass and size of a new generation of aviation and space-based radio-electronic equipment stimulate the creation of a solid-state small-sized ECB of the microwave cm- and mm-range of an increased level of integration, in particular, monolithic multifunctional integrated circuits (MMIS) that make up a constructive the core (core-chip) of solid-state microwave modules that control the amplitude and direction of transmission of microwave signals to the APAA. The functional units of the MMIS (switch, phase shifter, power amplifier, attenuator, etc.) are preferably built on high electron mobility field effect transistors (HEMTs) with a T-shaped gate design, which makes it easier to obtain its submicron length, providing the desired speed.

To date, there have been two technological directions for the manufacture of MMIS on NEMT, which differ in the way the electrophysical structure of active regions is formed:

- on complex epitaxial structures of gallium arsenide (with a given concentration profile of electron distribution) by means of precision local etching of epitaxial layers;

- on plates of single-crystal undoped gallium arsenide, initially having a high resistivity (up to 10 ⁸ Ohm-cm), by means of their local ion doping with a donor impurity to form the desired electron concentration profile.

MMIS fabrication technology based on complex pseudomorphic heterostructures (InGaAs/GaAs, AlGaAs/GaAs, InGaAs/AlGaAs/GaAs, etc.) - pHEMT technology is designed for manufacturing complex-functional (up to 10 nodes and more) monolithic cm-range control devices (for operating frequencies up to 18 GHz); according to it, crystals of the CHA3014 model are mass-produced abroad (manufactured by the European company United Monolitic Semiconductors), and in Russia - MP 001D (by Mikran).

The disadvantages that limit the use of pHEMT technology for the manufacture of MMIS in the mm range (in addition to the use of expensive materials and electron beam lithography) are as follows: the lack of guarantees for the uniformity of the composition and doping profile of thin epitaxial layers over the wafer area [RF patent No. 2390875 C1, published on May 27, 2010 according to the IPC index H01L 21/335];

the use of poorly controlled anisotropic chemical etching, which can lead to blurring of the side faces of the dimple etched in the contact layer of the epitaxial structure during the formation of the active regions of the circuit and the buried T-gate of the transistor, and as a result, to a change in the specified channel dimensions and departure from the design the stronger the contact layer [RF patent No. 2421848 C1, published on 06/20/2011 according to the IPC index H01L 21/338, V82V 3/00].

Fabrication of mm-range HEMT directly on a semi-insulating gallium arsenide wafer by doping with donor impurity ions reduces these risks and provides higher linear resolution and reproduction of a T-gate with a submicron base length while reducing labor intensity and material costs [RF patent No. 2523060 C2, published on July 20 .2014 according to IPC index H01L 29/00] - prototype.

On the working surface of a semi-insulating single-crystal plate of gallium arsenide, by means of low-dose (up to 8.0-10 ¹² cm ^-2 ) and high-dose (from 5-10 ¹³ cm ^-2 and higher) doping with silicon ions, an n ⁺ -ni-structure of a field-effect transistor with a barrier is formed Schottky. Then, using thin-film technology using photolithography, the source and drain of the transistor are made, and between them is the T-gate of a transistor with a submicron (<0.3 μm) base length. After that, by additional high-dose doping with silicon, the contact n ⁺ -domains of the source and drain are expanded and the working length of the channel is reduced. Boron ion implantation is used to passivate the working surface of the active region. As a result, the operability of the transistor in the mm range of lengths is ensured and its output power is increased.

Disadvantages: high risks of manifestation of the effects of a short channel, a decrease in the breakdown voltage, deep penetration of boron ions into the channel, etc., which worsens the reliability of transistors.

According to the developed HEMT technology, mm-range MMIS are fabricated on a single-crystal semi-insulating gallium arsenide plate. Through precision implantation of silicon (donor) ions and argon ions, active regions of MMIS functional units and n ^- -n ⁺ ni-structure of HEMT with an n-channel thickness of not more than 0.15 μm are formed.

The source, drain, and T-gate of a transistor with a submicron (>0.15 µm) base length are formed using thin-film technology; Thus, the fundamental requirement for the reliability of the operation of microwave transistors is ensured: the ratio of the gate length to the channel thickness must exceed unity. To fuse the metallization of the source and drain, pulsed-beam heat treatment of the plate is used.

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Technical results:

reliable planar isolation of the sectors of the functional units of MMIS and NEMT and due to the high resistivity of the gallium arsenide plate;

flexible control in a single technological cycle of the formation of passive transistors for switching nodes (switch and phase shifter) and active transistors (for an attenuator, power amplifier):

high linear resolution (topological norm), which ensures the production of MMIS for the mm-wavelength range;

increasing the percentage of yield of suitable MMIS (with tens or more HEMTs) by ensuring high uniformity of the submicron channel in terms of thickness and doping level and the submicron HEMT gate formed on the flat surface of the plate;

increasing the reliability of HEMT due to the proportionality of the channel thickness and gate length, limiting uncontrolled diffusion and increasing the gate-drain breakdown voltage, eliminating the formation of high-resistance end contacts of the source and drain to the transistor channel;

reducing the labor intensity of the production cycle and material costs for the manufacture of MMIS.

Such a HEMT is a technology applied to the manufacture of a mm-band MMIS on a gallium arsenide semi-insulating plate, the scheme of the implementation algorithm for which at the initial distinctive stage of the formation of a HEMT with a T-gate, shown in Fig. 1 is not found in the analyzed patent and scientific and technical sources.

In FIG. 1, 2, 3 shows the scheme of HEMT formation on a gallium arsenide semi-insulating plate: fig. 1 - introduction of ²⁸ Si ⁺ ; fig. 2 - insertion of ⁴⁰ Ar ⁺ ; fig. 3 - formation of drain-source-gate electrodes.

An example of a specific implementation.

MMIS is manufactured on a semi-insulating gallium arsenide plate of the AGCHP-9 brand, and the process of its manufacture begins with the formation of passive and active HEMT - the basic active elements of the MMIS functional units (switch, phase shifter, power amplifiers, etc.) in the following sequence.

1. In the prepared (subjected to chemical-dynamic polishing) the working surface of the plate (Fig. 1, 2, 3 - pos. 1) implant silicon ions ( ⁺ Si ²⁸ ) (Fig. 1 - pos. 2); first with a small (7 10 ¹² cm ^-2 ) dose at an accelerating voltage energy of 110 keV, and then with a large dose (5 10 ¹³ cm ^-2 ) at an acceleration energy of 50 keV - through the windows of a mask formed from a silicon nitride film. To activate the embedded silicon ions, a short-term (8.5 s duration) pulse-beam heat treatment of the wafer is carried out at a temperature of 980°C, as a result of which the lower lightly alloyed (1 ... 2 10 ¹⁷ cm ^-3 ) n-type is formed in its working layer a conducting channel with a thickness of ~ 0.2 μm (Fig. 1, 2, 3 - pos. 3), and on it - heavily doped (with an electron concentration of ~ 8...9·10 ¹⁸ cm ^-3 ) with a thickness of ~ 0.12. ..0.15 µm contact n ⁺ - areas of the source and drain (Fig. 1 - pos. 4). After that, the working surface of the plate is irradiated with heavy argon ions ( ⁰ Ar ⁺ ) (Fig. 2 - pos. 5) with a dose of 5· 10 ¹¹ cm ^-2 at an acceleration energy of 40 keV. As a result, an n'-n ⁺ -ni-HEMT structure is formed with a surface (~0.05 μm) compensating n'-layer (Fig. 2, 3 - pos. 6), which limits gate leakage currents and provides more reliable conductivity control channel.

2. The manufacture of HEMT electrodes on the formed n'-n ⁺ -ni-structure is carried out using thin-film technology using advanced optical lithography. The source electrodes (Fig. 3 - pos. 7) and drain (0.2 ... 0.25 μm thick) (Fig. 3 - pos. 8) are made of a two-layer Ge ₄₀ Ni ₆₀ -Al metal film, and the gate ( thickness 0.3 ... 0.4 microns) (Fig. 3 - pos. 9) - from the film Ti - A1. Low-resistance (with resistivity 0.4...0.6 Ομ·μμ) source and drain contacts are formed during pulse-beam heat treatment of the plate with a duration of 2.0...2.5 min at a temperature of 450°C.

The gate of a T-shaped transistor with a submicron base length is formed by reverse lithography. A layer of dielectric Si ₃ N ₄ with a thickness of 0.2 μm is applied to the plate, and a resistive mask (FP-051 T) with a window size of ~ 0.5 μm is applied to it. Then, through the window in the mask, plasma-chemical etching of the Si ₃ N ₄ layer in an SF ₆ /O ₂ atmosphere and pulsed beam heat treatment are carried out. As a result, the window (slit) in this two-layer mask is reduced to 0.2 µm. The size of the resulting gap in the dielectric determines the length of the base (legs) of the T-gate. When forming the T-gate cap from Ti-Al metallization, a two-layer photoresistive mask (FN-11S/FN-051T) is used, which determines the size and position of the gate cap.

3. Passive topological elements of MMIS functional units (capacitor plates, low-resistance resistors, inductors, etc.) are made simultaneously with the source and drain of HEMT from metallization of the same composition, but at different levels, separated by an insulating layer of silicon nitride; Silicon dioxide is used to make the dielectric of capacitors. The number of levels of arrangement of passive elements reaches nine, and at the last ninth level there are flat inductors, which is typical for microwave MMIS crystals.

Claims (1)

CLAIM A method for manufacturing microwave monolithic multifunctional integrated circuits (MMIS) on semi-insulating gallium arsenide plates, which consists in ion doping and improved optical lithography, characterized in that at the initial stage of the technological process - the manufacture of the electrophysical structure of the basic active elements of MMIS functional units - transistors with high electron mobility (HEMT), after the implantation of silicon ions, argon ions are additionally implanted into the wafer and a T-gate with a base length of not more than 0.15 μm is formed on the resulting p'-p ⁺ -p-1 structure with a submicron thickness of the η-channel.