EA017061B1 - Устройство и способ обработки данных - Google Patents
Устройство и способ обработки данных Download PDFInfo
- Publication number
- EA017061B1 EA017061B1 EA201000754A EA201000754A EA017061B1 EA 017061 B1 EA017061 B1 EA 017061B1 EA 201000754 A EA201000754 A EA 201000754A EA 201000754 A EA201000754 A EA 201000754A EA 017061 B1 EA017061 B1 EA 017061B1
- Authority
- EA
- Eurasian Patent Office
- Prior art keywords
- address
- symbols
- ofdm
- data symbols
- permutation
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/276—Interleaving address generation
- H03M13/2764—Circuits therefore
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2742—Irregular interleaver wherein the permutation pattern is not obtained by a computation rule, e.g. interleaver based on random generators
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/276—Interleaving address generation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2626—Arrangements specific to the transmitter only
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/582—Pseudo-random number generators
- G06F7/584—Pseudo-random number generators using finite field arithmetic, e.g. using a linear feedback shift register
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/24—Systems for the transmission of television signals using pulse code modulation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computing Systems (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0721271A GB2454195A (en) | 2007-10-30 | 2007-10-30 | Address generation polynomial and permutation matrix for DVB-T2 16k OFDM sub-carrier mode interleaver |
GB0722645A GB2455071A (en) | 2007-10-30 | 2007-11-19 | Memory efficient data symbol interleaver which adaptively applies odd only, or odd and even interleaving processes, depending on OFDM mode |
GB0722728A GB2454267A (en) | 2007-10-30 | 2007-11-20 | DVB interleaver for odd/even symbol streams splits memory for sub-carrier number up to half maximum/has common memory and immediate location reuse otherwise |
Publications (2)
Publication Number | Publication Date |
---|---|
EA201000754A1 EA201000754A1 (ru) | 2011-12-30 |
EA017061B1 true EA017061B1 (ru) | 2012-09-28 |
Family
ID=38834518
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EA201000754A EA017061B1 (ru) | 2007-10-30 | 2008-10-29 | Устройство и способ обработки данных |
Country Status (3)
Country | Link |
---|---|
CN (2) | CN101510865B (zh) |
EA (1) | EA017061B1 (zh) |
GB (1) | GB2454195A (zh) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101930426B (zh) | 2009-06-24 | 2015-08-05 | 华为技术有限公司 | 信号处理方法、数据处理方法及装置 |
CN106412608B (zh) | 2010-04-13 | 2019-10-08 | Ge视频压缩有限责任公司 | 用于解码、生成数据流的方法和解码器 |
BR112012026391B1 (pt) | 2010-04-13 | 2020-12-15 | Ge Video Compression, Llc | Herança em amostra de arranjo em subdivisão multitree |
CN106358045B (zh) | 2010-04-13 | 2019-07-19 | Ge视频压缩有限责任公司 | 解码器、解码方法、编码器以及编码方法 |
TWI815295B (zh) | 2010-04-13 | 2023-09-11 | 美商Ge影像壓縮有限公司 | 樣本區域合併技術 |
EP2525496A1 (en) | 2011-05-18 | 2012-11-21 | Panasonic Corporation | Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes |
EP2525497A1 (en) * | 2011-05-18 | 2012-11-21 | Panasonic Corporation | Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes |
EP2552043A1 (en) * | 2011-07-25 | 2013-01-30 | Panasonic Corporation | Spatial multiplexing for bit-interleaved coding and modulation with quasi-cyclic LDPC codes |
CN103166735B (zh) * | 2011-12-15 | 2015-11-25 | 无锡中星微电子有限公司 | 一种交织器的读写方法 |
KR102002559B1 (ko) | 2013-07-05 | 2019-07-22 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
KR20150005853A (ko) * | 2013-07-05 | 2015-01-15 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
CN103581097B (zh) * | 2013-07-15 | 2016-12-28 | 上海数字电视国家工程研究中心有限公司 | 数字信号发射系统 |
US20160126978A1 (en) * | 2013-09-24 | 2016-05-05 | Sony Corporation | Data processing device and data processing method |
KR101775704B1 (ko) * | 2014-05-21 | 2017-09-19 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
US9602245B2 (en) * | 2014-05-21 | 2017-03-21 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
JP6462001B2 (ja) | 2014-12-08 | 2019-01-30 | エルジー エレクトロニクス インコーポレイティド | 放送信号送信装置、放送信号受信装置、放送信号送信方法及び放送信号受信方法 |
CN107666367B (zh) * | 2016-07-29 | 2023-01-03 | 中兴通讯股份有限公司 | 一种编码方法及装置 |
BR112021008311A2 (pt) * | 2018-11-07 | 2021-08-03 | Telefonaktiebolaget Lm Ericsson (Publ) | método para um dispositivo de comunicação associado com uma transmissão sem fio, e, dispositivo de comunicação associado com uma transmissão sem fio |
US11218288B2 (en) * | 2019-01-11 | 2022-01-04 | Mediatek Inc. | Low PAPR reference signal |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6353900B1 (en) * | 1998-09-22 | 2002-03-05 | Qualcomm Incorporated | Coding system having state machine based interleaver |
RU2235429C1 (ru) * | 2003-08-15 | 2004-08-27 | Федеральное государственное унитарное предприятие "Воронежский научно-исследовательский институт связи" | Способ частотно-временной синхронизации системы связи и устройство для его осуществления |
EP1463256A1 (en) * | 2003-03-25 | 2004-09-29 | Sony United Kingdom Limited | Interleaver for mapping symbols on the carriers of an OFDM system |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005051469A (ja) * | 2003-07-28 | 2005-02-24 | Sony Corp | 符号化装置および符号化方法、並びにプログラム |
US7237174B2 (en) * | 2003-09-04 | 2007-06-26 | The Directv Group, Inc. | Method and system for providing short block length low density parity check (LDPC) codes in support of broadband satellite applications |
EP1575175B1 (en) * | 2004-03-10 | 2008-10-08 | Telefonaktiebolaget LM Ericsson (publ) | Address generator for an interleaver memory and a deinterleaver memory |
KR20060097503A (ko) * | 2005-03-11 | 2006-09-14 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널인터리빙/디인터리빙 장치 및 그 제어 방법 |
US7395461B2 (en) * | 2005-05-18 | 2008-07-01 | Seagate Technology Llc | Low complexity pseudo-random interleaver |
-
2007
- 2007-10-30 GB GB0721271A patent/GB2454195A/en not_active Withdrawn
-
2008
- 2008-10-29 EA EA201000754A patent/EA017061B1/ru not_active IP Right Cessation
- 2008-10-30 CN CN2008102421832A patent/CN101510865B/zh active Active
- 2008-10-30 CN CN2008101731070A patent/CN101425992B/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6353900B1 (en) * | 1998-09-22 | 2002-03-05 | Qualcomm Incorporated | Coding system having state machine based interleaver |
EP1463256A1 (en) * | 2003-03-25 | 2004-09-29 | Sony United Kingdom Limited | Interleaver for mapping symbols on the carriers of an OFDM system |
RU2235429C1 (ru) * | 2003-08-15 | 2004-08-27 | Федеральное государственное унитарное предприятие "Воронежский научно-исследовательский институт связи" | Способ частотно-временной синхронизации системы связи и устройство для его осуществления |
Also Published As
Publication number | Publication date |
---|---|
GB0721271D0 (en) | 2007-12-12 |
CN101425992A (zh) | 2009-05-06 |
EA201000754A1 (ru) | 2011-12-30 |
CN101425992B (zh) | 2013-08-14 |
GB2454195A (en) | 2009-05-06 |
CN101510865A (zh) | 2009-08-19 |
CN101510865B (zh) | 2013-12-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Lapse of a eurasian patent due to non-payment of renewal fees within the time limit in the following designated state(s) |
Designated state(s): AM AZ BY KZ KG MD TJ TM |