DK124696A - Fremgangsmåde og apparat til sammenligning af to logiske signaler samt fremgangsmåde og apparat til frembringelse af et fas - Google Patents

Fremgangsmåde og apparat til sammenligning af to logiske signaler samt fremgangsmåde og apparat til frembringelse af et fas

Info

Publication number
DK124696A
DK124696A DK124696A DK124696A DK124696A DK 124696 A DK124696 A DK 124696A DK 124696 A DK124696 A DK 124696A DK 124696 A DK124696 A DK 124696A DK 124696 A DK124696 A DK 124696A
Authority
DK
Denmark
Prior art keywords
comparing
generating
phase
well
logical signals
Prior art date
Application number
DK124696A
Other languages
English (en)
Inventor
Glerskov Christian
Original Assignee
Dsc Communications As
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dsc Communications As filed Critical Dsc Communications As
Priority to DK124696A priority Critical patent/DK124696A/da
Priority to AU48634/97A priority patent/AU4863497A/en
Priority to PCT/DK1997/000505 priority patent/WO1998020614A1/en
Publication of DK124696A publication Critical patent/DK124696A/da

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
    • H03D13/003—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means
    • H03D13/004—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means the logic means delivering pulses at more than one terminal, e.g. up and down pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
DK124696A 1996-11-06 1996-11-06 Fremgangsmåde og apparat til sammenligning af to logiske signaler samt fremgangsmåde og apparat til frembringelse af et fas DK124696A (da)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DK124696A DK124696A (da) 1996-11-06 1996-11-06 Fremgangsmåde og apparat til sammenligning af to logiske signaler samt fremgangsmåde og apparat til frembringelse af et fas
AU48634/97A AU4863497A (en) 1996-11-06 1997-11-05 A method and an apparatus for comparing two logic signals
PCT/DK1997/000505 WO1998020614A1 (en) 1996-11-06 1997-11-05 A method and an apparatus for comparing two logic signals

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DK124696A DK124696A (da) 1996-11-06 1996-11-06 Fremgangsmåde og apparat til sammenligning af to logiske signaler samt fremgangsmåde og apparat til frembringelse af et fas

Publications (1)

Publication Number Publication Date
DK124696A true DK124696A (da) 1998-05-07

Family

ID=8102662

Family Applications (1)

Application Number Title Priority Date Filing Date
DK124696A DK124696A (da) 1996-11-06 1996-11-06 Fremgangsmåde og apparat til sammenligning af to logiske signaler samt fremgangsmåde og apparat til frembringelse af et fas

Country Status (3)

Country Link
AU (1) AU4863497A (da)
DK (1) DK124696A (da)
WO (1) WO1998020614A1 (da)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6462593B2 (en) * 1999-07-22 2002-10-08 Sun Microsystems, Inc. Compensation circuit for low phase offset for phase-locked loops

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3218363A1 (de) * 1982-05-15 1983-11-17 Howaldtswerke-Deutsche Werft Ag Hamburg Und Kiel, 2300 Kiel Schaltungsanordnung zur steuerung eines spannungsabhaengigen oszillators
US5166641A (en) * 1992-03-17 1992-11-24 National Semiconductor Corporation Phase-locked loop with automatic phase offset calibration
US5363066A (en) * 1993-06-16 1994-11-08 At&T Global Information Solutions Company (Fka Ncr Corporation) Fast CMOS charge pump circuit
EP0647032A3 (en) * 1993-10-05 1995-07-26 Ibm Charge pump circuit with symmetrical current output for phase-controlled loop system.

Also Published As

Publication number Publication date
AU4863497A (en) 1998-05-29
WO1998020614A1 (en) 1998-05-14

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Legal Events

Date Code Title Description
AHB Application shelved due to non-payment