DE9212486U1 - Semiconductor body with soldered carrier plate - Google Patents

Semiconductor body with soldered carrier plate

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Publication number
DE9212486U1
DE9212486U1 DE9212486U DE9212486U DE9212486U1 DE 9212486 U1 DE9212486 U1 DE 9212486U1 DE 9212486 U DE9212486 U DE 9212486U DE 9212486 U DE9212486 U DE 9212486U DE 9212486 U1 DE9212486 U1 DE 9212486U1
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Prior art keywords
layer
semiconductor body
nickel
carrier plate
silver
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Expired - Lifetime
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DE9212486U
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German (de)
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Siemens AG
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Siemens AG
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Priority to DE9212486U priority Critical patent/DE9212486U1/en
Publication of DE9212486U1 publication Critical patent/DE9212486U1/en
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Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492Bases or plates or solder therefor
    • H01L23/4924Bases or plates or solder therefor characterised by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01022Titanium [Ti]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01028Nickel [Ni]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0105Tin [Sn]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)

Description

92 &Bgr; 1 6 H DE92 β 1 6 H EN

Siemens AktiengesellschaftSiemens AG

Halbleiterkörper mit verlöteter Trägerplatte 5Semiconductor body with soldered carrier plate 5

Die Erfindung bezieht sich auf einen aus Silizium bestehenden Halbleiterkörper, der mit einer metallenen Trägerplatte über eine Folge von Metallschichten verlötbar ist, die ausgehend vom Silizium in Richtung zur Trägerplatte vor dem Löten eine Nickelschicht und eine Silberschicht enthält.The invention relates to a semiconductor body made of silicon, which can be soldered to a metal carrier plate via a sequence of metal layers which, starting from the silicon and moving towards the carrier plate, contain a nickel layer and a silver layer before soldering.

Solche Halbleiterkörper sind in Halbleiterbauelemente eingebaut, die sich in großer Zahl am Markt befinden. Die Folge von Metallschichten enthält, wie in der Figur dargestellt, eine Aluminiumschicht 3, die auf einem Silizium-Halbleiterkörper l sitzt. Die Aluminiumschicht haftet gut auf Silizium und bildet insbesondere mit p-dotiertem Silizium einen einwandfreien ohmschen Kontakt. Auf der Aluminiumschicht 3 sitzt eine Titanschicht 4, die als Haftvermittler und Diffusionssperre zwischen einer auf der Titanschicht 4 sitzenden Nickelschicht 5 und der Aluminiumschicht 3 dient. Auf die Nickelschicht 5 wird nach dem Stand der Technik direkt eine Silberschicht 7 aufgebracht. Das Silber haftet jedoch nicht sehr gut auf dem Nickel, so daß bei mechanischer oder thermischer Beanspruchung (z.B. Messungen bei Temperaturen > 500C vor dem Löten die Silberschicht von der Nickelschicht abgelöst werden kann. Dies tritt insbesondere dann auf, wenn die Halbleiterkörper nach dem Sägen von einer Sägefolie entfernt werden müssen.Such semiconductor bodies are built into semiconductor components, which are available in large numbers on the market. The sequence of metal layers contains, as shown in the figure, an aluminum layer 3 which sits on a silicon semiconductor body 1. The aluminum layer adheres well to silicon and forms a perfect ohmic contact, particularly with p-doped silicon. A titanium layer 4 sits on the aluminum layer 3 and serves as an adhesion promoter and diffusion barrier between a nickel layer 5 sitting on the titanium layer 4 and the aluminum layer 3. According to the state of the art, a silver layer 7 is applied directly to the nickel layer 5. However, the silver does not adhere very well to the nickel, so that under mechanical or thermal stress (e.g. measurements at temperatures > 50 0 C before soldering), the silver layer can be detached from the nickel layer. This occurs in particular when the semiconductor bodies have to be removed from a sawing foil after sawing.

92 6 1 6 H OE92 6 1 6 H OE

Der Erfindung liegt die Aufgabe zugrunde, die mechanische Haftung der Silberschicht auf der Nickelschicht ohne Verschlechterung der Lötfähigkeit zu verbessern. Diese Aufgabe wird gelöst durch eine zwischen der Nickelschicht und der Silberschicht liegende Titanschicht mit einer Dicke von weniger als 15 ran.The invention is based on the object of improving the mechanical adhesion of the silver layer to the nickel layer without impairing the solderability. This object is achieved by a titanium layer with a thickness of less than 15 μm lying between the nickel layer and the silver layer.

Vorzugsweise beträgt die Dicke der Titanschicht etwa 3 nm.Preferably, the thickness of the titanium layer is about 3 nm.

In der Figur ist die Schichtfolge der Metalle vor dem Verlöten gezeigt. Gemäß der Erfindung liegt zwischen der Nickelschicht 5 und der Silberschicht 7 eine Titanschicht 6 mit einer Dicke weniger als 15 nm. Die Titanschicht 6 dient in bekannter Weise als Haftvermittler zwischen der Silberschicht und der Nickelschicht, d.h. die Haftung der einzelnen Schichten zueinander wird deutlich verbessert und ein Ablösen der Silberschicht vermieden. Die geringe Dicke der Titanschicht von vorzugsweise etwa 3 nm ist so gewählt, daß sie beim Lötvorgang vollständig aufgelöst wird und die eigentliche Lötverbindung - wie allgemein üblich und bekannt wieder zwischen dem Lot (Zinn) und dem Nickel stattfinden kann. Aufgrund der nur geringen Titanmenge werden Benetzung und Fließverhalten des Lotes sowie die Stabilität der Lotverbindung nicht beeinträchtigt. Beim Lötvorgang schmilzt die zwischen die Trägerplatte 2 und die Silberschicht 7 des Halbleiterkörpers eingelegte Lotschicht (z.B. aus Zinn/Silber) - in der Figur mit 8 bezeichnet - auf, die Silberschicht 7 und die sehr dünne Titanschicht 6 werden aufgelöst. Von der dann folgenden Nickelschicht 5 wird nur eine Dicke von 1/1000 der Lotschichtdicke angelöst, da nach dem Phasendiagramm für Zinn/Nickel bei den üblichen Löttemperaturen (250° - 4000C) nur relativ wenig Nickel (etwa 1%)The figure shows the layer sequence of the metals before soldering. According to the invention, a titanium layer 6 with a thickness of less than 15 nm is located between the nickel layer 5 and the silver layer 7. The titanium layer 6 serves in a known manner as an adhesion promoter between the silver layer and the nickel layer, i.e. the adhesion of the individual layers to one another is significantly improved and detachment of the silver layer is avoided. The small thickness of the titanium layer of preferably about 3 nm is selected so that it is completely dissolved during the soldering process and the actual solder connection - as is generally usual and known - can take place again between the solder (tin) and the nickel. Due to the small amount of titanium, the wetting and flow behavior of the solder and the stability of the solder connection are not impaired. During the soldering process, the solder layer (e.g. made of tin/silver) - designated 8 in the figure - inserted between the carrier plate 2 and the silver layer 7 of the semiconductor body melts, the silver layer 7 and the very thin titanium layer 6 are dissolved. Of the nickel layer 5 that follows, only a thickness of 1/1000 of the solder layer thickness is dissolved, since according to the phase diagram for tin/nickel at the usual soldering temperatures (250° - 400 0 C) only relatively little nickel (about 1%)

92 6 1 6 H OE92 6 1 6 H OE

durch das Zinn aufgelöst wird. Auch mit vergleichsweise dünnen Nickelschichten (~l/un) auf der Chiprückseite sind deshalb gute Lötverbindungen möglich. Die beschriebene Schichtenfolge ergibt einen mechanisch und elektrisch stabilen Kontakt.is dissolved by the tin. Good solder connections are therefore possible even with comparatively thin nickel layers (~l/un) on the back of the chip. The layer sequence described results in a mechanically and electrically stable contact.

Die Erfindung ist zwar für einen Kontakt mit einer Schichtfolge Al/Ti/NI/Ti/Ag beschrieben worden. Sie ist jedoch selbstverständlich auch für Schichtfolgen anwendbar, bei der zwischen der Nickelschicht 5 und dem Halbleiterkörper l andere Metallschichten vorgesehen sind. Wesentlich ist, daß die dünne Titanschicht als haftvermittelnde Schicht zwischen einer Nickelschicht und einer Silberschicht liegt, die Silber- und Titanschicht beim Löten aufgelöst werden, die Nickelschicht jedoch, wie üblich, nur angelöst wird.The invention has been described for a contact with a layer sequence Al/Ti/NI/Ti/Ag. However, it is of course also applicable to layer sequences in which other metal layers are provided between the nickel layer 5 and the semiconductor body 1. It is important that the thin titanium layer is located as an adhesion-promoting layer between a nickel layer and a silver layer, the silver and titanium layers are dissolved during soldering, but the nickel layer is only partially dissolved, as is usual.

Claims (2)

92 6 1 6 U OE Schutzanspruche92 6 1 6 U OE Protection claims 1. Aus Silizium bestehender Halbleiterkörper (l), der mit einer metallenen Trägerplatte (2) über eine Folge von Metallschichten verlötbar ist, die vor dem Löten ausgehend vom Silizium in Richtung zur Trägerplatte eine Nickelschicht (5) und eine Silberschicht (7) enthält,1. Semiconductor body (l) made of silicon, which can be soldered to a metal carrier plate (2) via a sequence of metal layers which, prior to soldering, contain a nickel layer (5) and a silver layer (7) starting from the silicon in the direction of the carrier plate, gekennzeichnet durch eine zwischen der Nickelschicht (5) und der Silberschicht (7) liegende Titanschicht (6) mit einer Dicke von weniger als 15 nm.characterized by a titanium layer (6) with a thickness of less than 15 nm located between the nickel layer (5) and the silver layer (7). 2. Halbleiterkörper nach Anspruch l,2. Semiconductor body according to claim 1, gekennzeichnet durch eine Dicke der Titanschicht (6) von etwa 3 nm.characterized by a thickness of the titanium layer (6) of about 3 nm.
DE9212486U 1992-09-16 1992-09-16 Semiconductor body with soldered carrier plate Expired - Lifetime DE9212486U1 (en)

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Application Number Priority Date Filing Date Title
DE9212486U DE9212486U1 (en) 1992-09-16 1992-09-16 Semiconductor body with soldered carrier plate

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Application Number Priority Date Filing Date Title
DE9212486U DE9212486U1 (en) 1992-09-16 1992-09-16 Semiconductor body with soldered carrier plate

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0756325A2 (en) * 1995-07-27 1997-01-29 Philips Patentverwaltung GmbH Semiconductor device having a base
EP0788150A2 (en) * 1996-02-01 1997-08-06 Siemens Aktiengesellschaft Method of soldering a semi-conductor body to a metallic supporting plate
EP0790647A2 (en) * 1996-02-19 1997-08-20 Siemens Aktiengesellschaft Semiconductor body having a solder layer and method of soldering the semiconductor body on a metal suppporting plate
WO1999008322A1 (en) * 1997-08-08 1999-02-18 Siemens Aktiengesellschaft Semiconductor with metal coating on its rear surface
DE102005042780B4 (en) * 2004-09-08 2017-02-02 Denso Corporation A tin-based solder layer semiconductor device and method of manufacturing the same

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0756325A2 (en) * 1995-07-27 1997-01-29 Philips Patentverwaltung GmbH Semiconductor device having a base
EP0756325A3 (en) * 1995-07-27 1998-12-30 Philips Patentverwaltung GmbH Semiconductor device having a base
EP0788150A2 (en) * 1996-02-01 1997-08-06 Siemens Aktiengesellschaft Method of soldering a semi-conductor body to a metallic supporting plate
EP0788150A3 (en) * 1996-02-01 1998-09-23 Siemens Aktiengesellschaft Method of soldering a semi-conductor body to a metallic supporting plate
EP0790647A2 (en) * 1996-02-19 1997-08-20 Siemens Aktiengesellschaft Semiconductor body having a solder layer and method of soldering the semiconductor body on a metal suppporting plate
EP0790647A3 (en) * 1996-02-19 1999-06-02 Siemens Aktiengesellschaft Semiconductor body having a solder layer and method of soldering the semiconductor body on a metal suppporting plate
WO1999008322A1 (en) * 1997-08-08 1999-02-18 Siemens Aktiengesellschaft Semiconductor with metal coating on its rear surface
US6147403A (en) * 1997-08-08 2000-11-14 Infineon Technologies Ag Semiconductor body with metallizing on the back side
US6309965B1 (en) 1997-08-08 2001-10-30 Siemens Aktiengesellschaft Method of producing a semiconductor body with metallization on the back side that includes a titanium nitride layer to reduce warping
DE102005042780B4 (en) * 2004-09-08 2017-02-02 Denso Corporation A tin-based solder layer semiconductor device and method of manufacturing the same

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