DE69916988D1 - Konfigurierbarer Reed-Solomon Kodierer/Dekodierer - Google Patents

Konfigurierbarer Reed-Solomon Kodierer/Dekodierer

Info

Publication number
DE69916988D1
DE69916988D1 DE69916988T DE69916988T DE69916988D1 DE 69916988 D1 DE69916988 D1 DE 69916988D1 DE 69916988 T DE69916988 T DE 69916988T DE 69916988 T DE69916988 T DE 69916988T DE 69916988 D1 DE69916988 D1 DE 69916988D1
Authority
DE
Germany
Prior art keywords
decoder
encoder
reed
solomon
parameters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69916988T
Other languages
English (en)
Other versions
DE69916988T2 (de
Inventor
Tod D Wolf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69916988D1 publication Critical patent/DE69916988D1/de
Application granted granted Critical
Publication of DE69916988T2 publication Critical patent/DE69916988T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1515—Reed-Solomon codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6569—Implementation on processors, e.g. DSPs, or software implementations
DE69916988T 1998-12-30 1999-12-23 Konfigurierbarer Reed-Solomon Kodierer/Dekodierer Expired - Lifetime DE69916988T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11418698P 1998-12-30 1998-12-30

Publications (2)

Publication Number Publication Date
DE69916988D1 true DE69916988D1 (de) 2004-06-09
DE69916988T2 DE69916988T2 (de) 2004-10-21

Family

ID=22353818

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69916988T Expired - Lifetime DE69916988T2 (de) 1998-12-30 1999-12-23 Konfigurierbarer Reed-Solomon Kodierer/Dekodierer

Country Status (5)

Country Link
US (1) US6385751B1 (de)
EP (1) EP1017177B1 (de)
JP (1) JP2000209102A (de)
AT (1) ATE266278T1 (de)
DE (1) DE69916988T2 (de)

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US7403981B2 (en) 2002-01-04 2008-07-22 Quicksilver Technology, Inc. Apparatus and method for adaptive multimedia reception and transmission in communication environments
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US7660984B1 (en) 2003-05-13 2010-02-09 Quicksilver Technology Method and system for achieving individualized protected space in an operating system
US7120858B2 (en) * 2002-08-21 2006-10-10 Sun Microsystems, Inc. Method and device for off-loading message digest calculations
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US7472155B2 (en) * 2003-12-29 2008-12-30 Xilinx, Inc. Programmable logic device with cascading DSP slices
US7844653B2 (en) * 2003-12-29 2010-11-30 Xilinx, Inc. Digital signal processing circuit having a pre-adder circuit
US7853634B2 (en) * 2003-12-29 2010-12-14 Xilinx, Inc. Digital signal processing circuit having a SIMD circuit
US7853636B2 (en) 2003-12-29 2010-12-14 Xilinx, Inc. Digital signal processing circuit having a pattern detector circuit for convergent rounding
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US7467175B2 (en) * 2003-12-29 2008-12-16 Xilinx, Inc. Programmable logic device with pipelined DSP slices
US8495122B2 (en) * 2003-12-29 2013-07-23 Xilinx, Inc. Programmable device with dynamic DSP architecture
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US7370258B2 (en) * 2005-04-28 2008-05-06 Sandbridge Technologies Inc. Iterative concatenated convolutional Reed-Solomon decoding method
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JP2007141310A (ja) * 2005-11-16 2007-06-07 Canon Inc 情報記録再生装置
US8225185B1 (en) * 2007-02-07 2012-07-17 Marvell International, Ltd. RS codec architecture that combines a compact encoder and serial BMA
US8255758B2 (en) * 2008-01-21 2012-08-28 Apple Inc. Decoding of error correction code using partial bit inversion
US8327242B1 (en) 2008-04-10 2012-12-04 Apple Inc. High-performance ECC decoder
US8484541B1 (en) 2008-11-14 2013-07-09 Apple Inc. Configurable encoder for cyclic error correction codes
US8543635B2 (en) * 2009-01-27 2013-09-24 Xilinx, Inc. Digital signal processing block with preadder stage
US8479133B2 (en) * 2009-01-27 2013-07-02 Xilinx, Inc. Method of and circuit for implementing a filter in an integrated circuit
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US8453038B2 (en) * 2009-06-30 2013-05-28 Apple Inc. Chien search using multiple basis representation
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JPWO2012108411A1 (ja) 2011-02-10 2014-07-03 日本電気株式会社 符号化／復号化処理プロセッサ、および無線通信装置
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Also Published As

Publication number Publication date
EP1017177B1 (de) 2004-05-06
ATE266278T1 (de) 2004-05-15
US6385751B1 (en) 2002-05-07
EP1017177A1 (de) 2000-07-05
DE69916988T2 (de) 2004-10-21
JP2000209102A (ja) 2000-07-28

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