DE69827601D1 - Verfahren zum Lesen einer Mehrbitspeicherzelle - Google Patents

Verfahren zum Lesen einer Mehrbitspeicherzelle

Info

Publication number
DE69827601D1
DE69827601D1 DE69827601T DE69827601T DE69827601D1 DE 69827601 D1 DE69827601 D1 DE 69827601D1 DE 69827601 T DE69827601 T DE 69827601T DE 69827601 T DE69827601 T DE 69827601T DE 69827601 D1 DE69827601 D1 DE 69827601D1
Authority
DE
Germany
Prior art keywords
reading
memory cell
bit memory
bit
cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69827601T
Other languages
English (en)
Inventor
Franco Maloberti
Andrea Oneto
Guido Torelli
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69827601D1 publication Critical patent/DE69827601D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
DE69827601T 1998-03-27 1998-03-27 Verfahren zum Lesen einer Mehrbitspeicherzelle Expired - Lifetime DE69827601D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP98830188A EP0945869B1 (de) 1998-03-27 1998-03-27 Verfahren zum Lesen einer Mehrbitspeicherzelle
US09/276,214 US6084797A (en) 1998-03-27 1999-03-25 Method for reading a multiple-level memory cell

Publications (1)

Publication Number Publication Date
DE69827601D1 true DE69827601D1 (de) 2004-12-23

Family

ID=26152138

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69827601T Expired - Lifetime DE69827601D1 (de) 1998-03-27 1998-03-27 Verfahren zum Lesen einer Mehrbitspeicherzelle

Country Status (4)

Country Link
US (1) US6084797A (de)
EP (1) EP0945869B1 (de)
JP (1) JP2000057787A (de)
DE (1) DE69827601D1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6185128B1 (en) * 1999-10-19 2001-02-06 Advanced Micro Devices, Inc. Reference cell four-way switch for a simultaneous operation flash memory device
EP1416496A1 (de) * 2002-11-04 2004-05-06 Dialog Semiconductor GmbH Multibit RAM Speicheranordnung
TWI258768B (en) * 2004-03-10 2006-07-21 Samsung Electronics Co Ltd Sense amplifier and method for generating variable reference level
US7768527B2 (en) * 2006-05-31 2010-08-03 Beihang University Hardware-in-the-loop simulation system and method for computer vision
US7616483B2 (en) * 2006-07-03 2009-11-10 Sandisk Corporation Multi-bit-per-cell flash memory device with an extended set of commands
FR3029661B1 (fr) * 2014-12-04 2016-12-09 Stmicroelectronics Rousset Procedes de transmission et de reception d'un signal binaire sur un lien serie, en particulier pour la detection de la vitesse de transmission, et dispositifs correspondants

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5095344A (en) * 1988-06-08 1992-03-10 Eliyahou Harari Highly compact eprom and flash eeprom devices
US5043940A (en) * 1988-06-08 1991-08-27 Eliyahou Harari Flash EEPROM memory systems having multistate storage cells
US5172338B1 (en) * 1989-04-13 1997-07-08 Sandisk Corp Multi-state eeprom read and write circuits and techniques
JP3205658B2 (ja) * 1993-12-28 2001-09-04 新日本製鐵株式会社 半導体記憶装置の読み出し方法
EP0757355B1 (de) * 1995-07-31 2000-04-19 STMicroelectronics S.r.l. Gemischtes serielles paralleles dichotomisches Leseverfahren für nichtflüchtige Mehrpegel-Speicherzellen und Leseschaltung mit Verwendung eines solchen Verfahrens
DE69626631T2 (de) * 1996-06-05 2003-11-06 St Microelectronics Srl Seitenmodusspeicher mit Mehrpegelspeicherzellen
US5982659A (en) * 1996-12-23 1999-11-09 Lsi Logic Corporation Memory cell capable of storing more than two logic states by using different via resistances
US5761110A (en) * 1996-12-23 1998-06-02 Lsi Logic Corporation Memory cell capable of storing more than two logic states by using programmable resistances
US5808932A (en) * 1996-12-23 1998-09-15 Lsi Logic Corporation Memory system which enables storage and retrieval of more than two states in a memory cell
US5867423A (en) * 1997-04-10 1999-02-02 Lsi Logic Corporation Memory circuit and method for multivalued logic storage by process variations

Also Published As

Publication number Publication date
EP0945869B1 (de) 2004-11-17
EP0945869A1 (de) 1999-09-29
US6084797A (en) 2000-07-04
JP2000057787A (ja) 2000-02-25

Similar Documents

Publication Publication Date Title
DE59704729D1 (de) Verfahren zum betrieb einer speicherzellenanordnung
DE69424771T2 (de) Anordnung zum Lesen einer Speicherzellenmatrix
DE69720080T2 (de) Herstellungsverfahren für eine flash-speicherzelle
DE59912231D1 (de) Verfahren zum Speichern von Positionsdaten
DE69929943D1 (de) Ein Leseverstärker für Speicherzellen
DE69522738T2 (de) Verfahren und Schaltkreis zum Programmieren einer Schwebegatterspeicherzelle
DE69811181T2 (de) Leseverfahren für ferroelektrischen 1T/1C-Speicher
DE69831790D1 (de) Verfahren zum Lesen während des Schreibens in einer Datenspeichervorrichtung
DE69513113D1 (de) Verfahren zum synchronen Speicherzugriff
DE10125036B8 (de) Verfahren zum Schützen einer Solarzelle
DE69712005D1 (de) Datenleseschaltungsanordnung und Verfahren für eine Mehrbitszelle
DE69822536D1 (de) Schaltung und Verfahren zum Verriegeln einer Bitleitung in einem nichtlflüchtigem Speicher
DE59913986D1 (de) Verfahren zum herstellen einer speicherzelle
DE69820246D1 (de) Schaltung und Verfahren zum Lesen eines nichtflüchtigen Speichers
ATE255820T1 (de) Verfahren zum pelletieren
DE69928963D1 (de) Absorberstab zum einsatz in einem kernreaktorsteuerstabbündel
DE69827601D1 (de) Verfahren zum Lesen einer Mehrbitspeicherzelle
DE10393702D2 (de) Verfahren zum Hertstellen einer Speicherzelle, Speicherzelle und Speicherzellen-Anordnung
DE60102203D1 (de) Programmierverfahren für eine Mehrpegelspeicherzelle
DE69719584D1 (de) Verfahren zum Programmieren einer Flash-Speicherzelle
DE69525035T2 (de) Verfahren zum testen einer speicheradressen-dekodierschaltung
DE69929571D1 (de) Verfahren und Schaltkreis zum Programmieren einer Speicherzelle
DE69708380T2 (de) Verfahren zum Lesen einer Chipkarte
DE69718846T2 (de) Verfahren zum Speicherzugriff
DE69838101D1 (de) Verfahren zum Lesen eines Speichers, insbesondere eines nichtflüchtigen Speichers

Legal Events

Date Code Title Description
8332 No legal effect for de