DE69800026D1 - GaAs-basierender MOSFET und Verfahren zur Herstellung - Google Patents

GaAs-basierender MOSFET und Verfahren zur Herstellung

Info

Publication number
DE69800026D1
DE69800026D1 DE69800026T DE69800026T DE69800026D1 DE 69800026 D1 DE69800026 D1 DE 69800026D1 DE 69800026 T DE69800026 T DE 69800026T DE 69800026 T DE69800026 T DE 69800026T DE 69800026 D1 DE69800026 D1 DE 69800026D1
Authority
DE
Germany
Prior art keywords
gaas
manufacturing
based mosfet
mosfet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69800026T
Other languages
English (en)
Other versions
DE69800026T2 (de
Inventor
Alfred Yi Cho
Minghwei Hong
James Robert Lothian
Joseph Petrus Mannaerts
Fan Ren
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia of America Corp
Original Assignee
Lucent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lucent Technologies Inc filed Critical Lucent Technologies Inc
Application granted granted Critical
Publication of DE69800026D1 publication Critical patent/DE69800026D1/de
Publication of DE69800026T2 publication Critical patent/DE69800026T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/517Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28264Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being a III-V compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66522Unipolar field-effect transistors with an insulated gate, i.e. MISFET with an active layer made of a group 13/15 material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE69800026T 1997-02-24 1998-02-17 GaAs-basierender MOSFET und Verfahren zur Herstellung Expired - Lifetime DE69800026T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/804,782 US5903037A (en) 1997-02-24 1997-02-24 GaAs-based MOSFET, and method of making same

Publications (2)

Publication Number Publication Date
DE69800026D1 true DE69800026D1 (de) 1999-11-18
DE69800026T2 DE69800026T2 (de) 2000-06-29

Family

ID=25189821

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69800026T Expired - Lifetime DE69800026T2 (de) 1997-02-24 1998-02-17 GaAs-basierender MOSFET und Verfahren zur Herstellung

Country Status (4)

Country Link
US (1) US5903037A (de)
EP (1) EP0863552B1 (de)
JP (1) JP3187764B2 (de)
DE (1) DE69800026T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5962883A (en) * 1994-03-23 1999-10-05 Lucent Technologies Inc. Article comprising an oxide layer on a GaAs-based semiconductor body
US6271069B1 (en) * 1994-03-23 2001-08-07 Agere Systems Guardian Corp. Method of making an article comprising an oxide layer on a GaAs-based semiconductor body
US6495407B1 (en) * 1998-09-18 2002-12-17 Agere Systems Inc. Method of making an article comprising an oxide layer on a GaAs-based semiconductor body
US6326732B1 (en) * 1999-02-16 2001-12-04 International Business Machines Corporation Apparatus and method for non-contact stress evaluation of wafer gate dielectric reliability
US6855613B1 (en) 1999-11-04 2005-02-15 Lucent Technologies Inc. Method of fabricating a heterojunction bipolar transistor
US7442654B2 (en) * 2002-01-18 2008-10-28 Freescale Semiconductor, Inc. Method of forming an oxide layer on a compound semiconductor structure
US6756320B2 (en) * 2002-01-18 2004-06-29 Freescale Semiconductor, Inc. Method of forming article comprising an oxide layer on a GaAs-based semiconductor structure
AU2003217189A1 (en) * 2002-01-22 2003-09-02 Massachusetts Institute Of Technology A method of fabrication for iii-v semiconductor surface passivation
US20060284282A1 (en) * 2003-09-02 2006-12-21 Epitactix Pty Ltd Heterjunction bipolar transistor with tunnelling mis emitter junction
FR2864457B1 (fr) * 2003-12-31 2006-12-08 Commissariat Energie Atomique Procede de nettoyage par voie humide d'une surface notamment en un materiau de type silicium germanium.
US9901244B2 (en) 2009-06-18 2018-02-27 Endochoice, Inc. Circuit board assembly of a multiple viewing elements endoscope
CN114108079A (zh) * 2021-10-12 2022-03-01 材料科学姑苏实验室 真空互联系统及其自动传输方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06350078A (ja) * 1993-06-08 1994-12-22 Fujitsu Ltd 半導体装置とその製造方法
US5451548A (en) * 1994-03-23 1995-09-19 At&T Corp. Electron beam deposition of gallium oxide thin films using a single high purity crystal source
US5550089A (en) * 1994-03-23 1996-08-27 Lucent Technologies Inc. Gallium oxide coatings for optoelectronic devices using electron beam evaporation of a high purity single crystal Gd3 Ga5 O12 source.

Also Published As

Publication number Publication date
EP0863552A1 (de) 1998-09-09
JPH10242465A (ja) 1998-09-11
JP3187764B2 (ja) 2001-07-11
US5903037A (en) 1999-05-11
EP0863552B1 (de) 1999-10-13
DE69800026T2 (de) 2000-06-29

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Legal Events

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