DE69728086D1 - Erweiterte symmetrische Multiprozessorarchitektur - Google Patents
Erweiterte symmetrische MultiprozessorarchitekturInfo
- Publication number
- DE69728086D1 DE69728086D1 DE69728086T DE69728086T DE69728086D1 DE 69728086 D1 DE69728086 D1 DE 69728086D1 DE 69728086 T DE69728086 T DE 69728086T DE 69728086 T DE69728086 T DE 69728086T DE 69728086 D1 DE69728086 D1 DE 69728086D1
- Authority
- DE
- Germany
- Prior art keywords
- symmetric multiprocessor
- multiprocessor architecture
- advanced
- advanced symmetric
- architecture
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0817—Cache consistency protocols using directory methods
- G06F12/0826—Limited pointers directories; State-only directories without pointers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1072—Decentralised address translation, e.g. in distributed shared memory systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0813—Multiuser, multiprocessor or multiprocessing cache systems with a network or matrix configuration
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Bus Control (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/675,362 US5805839A (en) | 1996-07-02 | 1996-07-02 | Efficient technique for implementing broadcasts on a system of hierarchical buses |
US08/675,361 US5796605A (en) | 1996-07-02 | 1996-07-02 | Extended symmetrical multiprocessor address mapping |
US08/675,363 US5754877A (en) | 1996-07-02 | 1996-07-02 | Extended symmetrical multiprocessor architecture |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69728086D1 true DE69728086D1 (de) | 2004-04-22 |
Family
ID=27418298
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69728086T Expired - Lifetime DE69728086D1 (de) | 1996-07-02 | 1997-06-30 | Erweiterte symmetrische Multiprozessorarchitektur |
Country Status (3)
Country | Link |
---|---|
EP (2) | EP1408416A2 (de) |
JP (1) | JPH10187631A (de) |
DE (1) | DE69728086D1 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7013305B2 (en) | 2001-10-01 | 2006-03-14 | International Business Machines Corporation | Managing the state of coupling facility structures, detecting by one or more systems coupled to the coupling facility, the suspended state of the duplexed command, detecting being independent of message exchange |
DE19904084B4 (de) * | 1999-02-02 | 2008-12-11 | Force Computers Gmbh | Computer |
EP1181648A1 (de) * | 1999-04-09 | 2002-02-27 | Clearspeed Technology Limited | Paralleldatenverarbeitungsvorrichtung |
US20020124083A1 (en) | 2000-09-06 | 2002-09-05 | Sun Microsystems, Inc. | Method and apparatus for increasing the efficiency of transactions and connection sharing in an enterprise environment |
US6910158B2 (en) | 2001-10-01 | 2005-06-21 | International Business Machines Corporation | Test tool and methods for facilitating testing of duplexed computer functions |
US6944787B2 (en) | 2001-10-01 | 2005-09-13 | International Business Machines Corporation | System-managed duplexing of coupling facility structures |
US6813726B2 (en) | 2001-10-01 | 2004-11-02 | International Business Machines Corporation | Restarting a coupling facility command using a token from another coupling facility command |
US6859866B2 (en) | 2001-10-01 | 2005-02-22 | International Business Machines Corporation | Synchronizing processing of commands invoked against duplexed coupling facility structures |
US7099935B2 (en) | 2001-10-01 | 2006-08-29 | International Business Machines Corporation | Dynamically determining whether to process requests synchronously or asynchronously |
US6954817B2 (en) | 2001-10-01 | 2005-10-11 | International Business Machines Corporation | Providing at least one peer connection between a plurality of coupling facilities to couple the plurality of coupling facilities |
JP4101666B2 (ja) * | 2002-01-22 | 2008-06-18 | 松下電器産業株式会社 | 情報記録媒体、記録装置、再生装置、記録方法、再生方法 |
CN102110072B (zh) * | 2009-12-29 | 2013-06-05 | 中兴通讯股份有限公司 | 一种多处理器完全互访的方法及系统 |
US10628313B2 (en) | 2017-05-26 | 2020-04-21 | International Business Machines Corporation | Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cache |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4240143A (en) * | 1978-12-22 | 1980-12-16 | Burroughs Corporation | Hierarchical multi-processor network for memory sharing |
JPH07122864B2 (ja) * | 1991-07-22 | 1995-12-25 | インターナショナル・ビジネス・マシーンズ・コーポレイション | データ処理システム、データ処理システムに使用するインターフエース回路及びデータ・プロセツサ間の通信方法 |
-
1997
- 1997-06-30 EP EP20030079201 patent/EP1408416A2/de not_active Withdrawn
- 1997-06-30 DE DE69728086T patent/DE69728086D1/de not_active Expired - Lifetime
- 1997-06-30 EP EP97304797A patent/EP0817095B1/de not_active Expired - Lifetime
- 1997-07-02 JP JP9211430A patent/JPH10187631A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0817095A2 (de) | 1998-01-07 |
EP0817095A3 (de) | 1998-08-26 |
EP1408416A2 (de) | 2004-04-14 |
JPH10187631A (ja) | 1998-07-21 |
EP0817095B1 (de) | 2004-03-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de |