DE69715203D1 - Ein Datenverarbeitungssystem mit cc-NUMA (cache coherent, non-uniform memory access) Architektur und im lokalen Speicher enthaltenem Cache-Speicher für Fernzugriff - Google Patents

Ein Datenverarbeitungssystem mit cc-NUMA (cache coherent, non-uniform memory access) Architektur und im lokalen Speicher enthaltenem Cache-Speicher für Fernzugriff

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Publication number
DE69715203D1
DE69715203D1 DE69715203T DE69715203T DE69715203D1 DE 69715203 D1 DE69715203 D1 DE 69715203D1 DE 69715203 T DE69715203 T DE 69715203T DE 69715203 T DE69715203 T DE 69715203T DE 69715203 D1 DE69715203 D1 DE 69715203D1
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DE
Germany
Prior art keywords
memory
cache
access
numa
architecture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69715203T
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English (en)
Other versions
DE69715203T2 (de
Inventor
Angelo Casamatta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull Sa Les Clayes Sous Bois Fr
Original Assignee
Bull SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SA filed Critical Bull SA
Application granted granted Critical
Publication of DE69715203D1 publication Critical patent/DE69715203D1/de
Publication of DE69715203T2 publication Critical patent/DE69715203T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0813—Multiuser, multiprocessor or multiprocessing cache systems with a network or matrix configuration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/25—Using a specific main memory architecture
    • G06F2212/254—Distributed memory
    • G06F2212/2542—Non-uniform memory access [NUMA] architecture

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE69715203T 1997-10-10 1997-10-10 Ein Datenverarbeitungssystem mit cc-NUMA (cache coherent, non-uniform memory access) Architektur und im lokalen Speicher enthaltenem Cache-Speicher für Fernzugriff Expired - Lifetime DE69715203T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP97830508A EP0908825B1 (de) 1997-10-10 1997-10-10 Ein Datenverarbeitungssystem mit cc-NUMA (cache coherent, non-uniform memory access) Architektur und im lokalen Speicher enthaltenem Cache-Speicher für Fernzugriff

Publications (2)

Publication Number Publication Date
DE69715203D1 true DE69715203D1 (de) 2002-10-10
DE69715203T2 DE69715203T2 (de) 2003-07-31

Family

ID=8230808

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69715203T Expired - Lifetime DE69715203T2 (de) 1997-10-10 1997-10-10 Ein Datenverarbeitungssystem mit cc-NUMA (cache coherent, non-uniform memory access) Architektur und im lokalen Speicher enthaltenem Cache-Speicher für Fernzugriff

Country Status (4)

Country Link
US (1) US6243794B1 (de)
EP (1) EP0908825B1 (de)
JP (1) JPH11232173A (de)
DE (1) DE69715203T2 (de)

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US7330904B1 (en) * 2000-06-07 2008-02-12 Network Appliance, Inc. Communication of control information and data in client/server systems
US6742072B1 (en) * 2000-08-31 2004-05-25 Hewlett-Packard Development Company, Lp. Method and apparatus for supporting concurrent system area network inter-process communication and I/O
US20020161453A1 (en) * 2001-04-25 2002-10-31 Peltier Michael G. Collective memory network for parallel processing and method therefor
US7130841B1 (en) * 2001-07-31 2006-10-31 America Online, Inc. Enabling a search for both local and remote electronic content
US6721852B2 (en) * 2001-10-17 2004-04-13 Sun Microsystems, Inc. Computer system employing multiple board sets and coherence schemes
US20030115402A1 (en) * 2001-11-16 2003-06-19 Fredrik Dahlgren Multiprocessor system
US6973544B2 (en) * 2002-01-09 2005-12-06 International Business Machines Corporation Method and apparatus of using global snooping to provide cache coherence to distributed computer nodes in a single coherent system
US7096323B1 (en) * 2002-09-27 2006-08-22 Advanced Micro Devices, Inc. Computer system with processor cache that stores remote cache presence information
US6868485B1 (en) 2002-09-27 2005-03-15 Advanced Micro Devices, Inc. Computer system with integrated directory and processor cache
US7043579B2 (en) * 2002-12-05 2006-05-09 International Business Machines Corporation Ring-topology based multiprocessor data access bus
US7190367B2 (en) * 2003-03-25 2007-03-13 Mitsubishi Electric Research Laboratories, Inc. Method, apparatus, and system for rendering using a progressive cache
JP2005056121A (ja) * 2003-08-04 2005-03-03 Sony Corp 情報処理装置および方法、情報処理システム、記録媒体、並びにプログラム
JP4376040B2 (ja) 2003-11-27 2009-12-02 株式会社日立製作所 複数のプロセッサを用いて情報処理を行う装置及び方法
US20050206648A1 (en) * 2004-03-16 2005-09-22 Perry Ronald N Pipeline and cache for processing data progressively
US7373466B1 (en) 2004-04-07 2008-05-13 Advanced Micro Devices, Inc. Method and apparatus for filtering memory write snoop activity in a distributed shared memory computer
US7395375B2 (en) * 2004-11-08 2008-07-01 International Business Machines Corporation Prefetch miss indicator for cache coherence directory misses on external caches
KR101168364B1 (ko) * 2004-11-24 2012-07-25 코닌클리케 필립스 일렉트로닉스 엔.브이. 로컬 메모리 데이터의 가간섭성 캐싱
US7970980B2 (en) * 2004-12-15 2011-06-28 International Business Machines Corporation Method and apparatus for accessing memory in a computer system architecture supporting heterogeneous configurations of memory structures
JP4892209B2 (ja) * 2005-08-22 2012-03-07 日立化成デュポンマイクロシステムズ株式会社 半導体装置の製造方法
US7404045B2 (en) * 2005-12-30 2008-07-22 International Business Machines Corporation Directory-based data transfer protocol for multiprocessor system
US7596654B1 (en) * 2006-01-26 2009-09-29 Symantec Operating Corporation Virtual machine spanning multiple computers
US7702743B1 (en) 2006-01-26 2010-04-20 Symantec Operating Corporation Supporting a weak ordering memory model for a virtual physical address space that spans multiple nodes
US7756943B1 (en) 2006-01-26 2010-07-13 Symantec Operating Corporation Efficient data transfer between computers in a virtual NUMA system using RDMA
CN100377116C (zh) * 2006-04-04 2008-03-26 浙江大学 处理器高速数据缓存重配置方法
JP5079342B2 (ja) 2007-01-22 2012-11-21 ルネサスエレクトロニクス株式会社 マルチプロセッサ装置
WO2010038301A1 (ja) 2008-10-02 2010-04-08 富士通株式会社 メモリアクセス方法及び情報処理装置
US9152569B2 (en) * 2008-11-04 2015-10-06 International Business Machines Corporation Non-uniform cache architecture (NUCA)
JP5338375B2 (ja) * 2009-02-26 2013-11-13 富士通株式会社 演算処理装置、情報処理装置および演算処理装置の制御方法
US8527697B2 (en) * 2009-07-20 2013-09-03 Netapp, Inc. Virtualized data storage in a network computing environment
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US5113510A (en) * 1987-12-22 1992-05-12 Thinking Machines Corporation Method and apparatus for operating a cache memory in a multi-processor
US5414827A (en) * 1991-12-19 1995-05-09 Opti, Inc. Automatic cache flush
US5394555A (en) * 1992-12-23 1995-02-28 Bull Hn Information Systems Inc. Multi-node cluster computer system incorporating an external coherency unit at each node to insure integrity of information stored in a shared, distributed memory
US5802578A (en) * 1996-06-12 1998-09-01 Sequent Computer Systems, Inc. Multinode computer system with cache for combined tags
US5897664A (en) * 1996-07-01 1999-04-27 Sun Microsystems, Inc. Multiprocessor system having mapping table in each node to map global physical addresses to local physical addresses of page copies
US5848434A (en) * 1996-12-09 1998-12-08 Intel Corporation Method and apparatus for caching state information within a directory-based coherency memory system
FR2763712B1 (fr) * 1997-05-26 2001-07-13 Bull Sa Dispositif d'instrumentation pour machine avec memoire a acces non uniforme
FR2764097B1 (fr) * 1997-06-02 1999-07-02 Bull Sa Detection de points chauds dans une machine avec memoire a acces non uniforme
US6073225A (en) * 1997-06-24 2000-06-06 Intel Corporation Method and apparatus for monitoring bus transactions based on cycle type and memory address range

Also Published As

Publication number Publication date
US6243794B1 (en) 2001-06-05
DE69715203T2 (de) 2003-07-31
EP0908825B1 (de) 2002-09-04
EP0908825A1 (de) 1999-04-14
JPH11232173A (ja) 1999-08-27

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Legal Events

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Owner name: BULL S.A., LES CLAYES SOUS BOIS, FR