DE69630126D1 - Historische zustandinformation verwendendes entscheidungsprotokoll für zugriff auf ein geteiltes speichergebiet - Google Patents

Historische zustandinformation verwendendes entscheidungsprotokoll für zugriff auf ein geteiltes speichergebiet

Info

Publication number
DE69630126D1
DE69630126D1 DE69630126T DE69630126T DE69630126D1 DE 69630126 D1 DE69630126 D1 DE 69630126D1 DE 69630126 T DE69630126 T DE 69630126T DE 69630126 T DE69630126 T DE 69630126T DE 69630126 D1 DE69630126 D1 DE 69630126D1
Authority
DE
Germany
Prior art keywords
access
storage area
status information
shared storage
historical status
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69630126T
Other languages
English (en)
Other versions
DE69630126T2 (de
Inventor
W Aucsmith
C Knauerhase
C Stanley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of DE69630126D1 publication Critical patent/DE69630126D1/de
Publication of DE69630126T2 publication Critical patent/DE69630126T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
DE69630126T 1995-07-27 1996-07-02 Historische zustandinformation verwendendes entscheidungsprotokoll für zugriff auf ein geteiltes speichergebiet Expired - Fee Related DE69630126T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US50796295A 1995-07-27 1995-07-27
US507962 1995-07-27
PCT/US1996/011306 WO1997005550A1 (en) 1995-07-27 1996-07-02 Protocol for arbitrating access to a shared memory area using historical state information

Publications (2)

Publication Number Publication Date
DE69630126D1 true DE69630126D1 (de) 2003-10-30
DE69630126T2 DE69630126T2 (de) 2004-06-17

Family

ID=24020812

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69630126T Expired - Fee Related DE69630126T2 (de) 1995-07-27 1996-07-02 Historische zustandinformation verwendendes entscheidungsprotokoll für zugriff auf ein geteiltes speichergebiet

Country Status (5)

Country Link
US (1) US6243793B1 (de)
EP (1) EP0842470B1 (de)
AU (1) AU6452396A (de)
DE (1) DE69630126T2 (de)
WO (1) WO1997005550A1 (de)

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GB9724028D0 (en) * 1997-11-13 1998-01-14 Advanced Telecommunications Mo Shared memory access controller
US6996656B2 (en) * 2002-10-31 2006-02-07 Src Computers, Inc. System and method for providing an arbitrated memory bus in a hybrid computing system
US6665708B1 (en) * 1999-11-12 2003-12-16 Telefonaktiebolaget Lm Ericsson (Publ) Coarse grained determination of data dependence between parallel executed jobs in an information processing system
US6725457B1 (en) * 2000-05-17 2004-04-20 Nvidia Corporation Semaphore enhancement to improve system performance
DE10030380A1 (de) * 2000-06-21 2002-01-03 Infineon Technologies Ag Mehrere CPUs enthaltendes System
IL137085A (en) * 2000-06-29 2004-08-31 Eci Telecom Ltd Method for effective utilizing of shared resources in computerized systems
US7174552B2 (en) * 2002-01-12 2007-02-06 Intel Corporation Method of accessing a resource by a process based on a semaphore of another process
JP2004078683A (ja) * 2002-08-20 2004-03-11 Toshiba Corp コンピュータシステムおよび共有メモリ制御方法
US7133978B1 (en) * 2003-06-19 2006-11-07 Xilinx, Inc. Method and apparatus for processing data stored in a memory shared among a plurality of processors
US20050041510A1 (en) * 2003-08-19 2005-02-24 Jean Khawand Method and apparatus for providing interprocessor communications using shared memory
KR100652690B1 (ko) * 2004-10-28 2006-12-07 엘지전자 주식회사 이동 통신 단말기의 멀티 프로세서 장치
CN100535862C (zh) * 2004-11-30 2009-09-02 皇家飞利浦电子股份有限公司 优先化任务之间的有效切换
JP4748641B2 (ja) 2004-12-06 2011-08-17 ルネサスエレクトロニクス株式会社 情報処理システム
US7823153B1 (en) 2005-09-30 2010-10-26 Symantec Corporation System and method for detecting and logging in-line synchronization primitives in application program code
US7930684B2 (en) * 2005-10-12 2011-04-19 Symantec Operating Corporation System and method for logging and replaying asynchronous events
US8117600B1 (en) 2005-12-29 2012-02-14 Symantec Operating Corporation System and method for detecting in-line synchronization primitives in binary applications
JP4874165B2 (ja) * 2006-07-07 2012-02-15 ルネサスエレクトロニクス株式会社 マルチプロセッサシステム及びマルチプロセッサシステムにおけるアクセス権設定方法
US7949815B2 (en) * 2006-09-27 2011-05-24 Intel Corporation Virtual heterogeneous channel for message passing
US8583845B2 (en) * 2008-08-07 2013-11-12 Nec Corporation Multi-processor system and controlling method thereof
TWI425364B (zh) * 2010-06-22 2014-02-01 Mstar Semiconductor Inc 記憶體共享系統及方法
FR2986346A1 (fr) * 2012-01-27 2013-08-02 Tymis Procede d'utilisation d'une memoire partagee
US10332059B2 (en) 2013-03-14 2019-06-25 Google Llc Security scoring in a smart-sensored home
US9652912B2 (en) 2012-09-21 2017-05-16 Google Inc. Secure handling of unsupervised package drop off at a smart-home
US9640055B2 (en) 2012-09-21 2017-05-02 Google Inc. Interacting with a detected visitor at an entryway to a smart-home
US9711036B2 (en) 2012-09-21 2017-07-18 Google Inc. Leveraging neighborhood to handle potential visitor at a smart-home
US20150120015A1 (en) * 2012-09-21 2015-04-30 Google Inc. Automated handling of a package delivery at a smart-home
US9600645B2 (en) 2012-09-21 2017-03-21 Google Inc. Smart invitation handling at a smart-home
US9959727B2 (en) 2012-09-21 2018-05-01 Google Llc Handling visitor interaction at a smart-home in a do not disturb mode
US9626841B2 (en) 2012-09-21 2017-04-18 Google Inc. Occupant notification of visitor interaction with a doorbell at a smart-home
US9960929B2 (en) 2012-09-21 2018-05-01 Google Llc Environmental sensing with a doorbell at a smart-home
US9881474B2 (en) 2012-09-21 2018-01-30 Google Llc Initially detecting a visitor at a smart-home
US9953514B2 (en) 2012-09-21 2018-04-24 Google Llc Visitor feedback to visitor interaction with a doorbell at a smart-home
US9978238B2 (en) 2012-09-21 2018-05-22 Google Llc Visitor options at an entryway to a smart-home
US10735216B2 (en) * 2012-09-21 2020-08-04 Google Llc Handling security services visitor at a smart-home
CN103268290B (zh) * 2013-01-04 2016-02-17 深圳爱淘城网络科技股份有限公司 基于优先级锁定的闪存存储方法
US9152474B2 (en) * 2014-01-20 2015-10-06 Netapp, Inc. Context aware synchronization using context and input parameter objects associated with a mutual exclusion lock

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Publication number Priority date Publication date Assignee Title
US4402046A (en) * 1978-12-21 1983-08-30 Intel Corporation Interprocessor communication system
JPS5852264B2 (ja) * 1981-06-12 1983-11-21 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション マルチユニツト・システム
US5274809A (en) * 1988-05-26 1993-12-28 Hitachi, Ltd. Task execution control method for a multiprocessor system with enhanced post/wait procedure
JP2650965B2 (ja) * 1988-05-27 1997-09-10 株式会社日立製作所 計算機システムおよびそのタスクスケジュール方法
US5142676A (en) * 1988-12-28 1992-08-25 Gte Laboratories Incorporated Separate content addressable memories for storing locked segment addresses and locking processor identifications for controlling access to shared memory
JP2570872B2 (ja) * 1989-12-04 1997-01-16 三菱電機株式会社 ワンチップマイクロコンピュータ
CA2057446C (en) * 1991-04-04 1998-02-17 Brian Neil Baker Shared memory access and data structure access control
US5440752A (en) * 1991-07-08 1995-08-08 Seiko Epson Corporation Microprocessor architecture with a switch network for data transfer between cache, memory port, and IOU

Also Published As

Publication number Publication date
WO1997005550A1 (en) 1997-02-13
DE69630126T2 (de) 2004-06-17
AU6452396A (en) 1997-02-26
EP0842470B1 (de) 2003-09-24
EP0842470A4 (de) 2002-01-02
EP0842470A1 (de) 1998-05-20
US6243793B1 (en) 2001-06-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee